[gentoo-user] how do i know my SMP is working and setup right?

["Daevid Vincent" <daevid@daevid.com>]

I just upgraded my Gentoo server from an old Celeron 1Ghz to a Pentium4
3Ghz (hyperthreaded).
 
In /etc/make.conf I have:

CHOST="i686-pc-linux-gnu"
CFLAGS="-O2 -march=pentium4 -pipe -fomit-frame-pointer -mfpmath=sse
-mmmx -msse"
MAKEOPTS="-j3"

I compiled the new kernel and added some SMP stuff I saw:

daevid ~ # uname -a
Linux daevid.com 2.6.19-gentoo-r5 #2 SMP PREEMPT Sat May 26 13:50:25 PDT
2007 i686 Intel(R) Pentium(R) 4 CPU 3.00GHz GenuineIntel GNU/Linux

But when I'm in KDE, the little load applet doesn't show two CPUs
(should it?).

So how can I tell that it's being used, and what "tool" will show me
both CPUs and their loads n stuff (like WinXP does in taskmgr -- this
used to be an XP box BTW. I "upgraded" it ;-)

daevid ~ # x86info
x86info v1.20.  Dave Jones 2001-2006
Feedback to <davej@redhat.com>.
 
Found 2 CPUs
------------------------------------------------------------------------
--
CPU #1
Family: 15 Model: 3 Stepping: 4 Type: 0 Brand: 0
CPU Model: Pentium 4 (Prescott) [D0] Original OEM
Processor name string: Intel(R) Pentium(R) 4 CPU 3.00GHz
 
Feature flags:
 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36
clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe sse3 monitor ds-cpl
cntx-id xTPR
Extended feature flags:
 
Cache info
 Instruction trace cache: 12K uOps, 8-way associative.
 L1 Data cache: 16KB, sectored, 8-way associative. 64 byte line size.
 L2 unified cache: 1MB, sectored, 8-way associative. 64 byte line size.
TLB info
 Instruction TLB: 4K, 2MB or 4MB pages, fully associative, 64 entries.
 Data TLB: 4KB or 4MB pages, fully associative, 64 entries.
The physical package supports 2 logical processors 
 
------------------------------------------------------------------------
--
CPU #2
Family: 15 Model: 3 Stepping: 4 Type: 0 Brand: 0
CPU Model: Pentium 4 (Prescott) [D0] Original OEM
Processor name string: Intel(R) Pentium(R) 4 CPU 3.00GHz
 
Feature flags:
 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36
clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe sse3 monitor ds-cpl
cntx-id xTPR
Extended feature flags:
 
Cache info
 Instruction trace cache: 12K uOps, 8-way associative.
 L1 Data cache: 16KB, sectored, 8-way associative. 64 byte line size.
 L2 unified cache: 1MB, sectored, 8-way associative. 64 byte line size.
TLB info
 Instruction TLB: 4K, 2MB or 4MB pages, fully associative, 64 entries.
 Data TLB: 4KB or 4MB pages, fully associative, 64 entries.
The physical package supports 2 logical processors 
 
------------------------------------------------------------------------
--

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