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* [gentoo-server] HT on P4?
@ 2005-09-23 21:30 A. Khattri
  2005-09-23 21:41 ` kashani
  0 siblings, 1 reply; 13+ messages in thread
From: A. Khattri @ 2005-09-23 21:30 UTC (permalink / raw
  To: gentoo-server


I switched on SMP and HT when building my kernel but I see this among the
boot messages:

CPU: After generic identify, caps: bfebfbff 00000000 00000000 00000000
0000441d 00000000 00000000
CPU: After vendor identify, caps: bfebfbff 00000000 00000000 00000000
0000441d 00000000 00000000
monitor/mwait feature present.
using mwait in idle threads.
CPU: Trace cache: 12K uops, L1 D cache: 16K
CPU: L2 cache: 1024K
CPU: Hyper-Threading is disabled
CPU: After all inits, caps: bfebfbff 00000000 00000000 00000080 0000441d
00000000 00000000
Intel machine check architecture supported.
Intel machine check reporting enabled on CPU#0.
CPU0: Intel P4/Xeon Extended MCE MSRs (12) available
CPU0: Thermal monitoring enabled
Enabling fast FPU save and restore... done.
Enabling unmasked SIMD FPU exception support... done.
Checking 'hlt' instruction... OK.
CPU0: Intel(R) Pentium(R) 4 CPU 2.40GHz stepping 01
Total of 1 processors activated (4718.59 BogoMIPS).
ENABLING IO-APIC IRQs
..TIMER: vector=0x31 pin1=2 pin2=-1
Brought up 1 CPUs
CPU0 attaching sched-domain:
 domain 0: span 1
  groups: 1
  domain 1: span 1
   groups: 1


Looks like I dont get hyperthreading enabled????


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^ permalink raw reply	[flat|nested] 13+ messages in thread
* RE: [gentoo-server] HT on P4?
@ 2005-09-25 13:00 Wilkins, Vern
  0 siblings, 0 replies; 13+ messages in thread
From: Wilkins, Vern @ 2005-09-25 13:00 UTC (permalink / raw
  To: gentoo-server

[-- Attachment #1: Type: text/plain, Size: 3392 bytes --]

As someone else mentioned, my guess would be it's turned off on the board.  If there's no bios setting, how about a jumper on the board?  There has to be some way to turn it on/off.


-----Original Message-----
From:	A. Khattri [mailto:ajai@bway.net]
Sent:	Sun 9/25/2005 1:36 AM
To:	gentoo-server@lists.gentoo.org
Cc:	
Subject:	Re: [gentoo-server] HT on P4?
On Fri, 23 Sep 2005, Joao Patricio wrote:

> Did you enable SMP when you compiled your kernel?

Both SMP and SMT are enabled in this kernel:

# grep SMP /usr/src/linux/.config

# CONFIG_X86_BIGSMP is not set
CONFIG_SMP=y
CONFIG_X86_FIND_SMP_CONFIG=y
CONFIG_X86_SMP=y

# grep SMT /usr/src/linux/.config

CONFIG_SCHED_SMT=y



>
> Em Sexta, 23 de Setembro de 2005 23:05, o A. Khattri escreveu:
> > On Fri, 23 Sep 2005, kashani wrote:
> > > A. Khattri wrote:
> > > > I switched on SMP and HT when building my kernel but I see this among
> > > > the boot messages:
> > > >
> > > > CPU: After generic identify, caps: bfebfbff 00000000 00000000 00000000
> > > > 0000441d 00000000 00000000
> > > > CPU: After vendor identify, caps: bfebfbff 00000000 00000000 00000000
> > > > 0000441d 00000000 00000000
> > > > monitor/mwait feature present.
> > > > using mwait in idle threads.
> > > > CPU: Trace cache: 12K uops, L1 D cache: 16K
> > > > CPU: L2 cache: 1024K
> > > > CPU: Hyper-Threading is disabled
> > >
> > > Is it possible it's disabled in the Bios? Some servers shipped that way
> > > when they first came out IIRC.
> >
> > I didn't find any BIOS setting unfortunately...
> >
> > This is a Supermicro 5013C-T server with a P4 (P4SCE?) board in it.
> >
> > # cat /proc/cpuinfo
> > processor       : 0
> > vendor_id       : GenuineIntel
> > cpu family      : 15
> > model           : 4
> > model name      : Intel(R) Pentium(R) 4 CPU 2.40GHz
> > stepping        : 1
> > cpu MHz         : 2395.003
> > cache size      : 1024 KB
> > fdiv_bug        : no
> > hlt_bug         : no
> > f00f_bug        : no
> > coma_bug        : no
> > fpu             : yes
> > fpu_exception   : yes
> > cpuid level     : 5
> > wp              : yes
> > flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca
> > cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni monitor
> > ds_cpl cid xtpr
> > bogomips        : 4718.59
> >
> >
> > --
>

-- 
wheel of reincarnation

 [coined in a paper by T. H. Myer
   and I.E. Sutherland "On the Design of Display Processors", Comm.
   ACM, Vol. 11, no. 6, June 1968)] Term used to refer to a well-known
   effect whereby function in a computing system family is migrated
   out to special-purpose peripheral hardware for speed, then the
   peripheral evolves toward more computing power as it does its job,
   then somebody notices that it is inefficient to support two
   asymmetrical processors in the architecture and folds the function
   back into the main CPU, at which point the cycle begins again.

Several iterations of this cycle have been observed in
   graphics-processor design, and at least one or two in
   communications and floating-point processors.  Also known as `the
   Wheel of Life', `the Wheel of Samsara', and other variations of
   the basic Hindu/Buddhist theological idea.  See also blitter,
   bit bang.

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^ permalink raw reply	[flat|nested] 13+ messages in thread
end of thread, other threads:[~2005-10-03 20:18 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2005-09-23 21:30 [gentoo-server] HT on P4? A. Khattri
2005-09-23 21:41 ` kashani
2005-09-23 22:05   ` A. Khattri
2005-09-23 22:30     ` Joao Patricio
2005-09-25  6:36       ` A. Khattri
2005-09-25 12:06         ` Christian Ehlers
2005-09-26 11:13           ` Benjamin Smee (strerror)
2005-09-26 19:14           ` A. Khattri
2005-09-26 19:49             ` Chris Shelton
2005-09-29 17:12               ` A. Khattri
2005-09-29 23:01                 ` Peter Carlsson
2005-10-03 18:59                   ` A. Khattri
  -- strict thread matches above, loose matches on Subject: below --
2005-09-25 13:00 Wilkins, Vern

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