From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from lists.gentoo.org (pigeon.gentoo.org [208.92.234.80]) by finch.gentoo.org (Postfix) with ESMTP id 475241381FA for ; Mon, 5 May 2014 19:35:35 +0000 (UTC) Received: from pigeon.gentoo.org (localhost [127.0.0.1]) by pigeon.gentoo.org (Postfix) with SMTP id A4C27E0B7A; Mon, 5 May 2014 19:35:34 +0000 (UTC) Received: from smtp.gentoo.org (smtp.gentoo.org [140.211.166.183]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by pigeon.gentoo.org (Postfix) with ESMTPS id 378FDE0B7A for ; Mon, 5 May 2014 19:35:34 +0000 (UTC) Received: from [192.168.1.2] (0545b819.skybroadband.com [5.69.184.25]) (using TLSv1 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: hwoarang) by smtp.gentoo.org (Postfix) with ESMTPSA id C98C433FF60; Mon, 5 May 2014 19:35:32 +0000 (UTC) Message-ID: <5367E7A3.3090503@gentoo.org> Date: Mon, 05 May 2014 20:33:55 +0100 From: Markos Chandras User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-mips@lists.gentoo.org Reply-to: gentoo-mips@lists.gentoo.org MIME-Version: 1.0 To: gentoo-mips@lists.gentoo.org CC: releng@gentoo.org Subject: Re: [gentoo-mips] Re: Reducing the number of the MIPS supported stages References: <53679ACC.3000809@gentoo.org> <5367E42A.70105@gentoo.org> In-Reply-To: <5367E42A.70105@gentoo.org> X-Enigmail-Version: 1.6 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Archives-Salt: da55ca52-7363-46f6-afee-37f541953fe3 X-Archives-Hash: 182bd6a35ab68b0975b923622dfa3fcb On 05/05/2014 08:19 PM, Anthony G. Basile wrote: > On 05/05/2014 10:06 AM, Markos Chandras wrote: >> Hi all, >> >> Right now the number of stages for each endianness is 8: >> >> - mips1 >> - mips32 >> - mips32r2 >> - mips3 >> - mips4 >> - mips4_r10 >> - mips64 >> - mips64r2 >> >> ==> 16 stages in total. >> >> This takes quite a bit of time for all stages to be built (by the time >> everything is built, we are one month passed the time the snapshot was >> taken). How about stop building stages for mips1, mips3 and mips4? We >> keep the existing stages on the mirrors but we will no longer update >> them (or maybe we do on per user or per case basis). I understand >> there is hardware for these ISAs but how often do people actually use >> the new stages? >> >> Just to be clear, I am not suggesting for the team to stop supporting >> these ISAs but to stop building new stages and let the users of such >> ISAs, grab an old stage3 and do the update themselves if needed. >> >> This will free up some hardware resources for building different >> stages for the newer ISAs (maybe more non-multilib n32 and n64 >> variants etc) >> >> What does everyone think? >> >> (CC'ing releng just to keep them in the loop) >> > > FYI, for uclibc I'm only doing big endian mips32r2 and little endian > mips3 (aka mipsel3). Those are in use (atheros ar71xx boards and > lemote, respectively). > > Since you can build a lower level ISA on a board capable of a higher > level ISA, maybe you want to choose along those lines, eg you can build > mips1 using catalyst on an ar71xx board running mips32r2. > Yes there are a lot of options. Sadly we have no metrics on how many people use the old ISA stages or how many of them build their own thing. I don't want to decide anything by myself, I want to know what others think and make a decision as a team and community (if we are going to decide anything at all) :) -- Regards, Markos Chandras