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Date: Mon, 20 May 2019 11:44:18 +0200
From: Alexis Ballier <aballier@gentoo.org>
To: gentoo-dev@lists.gentoo.org
Subject: Re: [gentoo-dev] Announcing RISC-V
Message-ID: <20190520114418.04551eb5@gentoo.org>
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On Sat, 18 May 2019 20:47:28 +0200
Micha=C5=82 G=C3=B3rny <mgorny@gentoo.org> wrote:

> On Fri, 2019-05-03 at 23:34 +0200, Andreas K. Huettel wrote:
> > * We will initially add two profiles to profile.desc:=20
> >   default/linux/riscv/17.0/rv64gc/lp64d (non-multilib, 64bit
> > hardfloat) default/linux/riscv/17.0/rv64gc (multilib lp64d/lp64,
> > i.e. hard/softfloat)
>=20
> I still don't understand the purpose of this multilib.  If you have
> a hardfloat CPU, why would you ever build some of the software
> softfloat?


One reason I could imagine is that the hardfloat isn't IEEE 754
compliant. Searching through the RISC-V spec, it does not seem to be
the case here (ie: it is required to be compliant) so I'm also
wondering what is the point here.


Note that hard vs soft float will be the least of our concerns
here: Based on wikipedia, I count 4 base ISA (2 stable, 2 dev) and 13
optional extensions (6 stable, 7 dev) so we potentially have an
exponential number of ABIs here...