From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pigeon.gentoo.org ([208.92.234.80] helo=lists.gentoo.org) by finch.gentoo.org with esmtp (Exim 4.60) (envelope-from ) id 1QaVgq-0000Ek-43 for garchives@archives.gentoo.org; Sat, 25 Jun 2011 16:26:36 +0000 Received: from pigeon.gentoo.org (localhost [127.0.0.1]) by pigeon.gentoo.org (Postfix) with SMTP id 8D1661C0E4; Sat, 25 Jun 2011 16:26:08 +0000 (UTC) Received: from smtp.gentoo.org (smtp.gentoo.org [140.211.166.183]) by pigeon.gentoo.org (Postfix) with ESMTP id 536431C0D4 for ; Sat, 25 Jun 2011 16:26:08 +0000 (UTC) Received: from pelican.gentoo.org (unknown [66.219.59.40]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 9DB9A2AC02E for ; Sat, 25 Jun 2011 16:26:07 +0000 (UTC) Received: from localhost.localdomain (localhost [127.0.0.1]) by pelican.gentoo.org (Postfix) with ESMTP id C587F80051 for ; Sat, 25 Jun 2011 16:26:06 +0000 (UTC) From: "Matt Turner" To: gentoo-commits@lists.gentoo.org Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Matt Turner" Message-ID: Subject: [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/ X-VCS-Repository: proj/catalyst X-VCS-Files: ChangeLog modules/catalyst/arch/mips.py X-VCS-Directories: / modules/catalyst/arch/ X-VCS-Committer: mattst88 X-VCS-Committer-Name: Matt Turner X-VCS-Revision: db4323146ce27362948de6eab57e1dbe28240bde Date: Sat, 25 Jun 2011 16:26:06 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: quoted-printable X-Archives-Salt: X-Archives-Hash: e71c9e7125ba7c6f92f3cd8f252ff3fe commit: db4323146ce27362948de6eab57e1dbe28240bde Author: Matt Turner gentoo org> AuthorDate: Sat Jun 25 16:12:32 2011 +0000 Commit: Matt Turner gmail com> CommitDate: Sat Jun 25 16:12:32 2011 +0000 URL: http://git.overlays.gentoo.org/gitweb/?p=3Dproj/catalyst.git;= a=3Dcommit;h=3Ddb432314 mips.py: fix CFLAGS in loongson class Clearly never tested --- ChangeLog | 3 +++ modules/catalyst/arch/mips.py | 2 +- 2 files changed, 4 insertions(+), 1 deletions(-) diff --git a/ChangeLog b/ChangeLog index dc7c0e4..44aafd9 100644 --- a/ChangeLog +++ b/ChangeLog @@ -4,6 +4,9 @@ # $Id$ =20 25 Jun 2011; Matt Turner + modules/catalyst/arch/mips.py: fix CFLAGS in loongson class + + 25 Jun 2011; Matt Turner modules/catalyst/arch/mips.py: Remove ip* classes =20 25 Jun 2011; Matt Turner diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.p= y index c5252b7..aa11059 100644 --- a/modules/catalyst/arch/mips.py +++ b/modules/catalyst/arch/mips.py @@ -103,7 +103,7 @@ class arch_loongson2f(generic_mipsel): "Builder class for all Loongson 2F [Little-endian]" def __init__(self,myspec): generic_mipsel.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O3 -march=3Dloongson2f -mabi=3D32 -pipe -m= plt --Wa,-mfix-loongson2f-nop" + self.settings["CFLAGS"]=3D"-O3 -march=3Dloongson2f -mabi=3D32 -pipe -m= plt -Wa,-mfix-loongson2f-nop" =20 class arch_loongson2f_n32(generic_mipsel): "Builder class for all Loongson 2F [Little-endian N32]"