[gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/

["Matt Turner" <mattst88@gmail.com>]

commit:     d1c26d0eff8b75e8aa8692e4bc41fc135965ddb6
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Tue Jun 28 00:54:25 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jun 28 00:54:25 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=d1c26d0e

mips.py: include R4x00 and loongson workarounds in mips3

---
 modules/catalyst/arch/mips.py |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 4c4af0c..16ec207 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -45,26 +45,26 @@ class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n32(generic_mips64):
 	"Builder class for MIPS III [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n64(generic_mips64):
 	"Builder class for MIPS III [Big-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_multilib(generic_mips64,generic_multilib):
 	"Builder class for MIPS III [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
 		generic_multilib.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips4(generic_mips64):
 	"Builder class for MIPS IV [Big-endian]"
@@ -101,26 +101,26 @@ class arch_mipsel3(generic_mipsel):
 	"Builder class for all MIPS III [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n32(generic_mips64el):
 	"Builder class for all MIPS III [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n64(generic_mips64el):
 	"Builder class for MIPS III [Little-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_multilib(generic_mips64el,generic_multilib):
 	"Builder class for MIPS III [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		generic_multilib.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2e(generic_mipsel):
 	"Builder class for all Loongson 2E [Little-endian]"