From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pigeon.gentoo.org ([208.92.234.80] helo=lists.gentoo.org) by finch.gentoo.org with esmtp (Exim 4.60) (envelope-from ) id 1QaVga-0000B4-Ob for garchives@archives.gentoo.org; Sat, 25 Jun 2011 16:26:20 +0000 Received: from pigeon.gentoo.org (localhost [127.0.0.1]) by pigeon.gentoo.org (Postfix) with SMTP id DA4B41C07B; Sat, 25 Jun 2011 16:26:07 +0000 (UTC) Received: from smtp.gentoo.org (smtp.gentoo.org [140.211.166.183]) by pigeon.gentoo.org (Postfix) with ESMTP id A223D1C09C for ; Sat, 25 Jun 2011 16:26:07 +0000 (UTC) Received: from pelican.gentoo.org (unknown [66.219.59.40]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 00B1C2AC039 for ; Sat, 25 Jun 2011 16:26:07 +0000 (UTC) Received: from localhost.localdomain (localhost [127.0.0.1]) by pelican.gentoo.org (Postfix) with ESMTP id 5BA988003C for ; Sat, 25 Jun 2011 16:26:06 +0000 (UTC) From: "Matt Turner" To: gentoo-commits@lists.gentoo.org Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Matt Turner" Message-ID: Subject: [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/ X-VCS-Repository: proj/catalyst X-VCS-Files: ChangeLog modules/catalyst/arch/mips.py X-VCS-Directories: / modules/catalyst/arch/ X-VCS-Committer: mattst88 X-VCS-Committer-Name: Matt Turner X-VCS-Revision: c42b0354874ef23fab3e0dbd77d3d43f3613faf0 Date: Sat, 25 Jun 2011 16:26:06 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: quoted-printable X-Archives-Salt: X-Archives-Hash: 6aba5c9e94e5bae69215dd00c4fcbd45 commit: c42b0354874ef23fab3e0dbd77d3d43f3613faf0 Author: Matt Turner gentoo org> AuthorDate: Sat Jun 25 16:09:28 2011 +0000 Commit: Matt Turner gmail com> CommitDate: Sat Jun 25 16:09:28 2011 +0000 URL: http://git.overlays.gentoo.org/gitweb/?p=3Dproj/catalyst.git;= a=3Dcommit;h=3Dc42b0354 mips.py: Remove mips2 classes Linux doesn't even run on mips2 --- ChangeLog | 4 ++++ modules/catalyst/arch/mips.py | 14 -------------- 2 files changed, 4 insertions(+), 14 deletions(-) diff --git a/ChangeLog b/ChangeLog index 0036fcf..d468265 100644 --- a/ChangeLog +++ b/ChangeLog @@ -3,6 +3,10 @@ # Distributed under the GPL v2 # $Id$ =20 + 25 Jun 2011; Matt Turner + modules/catalyst/arch/mips.py: Remove mips2 classes + Linux doesn't even run on mips2 + 14 Apr 2011; Ra=C3=BAl Porcel targets/support/bootloader-setup.sh: Add gentoo-ilo option for the bootloader on ia64 diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.p= y index 8e5f124..ec523c6 100644 --- a/modules/catalyst/arch/mips.py +++ b/modules/catalyst/arch/mips.py @@ -21,12 +21,6 @@ class arch_mips1(generic_mips): generic_mips.__init__(self,myspec) self.settings["CFLAGS"]=3D"-O2 -mips1 -mabi=3D32 -pipe" =20 -class arch_mips2(generic_mips): - "Builder class for MIPS II [Big-endian]" - def __init__(self,myspec): - generic_mips.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips2 -mabi=3D32 -pipe" - class arch_mips3(generic_mips): "Builder class for MIPS III [Big-endian]" def __init__(self,myspec): @@ -77,12 +71,6 @@ class arch_mipsel1(generic_mipsel): generic_mipsel.__init__(self,myspec) self.settings["CFLAGS"]=3D"-O2 -mips1 -mabi=3D32 -pipe" =20 -class arch_mipsel2(generic_mipsel): - "Builder class for all MIPS II [Little-endian]" - def __init__(self,myspec): - generic_mipsel.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips2 -mabi=3D32 -pipe" - class arch_mipsel3(generic_mipsel): "Builder class for all MIPS III [Little-endian]" def __init__(self,myspec): @@ -201,7 +189,6 @@ _subarch_map =3D { "ip30_n32" : arch_ip30_n32, "mips" : arch_mips1, "mips1" : arch_mips1, - "mips2" : arch_mips2, "mips3" : arch_mips3, "mips3_n32" : arch_mips3_n32, "mips3_n64" : arch_mips3_n64, @@ -209,7 +196,6 @@ _subarch_map =3D { "mips4_n32" : arch_mips4_n32, "mipsel" : arch_mipsel1, "mipsel1" : arch_mipsel1, - "mipsel2" : arch_mipsel2, "mipsel3" : arch_mipsel3, "mipsel3_n32" : arch_mipsel3_n32, "mipsel4" : arch_mipsel4,