public inbox for gentoo-commits@lists.gentoo.org
 help / color / mirror / Atom feed
* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2011-02-05 18:27 Raúl Porcel
  0 siblings, 0 replies; 9+ messages in thread
From: Raúl Porcel @ 2011-02-05 18:27 UTC (permalink / raw
  To: gentoo-commits

commit:     2a6629d9971dba08f2b96537c72d231e91106b4c
Author:     Raúl Porcel <armin76 <AT> gentoo <DOT> org>
AuthorDate: Sat Feb  5 18:27:51 2011 +0000
Commit:     Raúl Porcel <armin76 <AT> gentoo <DOT> org>
CommitDate: Sat Feb  5 18:27:51 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=2a6629d9

Enable new amd64 subarches

---
 ChangeLog                      |    6 +++++-
 modules/catalyst/arch/amd64.py |   13 ++++++-------
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index e6facb2..2e0f47b 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,8 +1,12 @@
 # ChangeLog for catalyst
-# Copyright 1999-2010 Gentoo Foundation; 2008-2009 Various authors (see AUTHORS)
+# Copyright 1999-2011 Gentoo Foundation; 2008-2009 Various authors (see AUTHORS)
 # Distributed under the GPL v2
 # $Id$
 
+  05 Feb 2011; Raúl Porcel <armin76@gentoo.org>
+  modules/catalyst/arch/amd64.py:
+  Enable new amd64 subarches
+
   01 Nov 2010; Raúl Porcel <armin76@gentoo.org>
   modules/catalyst/arch/mips.py:
   Add patch for Loongson support, patch by Zhang Le <r0bertz at gentoo dot

diff --git a/modules/catalyst/arch/amd64.py b/modules/catalyst/arch/amd64.py
index c6e0018..bab57d3 100644
--- a/modules/catalyst/arch/amd64.py
+++ b/modules/catalyst/arch/amd64.py
@@ -61,13 +61,12 @@ _subarch_map = {
 	"athlon64"	: arch_k8,
 	"athlonfx"	: arch_k8,
 	"nocona"	: arch_nocona,
-# uncomment when gcc 4.3 is stable and delete this line
-#	"core2"		: arch_core2,
-#	"k8-sse3"	: arch_k8_sse3,
-#	"opteron-sse3"	: arch_k8_sse3,
-#	"athlon64-sse3"	: arch_k8_sse3,
-#	"amdfam10"	: arch_amdfam10,
-#	"barcelona"	: arch_amdfam10
+	"core2"		: arch_core2,
+	"k8-sse3"	: arch_k8_sse3,
+	"opteron-sse3"	: arch_k8_sse3,
+	"athlon64-sse3"	: arch_k8_sse3,
+	"amdfam10"	: arch_amdfam10,
+	"barcelona"	: arch_amdfam10
 }
 
 _machine_map = ("x86_64","amd64","nocona")



^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2011-06-25 16:26 Matt Turner
  0 siblings, 0 replies; 9+ messages in thread
From: Matt Turner @ 2011-06-25 16:26 UTC (permalink / raw
  To: gentoo-commits

commit:     db4323146ce27362948de6eab57e1dbe28240bde
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Sat Jun 25 16:12:32 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Jun 25 16:12:32 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=db432314

mips.py: fix CFLAGS in loongson class

Clearly never tested

---
 ChangeLog                     |    3 +++
 modules/catalyst/arch/mips.py |    2 +-
 2 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index dc7c0e4..44aafd9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,9 @@
 # $Id$
 
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>
+  modules/catalyst/arch/mips.py: fix CFLAGS in loongson class
+
+  25 Jun 2011; Matt Turner <mattst88@gentoo.org>
   modules/catalyst/arch/mips.py: Remove ip* classes
 
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>

diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index c5252b7..aa11059 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -103,7 +103,7 @@ class arch_loongson2f(generic_mipsel):
 	"Builder class for all Loongson 2F [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -pipe -mplt --Wa,-mfix-loongson2f-nop"
+		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
 
 class arch_loongson2f_n32(generic_mipsel):
 	"Builder class for all Loongson 2F [Little-endian N32]"



^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2011-06-25 16:26 Matt Turner
  0 siblings, 0 replies; 9+ messages in thread
From: Matt Turner @ 2011-06-25 16:26 UTC (permalink / raw
  To: gentoo-commits

commit:     c42b0354874ef23fab3e0dbd77d3d43f3613faf0
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Sat Jun 25 16:09:28 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Jun 25 16:09:28 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=c42b0354

mips.py: Remove mips2 classes

Linux doesn't even run on mips2

---
 ChangeLog                     |    4 ++++
 modules/catalyst/arch/mips.py |   14 --------------
 2 files changed, 4 insertions(+), 14 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 0036fcf..d468265 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -3,6 +3,10 @@
 # Distributed under the GPL v2
 # $Id$
 
+  25 Jun 2011; Matt Turner <mattst88@gentoo.org>
+  modules/catalyst/arch/mips.py: Remove mips2 classes
+  Linux doesn't even run on mips2
+
   14 Apr 2011; Raúl Porcel <armin76@gentoo.org>
   targets/support/bootloader-setup.sh:
   Add gentoo-ilo option for the bootloader on ia64

diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 8e5f124..ec523c6 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -21,12 +21,6 @@ class arch_mips1(generic_mips):
 		generic_mips.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
 
-class arch_mips2(generic_mips):
-	"Builder class for MIPS II [Big-endian]"
-	def __init__(self,myspec):
-		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips2 -mabi=32 -pipe"
-
 class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
 	def __init__(self,myspec):
@@ -77,12 +71,6 @@ class arch_mipsel1(generic_mipsel):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
 
-class arch_mipsel2(generic_mipsel):
-	"Builder class for all MIPS II [Little-endian]"
-	def __init__(self,myspec):
-		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips2 -mabi=32 -pipe"
-
 class arch_mipsel3(generic_mipsel):
 	"Builder class for all MIPS III [Little-endian]"
 	def __init__(self,myspec):
@@ -201,7 +189,6 @@ _subarch_map = {
 	"ip30_n32"		: arch_ip30_n32,
 	"mips"			: arch_mips1,
 	"mips1"			: arch_mips1,
-	"mips2"			: arch_mips2,
 	"mips3"			: arch_mips3,
 	"mips3_n32"		: arch_mips3_n32,
 	"mips3_n64"		: arch_mips3_n64,
@@ -209,7 +196,6 @@ _subarch_map = {
 	"mips4_n32"		: arch_mips4_n32,
 	"mipsel"		: arch_mipsel1,
 	"mipsel1"		: arch_mipsel1,
-	"mipsel2"		: arch_mipsel2,
 	"mipsel3"		: arch_mipsel3,
 	"mipsel3_n32"	: arch_mipsel3_n32,
 	"mipsel4"		: arch_mipsel4,



^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2011-06-25 16:26 Matt Turner
  0 siblings, 0 replies; 9+ messages in thread
From: Matt Turner @ 2011-06-25 16:26 UTC (permalink / raw
  To: gentoo-commits

commit:     aa1bc0998b169f14d8757677a279431299be70b2
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Sat Jun 25 16:10:59 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Jun 25 16:10:59 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=aa1bc099

mips.py: Remove ip* classes

They were clearly never even tested since they were inheriting the
little-endian abstract class.

---
 ChangeLog                     |    3 ++
 modules/catalyst/arch/mips.py |   42 -----------------------------------------
 2 files changed, 3 insertions(+), 42 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index d468265..dc7c0e4 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,9 @@
 # $Id$
 
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>
+  modules/catalyst/arch/mips.py: Remove ip* classes
+
+  25 Jun 2011; Matt Turner <mattst88@gentoo.org>
   modules/catalyst/arch/mips.py: Remove mips2 classes
   Linux doesn't even run on mips2
 

diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index ec523c6..c5252b7 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -142,51 +142,9 @@ class arch_cobalt_n32(generic_mipsel):
 		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -pipe"
 		self.settings["HOSTUSE"]=["cobalt","n32"]
 
-class arch_ip27(generic_mipsel):
-	"Builder class for all IP27 [Big-endian]"
-	def __init__(self,myspec):
-		arch_mips4.__init__(self,myspec)
-		self.settings["HOSTUSE"]=["ip27"]
-
-class arch_ip27_n32(generic_mipsel):
-	"Builder class for all IP27 [Big-endian N32]"
-	def __init__(self,myspec):
-		arch_mips4_n32.__init__(self,myspec)
-		self.settings["HOSTUSE"]=["ip27","n32"]
-
-class arch_ip28(generic_mipsel):
-	"Builder class for all IP28 [Big-endian]"
-	def __init__(self,myspec):
-		arch_mips4.__init__(self,myspec)
-		self.settings["HOSTUSE"]=["ip28"]
-
-class arch_ip28_n32(generic_mipsel):
-	"Builder class for all IP28 [Big-endian N32]"
-	def __init__(self,myspec):
-		arch_mips4_n32.__init__(self,myspec)
-		self.settings["HOSTUSE"]=["ip28","n32"]
-
-class arch_ip30(generic_mipsel):
-	"Builder class for all IP30 [Big-endian]"
-	def __init__(self,myspec):
-		arch_mips4.__init__(self,myspec)
-		self.settings["HOSTUSE"]=["ip30"]
-
-class arch_ip30_n32(generic_mipsel):
-	"Builder class for all IP30 [Big-endian N32]"
-	def __init__(self,myspec):
-		arch_mips4_n32.__init__(self,myspec)
-		self.settings["HOSTUSE"]=["ip30","n32"]
-
 _subarch_map = {
 	"cobalt"		: arch_cobalt,
 	"cobalt_n32"	: arch_cobalt_n32,
-	"ip27"			: arch_ip27,
-	"ip27_n32"		: arch_ip27_n32,
-	"ip28"			: arch_ip28,
-	"ip28_n32"		: arch_ip28_n32,
-	"ip30"			: arch_ip30,
-	"ip30_n32"		: arch_ip30_n32,
 	"mips"			: arch_mips1,
 	"mips1"			: arch_mips1,
 	"mips3"			: arch_mips3,



^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2011-06-25 16:26 Matt Turner
  0 siblings, 0 replies; 9+ messages in thread
From: Matt Turner @ 2011-06-25 16:26 UTC (permalink / raw
  To: gentoo-commits

commit:     c3db9351c5a6725d7ae439450c9e5baee54c5189
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Sat Jun 25 16:14:53 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Jun 25 16:14:53 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=c3db9351

mips.py: create generic mips64 classes

... and inherit from them to simplify other classes

---
 ChangeLog                     |    4 ++
 modules/catalyst/arch/mips.py |   67 ++++++++++++++++++++++-------------------
 2 files changed, 40 insertions(+), 31 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 44aafd9..5dd3409 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,10 @@
 # $Id$
 
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>
+  modules/catalyst/arch/mips.py: create generic mips64 classes
+  and inherit from them to simplify other classes
+
+  25 Jun 2011; Matt Turner <mattst88@gentoo.org>
   modules/catalyst/arch/mips.py: fix CFLAGS in loongson class
 
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>

diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index aa11059..85dc270 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -15,6 +15,20 @@ class generic_mipsel(catalyst.arch.generic_arch):
 		self.settings["CHROOT"]="chroot"
 		self.settings["CHOST"]="mipsel-unknown-linux-gnu"
 
+class generic_mips64(catalyst.arch.generic_arch):
+	"Abstract base class for all mips64 builders [Big-endian]"
+	def __init__(self,myspec):
+		catalyst.arch.generic_arch.__init__(self,myspec)
+		self.settings["CHROOT"]="chroot"
+		self.settings["CHOST"]="mips64-unknown-linux-gnu"
+
+class generic_mips64el(catalyst.arch.generic_arch):
+	"Abstract base class for all mips64el builders [Little-endian]"
+	def __init__(self,myspec):
+		catalyst.arch.generic_arch.__init__(self,myspec)
+		self.settings["CHROOT"]="chroot"
+		self.settings["CHOST"]="mips64el-unknown-linux-gnu"
+
 class arch_mips1(generic_mips):
 	"Builder class for MIPS I [Big-endian]"
 	def __init__(self,myspec):
@@ -27,42 +41,38 @@ class arch_mips3(generic_mips):
 		generic_mips.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
 
-class arch_mips3_n32(generic_mips):
+class arch_mips3_n32(generic_mips64):
 	"Builder class for MIPS III [Big-endian N32]"
 	def __init__(self,myspec):
-		generic_mips.__init__(self,myspec)
+		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
-		self.settings["CHOST"]="mips64-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["n32"]
 
-class arch_mips3_n64(generic_mips):
+class arch_mips3_n64(generic_mips64):
 	"Builder class for MIPS III [Big-endian N64]"
 	def __init__(self,myspec):
-		generic_mips.__init__(self,myspec)
+		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
-		self.settings["CHOST"]="mips64-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["n64"]
 
-class arch_mips4(generic_mips):
+class arch_mips4(generic_mips64):
 	"Builder class for MIPS IV [Big-endian]"
 	def __init__(self,myspec):
-		generic_mips.__init__(self,myspec)
+		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
 
-class arch_mips4_n32(generic_mips):
+class arch_mips4_n32(generic_mips64):
 	"Builder class for MIPS IV [Big-endian N32]"
 	def __init__(self,myspec):
-		generic_mips.__init__(self,myspec)
+		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
-		self.settings["CHOST"]="mips64-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["n32"]
 
-class arch_mips4_n64(generic_mips):
+class arch_mips4_n64(generic_mips64):
 	"Builder class for MIPS IV [Big-endian N64]"
 	def __init__(self,myspec):
-		generic_mips.__init__(self,myspec)
+		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
-		self.settings["CHOST"]="mips64-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["n64"]
 
 class arch_mipsel1(generic_mipsel):
@@ -77,12 +87,11 @@ class arch_mipsel3(generic_mipsel):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
 
-class arch_mipsel3_n32(generic_mipsel):
+class arch_mipsel3_n32(generic_mips64el):
 	"Builder class for all MIPS III [Little-endian N32]"
 	def __init__(self,myspec):
-		generic_mipsel.__init__(self,myspec)
+		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
-		self.settings["CHOST"]="mips64el-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["n32"]
 
 class arch_loongson2e(generic_mipsel):
@@ -91,12 +100,11 @@ class arch_loongson2e(generic_mipsel):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=32 -pipe -mplt"
 
-class arch_loongson2e_n32(generic_mipsel):
+class arch_loongson2e_n32(generic_mips64el):
 	"Builder class for all Loongson 2E [Little-endian N32]"
 	def __init__(self,myspec):
-		generic_mipsel.__init__(self,myspec)
+		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -pipe -mplt"
-		self.settings["CHOST"]="mips64el-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["n32"]
 
 class arch_loongson2f(generic_mipsel):
@@ -105,26 +113,24 @@ class arch_loongson2f(generic_mipsel):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
 
-class arch_loongson2f_n32(generic_mipsel):
+class arch_loongson2f_n32(generic_mips64el):
 	"Builder class for all Loongson 2F [Little-endian N32]"
 	def __init__(self,myspec):
-		generic_mipsel.__init__(self,myspec)
+		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
-		self.settings["CHOST"]="mips64el-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["n32"]
 
-class arch_mipsel4(generic_mipsel):
+class arch_mipsel4(generic_mips64el):
 	"Builder class for all MIPS IV [Little-endian]"
 	def __init__(self,myspec):
-		generic_mipsel.__init__(self,myspec)
+		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
 
-class arch_mipsel4_n32(generic_mipsel):
+class arch_mipsel4_n32(generic_mips64el):
 	"Builder class for all MIPS IV [Little-endian N32]"
 	def __init__(self,myspec):
-		generic_mipsel.__init__(self,myspec)
+		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
-		self.settings["CHOST"]="mips64el-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["n32"]
 
 class arch_cobalt(generic_mipsel):
@@ -132,13 +138,12 @@ class arch_cobalt(generic_mipsel):
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=32 -pipe"
-		self.settings["CHOST"]="mipsel-unknown-linux-gnu"
 		self.settings["HOSTUSE"]=["cobalt"]
 
-class arch_cobalt_n32(generic_mipsel):
+class arch_cobalt_n32(generic_mips64el):
 	"Builder class for all cobalt [Little-endian N32]"
 	def __init__(self,myspec):
-		arch_mipsel4_n32.__init__(self,myspec)
+		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -pipe"
 		self.settings["HOSTUSE"]=["cobalt","n32"]
 



^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2011-06-25 16:26 Matt Turner
  0 siblings, 0 replies; 9+ messages in thread
From: Matt Turner @ 2011-06-25 16:26 UTC (permalink / raw
  To: gentoo-commits

commit:     28b793958b322925c2c2a42c8621739a7c1bf6a8
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Sat Jun 25 16:15:27 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Jun 25 16:15:27 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=28b79395

mips.py: remove n32/n64 USE flags

Nothing uses these flags anymore.

---
 ChangeLog                     |    3 +++
 modules/catalyst/arch/mips.py |   10 +---------
 2 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 5dd3409..6f98efd 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,9 @@
 # $Id$
 
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>
+  modules/catalyst/arch/mips.py: remove n32/n64 USE flags
+
+  25 Jun 2011; Matt Turner <mattst88@gentoo.org>
   modules/catalyst/arch/mips.py: create generic mips64 classes
   and inherit from them to simplify other classes
 

diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 85dc270..51b6812 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -46,14 +46,12 @@ class arch_mips3_n32(generic_mips64):
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
-		self.settings["HOSTUSE"]=["n32"]
 
 class arch_mips3_n64(generic_mips64):
 	"Builder class for MIPS III [Big-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
-		self.settings["HOSTUSE"]=["n64"]
 
 class arch_mips4(generic_mips64):
 	"Builder class for MIPS IV [Big-endian]"
@@ -66,14 +64,12 @@ class arch_mips4_n32(generic_mips64):
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
-		self.settings["HOSTUSE"]=["n32"]
 
 class arch_mips4_n64(generic_mips64):
 	"Builder class for MIPS IV [Big-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
-		self.settings["HOSTUSE"]=["n64"]
 
 class arch_mipsel1(generic_mipsel):
 	"Builder class for all MIPS I [Little-endian]"
@@ -92,7 +88,6 @@ class arch_mipsel3_n32(generic_mips64el):
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
-		self.settings["HOSTUSE"]=["n32"]
 
 class arch_loongson2e(generic_mipsel):
 	"Builder class for all Loongson 2E [Little-endian]"
@@ -105,7 +100,6 @@ class arch_loongson2e_n32(generic_mips64el):
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -pipe -mplt"
-		self.settings["HOSTUSE"]=["n32"]
 
 class arch_loongson2f(generic_mipsel):
 	"Builder class for all Loongson 2F [Little-endian]"
@@ -118,7 +112,6 @@ class arch_loongson2f_n32(generic_mips64el):
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
-		self.settings["HOSTUSE"]=["n32"]
 
 class arch_mipsel4(generic_mips64el):
 	"Builder class for all MIPS IV [Little-endian]"
@@ -131,7 +124,6 @@ class arch_mipsel4_n32(generic_mips64el):
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
-		self.settings["HOSTUSE"]=["n32"]
 
 class arch_cobalt(generic_mipsel):
 	"Builder class for all cobalt [Little-endian]"
@@ -145,7 +137,7 @@ class arch_cobalt_n32(generic_mips64el):
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -pipe"
-		self.settings["HOSTUSE"]=["cobalt","n32"]
+		self.settings["HOSTUSE"]=["cobalt"]
 
 _subarch_map = {
 	"cobalt"		: arch_cobalt,



^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2011-06-25 16:26 Matt Turner
  0 siblings, 0 replies; 9+ messages in thread
From: Matt Turner @ 2011-06-25 16:26 UTC (permalink / raw
  To: gentoo-commits

commit:     bd0e09653358771df2ae9782ba9e757671f0c65c
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Sat Jun 25 16:16:07 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Jun 25 16:16:07 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=bd0e0965

mips.py: add multilib (and missing n64) classes

---
 ChangeLog                     |    3 ++
 modules/catalyst/arch/mips.py |   53 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 56 insertions(+), 0 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 6f98efd..30eb83a 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,9 @@
 # $Id$
 
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>
+  modules/catalyst/arch/mips.py: add multilib (and missing n64) classes
+
+  25 Jun 2011; Matt Turner <mattst88@gentoo.org>
   modules/catalyst/arch/mips.py: remove n32/n64 USE flags
 
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>

diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 51b6812..4c4af0c 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -29,6 +29,12 @@ class generic_mips64el(catalyst.arch.generic_arch):
 		self.settings["CHROOT"]="chroot"
 		self.settings["CHOST"]="mips64el-unknown-linux-gnu"
 
+class generic_multilib(catalyst.arch.generic_arch):
+	"Abstract base class for MIPS multilib"
+	def __init__(self,myspec):
+		catalyst.arch.generic_arch.__init__(self,myspec)
+		self.settings["HOSTUSE"]=["multilib"]
+
 class arch_mips1(generic_mips):
 	"Builder class for MIPS I [Big-endian]"
 	def __init__(self,myspec):
@@ -53,6 +59,13 @@ class arch_mips3_n64(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
 
+class arch_mips3_multilib(generic_mips64,generic_multilib):
+	"Builder class for MIPS III [Big-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		generic_multilib.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+
 class arch_mips4(generic_mips64):
 	"Builder class for MIPS IV [Big-endian]"
 	def __init__(self,myspec):
@@ -71,6 +84,13 @@ class arch_mips4_n64(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
 
+class arch_mips4_multilib(generic_mips64,generic_multilib):
+	"Builder class for MIPS IV [Big-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		generic_multilib.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+
 class arch_mipsel1(generic_mipsel):
 	"Builder class for all MIPS I [Little-endian]"
 	def __init__(self,myspec):
@@ -89,6 +109,19 @@ class arch_mipsel3_n32(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
 
+class arch_mipsel3_n64(generic_mips64el):
+	"Builder class for MIPS III [Little-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+
+class arch_mipsel3_multilib(generic_mips64el,generic_multilib):
+	"Builder class for MIPS III [Little-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		generic_multilib.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+
 class arch_loongson2e(generic_mipsel):
 	"Builder class for all Loongson 2E [Little-endian]"
 	def __init__(self,myspec):
@@ -125,6 +158,19 @@ class arch_mipsel4_n32(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
 
+class arch_mipsel4_n64(generic_mips64el):
+	"Builder class for MIPS IV [Little-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
+
+class arch_mipsel4_multilib(generic_mips64el,generic_multilib):
+	"Builder class for MIPS IV [Little-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		generic_multilib.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+
 class arch_cobalt(generic_mipsel):
 	"Builder class for all cobalt [Little-endian]"
 	def __init__(self,myspec):
@@ -147,14 +193,21 @@ _subarch_map = {
 	"mips3"			: arch_mips3,
 	"mips3_n32"		: arch_mips3_n32,
 	"mips3_n64"		: arch_mips3_n64,
+	"mips3_multilib": arch_mips3_multilib,
 	"mips4"			: arch_mips4,
 	"mips4_n32"		: arch_mips4_n32,
+	"mips4_n64"		: arch_mips4_n64,
+	"mips4_multilib": arch_mips4_multilib,
 	"mipsel"		: arch_mipsel1,
 	"mipsel1"		: arch_mipsel1,
 	"mipsel3"		: arch_mipsel3,
 	"mipsel3_n32"	: arch_mipsel3_n32,
+	"mipsel3_n64"	: arch_mipsel3_n64,
+	"mipsel3_multilib"	: arch_mipsel3_multilib,
 	"mipsel4"		: arch_mipsel4,
 	"mipsel4_n32"	: arch_mipsel4_n32,
+	"mipsel4_n64"	: arch_mipsel4_n64,
+	"mipsel4_multilib"	: arch_mipsel4_multilib,
 	"loongson2e"		: arch_loongson2e,
 	"loongson2e_n32"	: arch_loongson2e_n32,
 	"loongson2f"		: arch_loongson2f,



^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2011-06-25 18:36 Raúl Porcel
  0 siblings, 0 replies; 9+ messages in thread
From: Raúl Porcel @ 2011-06-25 18:36 UTC (permalink / raw
  To: gentoo-commits

commit:     8f0d792824295d2ab91d269f44236d8bdcb2227e
Author:     Raúl Porcel <armin76 <AT> gentoo <DOT> org>
AuthorDate: Sat Jun 25 18:36:07 2011 +0000
Commit:     Raúl Porcel <armin76 <AT> gentoo <DOT> org>
CommitDate: Sat Jun 25 18:36:07 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=8f0d7928

Add sh4aeb

---
 ChangeLog                   |    3 +++
 modules/catalyst/arch/sh.py |   12 ++++++++++--
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 88b3b8e..8cfcb11 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -3,6 +3,9 @@
 # Distributed under the GPL v2
 # $Id$
 
+  25 Jun 2011; Raúl Porcel <armin76@gentoo.org> modules/catalyst/arch/sh.py:
+  Add sh4aeb
+
   25 Jun 2011; Matt Turner <mattst88@gentoo.org>
   targets/support/chroot-functions.sh:
   Use get_libdir instead of hard-coding lib for distcc

diff --git a/modules/catalyst/arch/sh.py b/modules/catalyst/arch/sh.py
index 319ced2..0058152 100644
--- a/modules/catalyst/arch/sh.py
+++ b/modules/catalyst/arch/sh.py
@@ -97,6 +97,13 @@ class arch_sh4eb(generic_sheb):
 		self.settings["CFLAGS"]="-O2 -m4 -pipe"
 		self.settings["CHOST"]="sh4eb-unknown-linux-gnu"
 
+class arch_sh4aeb(generic_sheb):
+	"Builder class for SH-4A [Big-endian]"
+	def __init__(self,myspec):
+		generic_sheb.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -m4a -pipe"
+		self.settings["CHOST"]="sh4aeb-unknown-linux-gnu"
+
 _subarch_map = {
 	"sh"	:arch_sh,
 	"sh2"	:arch_sh2,
@@ -105,10 +112,11 @@ _subarch_map = {
 	"sh4"	:arch_sh4,
 	"sh4a"	:arch_sh4a,
 	"sheb"	:arch_sheb,
-	"sh2aeb":arch_sh2aeb,
+	"sh2aeb" :arch_sh2aeb,
 	"sh2eb" :arch_sh2eb,
 	"sh3eb"	:arch_sh3eb,
-	"sh4eb"	:arch_sh4eb
+	"sh4eb"	:arch_sh4eb,
+	"sh4aeb" :arch_sh4aeb
 }
 
 _machine_map = ("sh2","sh2a","sh3","sh4","sh4a","sh2eb","sh2aeb","sh3eb","sh4eb","sh4aeb")



^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/
@ 2012-05-03 18:59 Raúl Porcel
  0 siblings, 0 replies; 9+ messages in thread
From: Raúl Porcel @ 2012-05-03 18:59 UTC (permalink / raw
  To: gentoo-commits

commit:     2025317c5ae08e1204ad400f0fe3333806b0b3d6
Author:     Raúl Porcel <armin76 <AT> gentoo <DOT> org>
AuthorDate: Thu May  3 18:58:14 2012 +0000
Commit:     Raúl Porcel <armin76 <AT> gentoo <DOT> org>
CommitDate: Thu May  3 18:58:14 2012 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=2025317c

Add armv6j_hardfp

---
 ChangeLog                    |    5 ++++-
 modules/catalyst/arch/arm.py |    8 ++++++++
 2 files changed, 12 insertions(+), 1 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 965171a..c971efc 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,8 +1,11 @@
 # ChangeLog for catalyst
-# Copyright 1999-2011 Gentoo Foundation; 2008-2009 Various authors (see AUTHORS)
+# Copyright 1999-2012 Gentoo Foundation; 2008-2009 Various authors (see AUTHORS)
 # Distributed under the GPL v2
 # $Id$
 
+  03 May 2012; Raúl Porcel <armin76@gentoo.org> modules/catalyst/arch/arm.py:
+  Add armv6j_hardfp
+
   26 Jun 2011; Matt Turner <mattst88@gentoo.org>
   targets/support/chroot-functions.sh:
   Don't run 'distcc-config --install'

diff --git a/modules/catalyst/arch/arm.py b/modules/catalyst/arch/arm.py
index 7740701..8a4ea9f 100644
--- a/modules/catalyst/arch/arm.py
+++ b/modules/catalyst/arch/arm.py
@@ -91,6 +91,13 @@ class arch_armv7a(generic_arm):
 		self.settings["CHOST"]="armv7a-unknown-linux-gnueabi"
 		self.settings["CFLAGS"]+=" -march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=softfp"
 
+class arch_armv6j_hardfp(generic_arm):
+	"Builder class for armv6j hardfloat target, needs >=gcc-4.5"
+	def __init__(self,myspec):
+		generic_arm.__init__(self,myspec)
+		self.settings["CHOST"]="armv6j-hardfloat-linux-gnueabi"
+		self.settings["CFLAGS"]+=" -march=armv6j -mfpu=vfp -mfloat-abi=hard"
+
 class arch_armv7a_hardfp(generic_arm):
 	"Builder class for armv7a hardfloat target, needs >=gcc-4.5"
 	def __init__(self,myspec):
@@ -116,6 +123,7 @@ _subarch_map = {
 	"armv6z" : arch_armv6z,
 	"armv6zk" : arch_armv6zk,
 	"armv7a" : arch_armv7a,
+	"armv6j_hardfp" : arch_armv6j_hardfp,
 	"armv7a_hardfp" : arch_armv7a_hardfp,
 	"armeb"  : arch_armeb,
 	"armv5teb" : arch_armv5teb



^ permalink raw reply related	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2012-05-03 18:59 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-06-25 16:26 [gentoo-commits] proj/catalyst:master commit in: /, modules/catalyst/arch/ Matt Turner
  -- strict thread matches above, loose matches on Subject: below --
2012-05-03 18:59 Raúl Porcel
2011-06-25 18:36 Raúl Porcel
2011-06-25 16:26 Matt Turner
2011-06-25 16:26 Matt Turner
2011-06-25 16:26 Matt Turner
2011-06-25 16:26 Matt Turner
2011-06-25 16:26 Matt Turner
2011-02-05 18:27 Raúl Porcel

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox