[gentoo-commits] gentoo commit in src/patchsets/gcc/4.3.2/gentoo: 78_all_arm-PR37436.patch README.history

[gentoo-commits] gentoo commit in src/patchsets/gcc/4.3.2/gentoo: 78_all_arm-PR37436.patch README.history

[Mark Loeser (halcy0n)]

halcy0n     09/04/26 18:17:59

  Modified:             README.history
  Added:                78_all_arm-PR37436.patch
  Log:
  Releasing patchset with fixes for arm; bug #265367 and bug #261111

Revision  Changes    Path
1.14                 src/patchsets/gcc/4.3.2/gentoo/README.history

file : http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.2/gentoo/README.history?rev=1.14&view=markup
plain: http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.2/gentoo/README.history?rev=1.14&content-type=text/plain
diff : http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.2/gentoo/README.history?r1=1.13&r2=1.14

Index: README.history
===================================================================
RCS file: /var/cvsroot/gentoo/src/patchsets/gcc/4.3.2/gentoo/README.history,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -r1.13 -r1.14
--- README.history	27 Jan 2009 18:42:43 -0000	1.13
+++ README.history	26 Apr 2009 18:17:59 -0000	1.14
@@ -1,3 +1,7 @@
+1.7		26.04.2009
+	+ 67_all_gcc43-pr35964.patch
+	+ 78_all_arm-PR37436.patch
+
 1.6		27.01.2008
 	+ 46_all_armel-hilo-union-class.patch
 	+ 47_all_arm-unbreak-armv4t.patch



1.1                  src/patchsets/gcc/4.3.2/gentoo/78_all_arm-PR37436.patch

file : http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.2/gentoo/78_all_arm-PR37436.patch?rev=1.1&view=markup
plain: http://sources.gentoo.org/viewcvs.py/gentoo/src/patchsets/gcc/4.3.2/gentoo/78_all_arm-PR37436.patch?rev=1.1&content-type=text/plain

Index: 78_all_arm-PR37436.patch
===================================================================
Backport from gcc-4.4 to fix bug #265367

http://gcc.gnu.org/PR37436

Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c	(revision 142777)
+++ gcc/config/arm/arm.c	(revision 142778)
@@ -3844,6 +3844,7 @@
       rtx xop1 = XEXP (x, 1);
 
       return ((arm_address_register_rtx_p (xop0, strict_p)
+	       && GET_CODE(xop1) == CONST_INT
 	       && arm_legitimate_index_p (mode, xop1, outer, strict_p))
 	      || (arm_address_register_rtx_p (xop1, strict_p)
 		  && arm_legitimate_index_p (mode, xop0, outer, strict_p)));
Index: gcc/config/arm/predicates.md
===================================================================
--- gcc/config/arm/predicates.md	(revision 142777)
+++ gcc/config/arm/predicates.md	(revision 142778)
@@ -234,6 +234,10 @@
        (match_test "arm_legitimate_address_p (mode, XEXP (op, 0), SIGN_EXTEND,
 					      0)")))
 
+(define_special_predicate "arm_reg_or_extendqisi_mem_op"
+  (ior (match_operand 0 "arm_extendqisi_mem_op")
+       (match_operand 0 "s_register_operand")))
+
 (define_predicate "power_of_two_operand"
   (match_code "const_int")
 {
Index: gcc/config/arm/arm.md
===================================================================
--- gcc/config/arm/arm.md	(revision 142777)
+++ gcc/config/arm/arm.md	(revision 142778)
@@ -4299,7 +4299,7 @@
 
 (define_expand "extendqihi2"
   [(set (match_dup 2)
-	(ashift:SI (match_operand:QI 1 "general_operand" "")
+	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
 		   (const_int 24)))
    (set (match_operand:HI 0 "s_register_operand" "")
 	(ashiftrt:SI (match_dup 2)
@@ -4324,7 +4324,7 @@
 
 (define_insn "*arm_extendqihi_insn"
   [(set (match_operand:HI 0 "s_register_operand" "=r")
-	(sign_extend:HI (match_operand:QI 1 "memory_operand" "Uq")))]
+	(sign_extend:HI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
   "TARGET_ARM && arm_arch4"
   "ldr%(sb%)\\t%0, %1"
   [(set_attr "type" "load_byte")
@@ -4335,7 +4335,7 @@
 
 (define_expand "extendqisi2"
   [(set (match_dup 2)
-	(ashift:SI (match_operand:QI 1 "general_operand" "")
+	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
 		   (const_int 24)))
    (set (match_operand:SI 0 "s_register_operand" "")
 	(ashiftrt:SI (match_dup 2)
@@ -4367,7 +4367,7 @@
 
 (define_insn "*arm_extendqisi"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
-	(sign_extend:SI (match_operand:QI 1 "memory_operand" "Uq")))]
+	(sign_extend:SI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
   "TARGET_ARM && arm_arch4 && !arm_arch6"
   "ldr%(sb%)\\t%0, %1"
   [(set_attr "type" "load_byte")
@@ -4378,7 +4378,8 @@
 
 (define_insn "*arm_extendqisi_v6"
   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
-	(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,Uq")))]
+	(sign_extend:SI
+	 (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "r,Uq")))]
   "TARGET_ARM && arm_arch6"
   "@
    sxtb%?\\t%0, %1