[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     b03eff5c0d2eb9e4dab64d5a1fd3ceb0e9c8a7d4
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Tue Jun 28 00:54:25 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jun 28 00:55:23 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=b03eff5c

mips.py: include R4x00 and loongson workarounds in mips3

---
 arch/mips.py |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index a83dd17..c04771f 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -46,26 +46,26 @@ class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n32(generic_mips64):
 	"Builder class for MIPS III [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n64(generic_mips64):
 	"Builder class for MIPS III [Big-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_multilib(generic_mips64,generic_multilib):
 	"Builder class for MIPS III [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
 		generic_multilib.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips4(generic_mips64):
 	"Builder class for MIPS IV [Big-endian]"
@@ -102,26 +102,26 @@ class arch_mipsel3(generic_mipsel):
 	"Builder class for all MIPS III [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n32(generic_mips64el):
 	"Builder class for all MIPS III [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n64(generic_mips64el):
 	"Builder class for MIPS III [Little-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_multilib(generic_mips64el,generic_multilib):
 	"Builder class for MIPS III [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		generic_multilib.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+		self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2e(generic_mipsel):
 	"Builder class for all Loongson 2E [Little-endian]"

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     23d12791fe451b85c480b2acd8c275e492aa46e6
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Jul 16 18:31:56 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Jul 16 18:36:11 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=23d12791

mips.py: add mips32 and mips64 builder classes

Signed-off-by: Matt Turner <mattst88 <AT> gmail.com>

---
 arch/mips.py |   72 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 72 insertions(+), 0 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index c04771f..7713436 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -42,6 +42,12 @@ class arch_mips1(generic_mips):
 		generic_mips.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
 
+class arch_mips32(generic_mips):
+	"Builder class for MIPS 32 [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mfix-24k -mabi=32 -pipe"
+
 class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
 	def __init__(self,myspec):
@@ -92,12 +98,43 @@ class arch_mips4_multilib(generic_mips64,generic_multilib):
 		generic_multilib.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
 
+class arch_mips64(generic_mips64):
+	"Builder class for MIPS 64 [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
+
+class arch_mips64_n32(generic_mips64):
+	"Builder class for MIPS 64 [Big-endian N32]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
+
+class arch_mips64_n64(generic_mips64):
+	"Builder class for MIPS 64 [Big-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=64 -pipe"
+
+class arch_mips64_multilib(generic_mips64,generic_multilib):
+	"Builder class for MIPS 64 [Big-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		generic_multilib.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+
 class arch_mipsel1(generic_mipsel):
 	"Builder class for all MIPS I [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
 
+class arch_mips32el(generic_mipsel):
+	"Builder class for all MIPS 32 [Little-endian]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mfix-24k -mabi=32 -pipe"
+
 class arch_mipsel3(generic_mipsel):
 	"Builder class for all MIPS III [Little-endian]"
 	def __init__(self,myspec):
@@ -172,6 +209,31 @@ class arch_mipsel4_multilib(generic_mips64el,generic_multilib):
 		generic_multilib.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
 
+class arch_mips64el(generic_mips64el):
+	"Builder class for all MIPS 64 [Little-endian]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
+
+class arch_mips64el_n32(generic_mips64el):
+	"Builder class for all MIPS 64 [Little-endian N32]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
+
+class arch_mips64el_n64(generic_mips64el):
+	"Builder class for MIPS 64 [Little-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=64 -pipe"
+
+class arch_mips64el_multilib(generic_mips64el,generic_multilib):
+	"Builder class for MIPS 64 [Little-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		generic_multilib.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+
 class arch_cobalt(generic_mipsel):
 	"Builder class for all cobalt [Little-endian]"
 	def __init__(self,myspec):
@@ -193,6 +255,7 @@ def register():
 			"cobalt_n32"	: arch_cobalt_n32,
 			"mips"			: arch_mips1,
 			"mips1"			: arch_mips1,
+			"mips32"		: arch_mips32,
 			"mips3"			: arch_mips3,
 			"mips3_n32"		: arch_mips3_n32,
 			"mips3_n64"		: arch_mips3_n64,
@@ -201,8 +264,13 @@ def register():
 			"mips4_n32"		: arch_mips4_n32,
 			"mips4_n64"		: arch_mips4_n64,
 			"mips4_multilib": arch_mips4_multilib,
+			"mips64"		: arch_mips64,
+			"mips64_n32"	: arch_mips64_n32,
+			"mips64_n64"	: arch_mips64_n64,
+			"mips64_multilib"	: arch_mips64_multilib,
 			"mipsel"		: arch_mipsel1,
 			"mipsel1"		: arch_mipsel1,
+			"mips32el"		: arch_mips32el,
 			"mipsel3"		: arch_mipsel3,
 			"mipsel3_n32"	: arch_mipsel3_n32,
 			"mipsel3_n64"	: arch_mipsel3_n64,
@@ -211,6 +279,10 @@ def register():
 			"mipsel4_n32"	: arch_mipsel4_n32,
 			"mipsel4_n64"	: arch_mipsel4_n64,
 			"mipsel4_multilib"	: arch_mipsel4_multilib,
+			"mips64el"		: arch_mips64el,
+			"mips64el_n32"	: arch_mips64el_n32,
+			"mips64el_n64"	: arch_mips64el_n64,
+			"mips64el_multilib"	: arch_mips64el_multilib,
 			"loongson2e"		: arch_loongson2e,
 			"loongson2e_n32"	: arch_loongson2e_n32,
 			"loongson2f"		: arch_loongson2f,

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     8b7c852ad404c17e685888ffbf81cf5b3664fe07
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Tue Jul 19 17:01:48 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jul 19 18:18:43 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=8b7c852a

mips.py: remove unnecessary generic_multilib class

It only served to add the "multilib" USE flag, which is already provided
by the multilib profiles.

Signed-off-by: Matt Turner <mattst88 <AT> gmail.com>

---
 arch/mips.py |   24 ++++++------------------
 1 files changed, 6 insertions(+), 18 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 757e215..69a5c08 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -30,12 +30,6 @@ class generic_mips64el(builder.generic):
 		self.settings["CHROOT"]="chroot"
 		self.settings["CHOST"]="mips64el-unknown-linux-gnu"
 
-class generic_multilib(builder.generic):
-	"Abstract base class for MIPS multilib"
-	def __init__(self,myspec):
-		builder.generic.__init__(self,myspec)
-		self.settings["HOSTUSE"]=["multilib"]
-
 class arch_mips1(generic_mips):
 	"Builder class for MIPS I [Big-endian]"
 	def __init__(self,myspec):
@@ -66,11 +60,10 @@ class arch_mips3_n64(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
 
-class arch_mips3_multilib(generic_mips64,generic_multilib):
+class arch_mips3_multilib(generic_mips64):
 	"Builder class for MIPS III [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		generic_multilib.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips4(generic_mips64):
@@ -91,11 +84,10 @@ class arch_mips4_n64(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
 
-class arch_mips4_multilib(generic_mips64,generic_multilib):
+class arch_mips4_multilib(generic_mips64):
 	"Builder class for MIPS IV [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		generic_multilib.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
 
 class arch_mips64(generic_mips64):
@@ -116,11 +108,10 @@ class arch_mips64_n64(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=64 -pipe"
 
-class arch_mips64_multilib(generic_mips64,generic_multilib):
+class arch_mips64_multilib(generic_mips64):
 	"Builder class for MIPS 64 [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		generic_multilib.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
 
 class arch_mipsel1(generic_mipsel):
@@ -153,11 +144,10 @@ class arch_mipsel3_n64(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
 
-class arch_mipsel3_multilib(generic_mips64el,generic_multilib):
+class arch_mipsel3_multilib(generic_mips64el):
 	"Builder class for MIPS III [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		generic_multilib.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2e(generic_mipsel):
@@ -202,11 +192,10 @@ class arch_mipsel4_n64(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
 
-class arch_mipsel4_multilib(generic_mips64el,generic_multilib):
+class arch_mipsel4_multilib(generic_mips64el):
 	"Builder class for MIPS IV [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		generic_multilib.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
 
 class arch_mips64el(generic_mips64el):
@@ -227,11 +216,10 @@ class arch_mips64el_n64(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=64 -pipe"
 
-class arch_mips64el_multilib(generic_mips64el,generic_multilib):
+class arch_mips64el_multilib(generic_mips64el):
 	"Builder class for MIPS 64 [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		generic_multilib.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
 
 class arch_cobalt(generic_mipsel):

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     c9d14be27d69f504429073f413436d2462c266ee
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Tue Jul 19 17:09:33 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jul 19 18:19:16 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=c9d14be2

mips.py: mips/o32 classes should inherit generic_mips{,el}

generic_mips64{,el} should only be used for n32/n64/multilib.

Signed-off-by: Matt Turner <mattst88 <AT> gmail.com>

---
 arch/mips.py |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 69a5c08..803bee8 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -66,7 +66,7 @@ class arch_mips3_multilib(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
 
-class arch_mips4(generic_mips64):
+class arch_mips4(generic_mips):
 	"Builder class for MIPS IV [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
@@ -90,7 +90,7 @@ class arch_mips4_multilib(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
 
-class arch_mips64(generic_mips64):
+class arch_mips64(generic_mips):
 	"Builder class for MIPS 64 [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
@@ -174,7 +174,7 @@ class arch_loongson2f_n32(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
 
-class arch_mipsel4(generic_mips64el):
+class arch_mipsel4(generic_mipsel):
 	"Builder class for all MIPS IV [Little-endian]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
@@ -198,7 +198,7 @@ class arch_mipsel4_multilib(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
 
-class arch_mips64el(generic_mips64el):
+class arch_mips64el(generic_mipsel):
 	"Builder class for all MIPS 64 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     09b9ac3835c7f822e4a42756e94015ae6f32f607
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Tue Jul 19 16:59:27 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jul 19 18:16:47 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=09b9ac38

mips.py: remove -mfix-24k from CFLAGS, it apparently doesn't exist

Signed-off-by: Matt Turner <mattst88 <AT> gmail.com>

---
 arch/mips.py |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 7713436..757e215 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -46,7 +46,7 @@ class arch_mips32(generic_mips):
 	"Builder class for MIPS 32 [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32 -mfix-24k -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
 
 class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
@@ -133,7 +133,7 @@ class arch_mips32el(generic_mipsel):
 	"Builder class for all MIPS 32 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32 -mfix-24k -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
 
 class arch_mipsel3(generic_mipsel):
 	"Builder class for all MIPS III [Little-endian]"

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     7b3ac23ab9a8d63d6ea27d8be3a0342699b55d5b
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Wed Aug 17 04:16:59 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Wed Aug 17 04:22:02 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=7b3ac23a

mips.py: call correct constructor in o32 classes

---
 arch/mips.py |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index ee0afe6..a46cd71 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -75,7 +75,7 @@ class arch_mips3_multilib(generic_mips64):
 class arch_mips4(generic_mips):
 	"Builder class for MIPS IV [Big-endian]"
 	def __init__(self,myspec):
-		generic_mips64.__init__(self,myspec)
+		generic_mips.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
 
 class arch_mips4_n32(generic_mips64):
@@ -99,7 +99,7 @@ class arch_mips4_multilib(generic_mips64):
 class arch_mips64(generic_mips):
 	"Builder class for MIPS 64 [Big-endian]"
 	def __init__(self,myspec):
-		generic_mips64.__init__(self,myspec)
+		generic_mips.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
 
 class arch_mips64_n32(generic_mips64):
@@ -213,7 +213,7 @@ class arch_loongson2f_n32(generic_mips64el):
 class arch_mipsel4(generic_mipsel):
 	"Builder class for all MIPS IV [Little-endian]"
 	def __init__(self,myspec):
-		generic_mips64el.__init__(self,myspec)
+		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
 
 class arch_mipsel4_n32(generic_mips64el):
@@ -237,7 +237,7 @@ class arch_mipsel4_multilib(generic_mips64el):
 class arch_mips64el(generic_mipsel):
 	"Builder class for all MIPS 64 [Little-endian]"
 	def __init__(self,myspec):
-		generic_mips64el.__init__(self,myspec)
+		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
 
 class arch_mips64el_n32(generic_mips64el):

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     73413e958b771a6dbdfd32892484e6f4540b92fe
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Wed Aug 17 04:09:58 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Wed Aug 17 04:21:53 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=73413e95

mips.py: add mips32r2 and mips64r2 builder classes

---
 arch/mips.py |   70 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 70 insertions(+), 0 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 803bee8..ee0afe6 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -42,6 +42,12 @@ class arch_mips32(generic_mips):
 		generic_mips.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
 
+class arch_mips32r2(generic_mips):
+	"Builder class for MIPS 32r2 [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+
 class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
 	def __init__(self,myspec):
@@ -114,6 +120,30 @@ class arch_mips64_multilib(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
 
+class arch_mips64r2(generic_mips):
+	"Builder class for MIPS 64r2 [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
+
+class arch_mips64r2_n32(generic_mips64):
+	"Builder class for MIPS 64r2 [Big-endian N32]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
+
+class arch_mips64r2_n64(generic_mips64):
+	"Builder class for MIPS 64r2 [Big-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=64 -pipe"
+
+class arch_mips64r2_multilib(generic_mips64):
+	"Builder class for MIPS 64r2 [Big-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
+
 class arch_mipsel1(generic_mipsel):
 	"Builder class for all MIPS I [Little-endian]"
 	def __init__(self,myspec):
@@ -126,6 +156,12 @@ class arch_mips32el(generic_mipsel):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
 
+class arch_mips32r2el(generic_mipsel):
+	"Builder class for all MIPS 32r2 [Little-endian]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+
 class arch_mipsel3(generic_mipsel):
 	"Builder class for all MIPS III [Little-endian]"
 	def __init__(self,myspec):
@@ -222,6 +258,30 @@ class arch_mips64el_multilib(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
 
+class arch_mips64r2el(generic_mipsel):
+	"Builder class for all MIPS 64r2 [Little-endian]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
+
+class arch_mips64r2el_n32(generic_mips64el):
+	"Builder class for all MIPS 64r2 [Little-endian N32]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
+
+class arch_mips64r2el_n64(generic_mips64el):
+	"Builder class for MIPS 64r2 [Little-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=64 -pipe"
+
+class arch_mips64r2el_multilib(generic_mips64el):
+	"Builder class for MIPS 64r2 [Little-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
+
 class arch_cobalt(generic_mipsel):
 	"Builder class for all cobalt [Little-endian]"
 	def __init__(self,myspec):
@@ -244,6 +304,7 @@ def register():
 			"mips"			: arch_mips1,
 			"mips1"			: arch_mips1,
 			"mips32"		: arch_mips32,
+			"mips32r2"		: arch_mips32r2,
 			"mips3"			: arch_mips3,
 			"mips3_n32"		: arch_mips3_n32,
 			"mips3_n64"		: arch_mips3_n64,
@@ -256,9 +317,14 @@ def register():
 			"mips64_n32"	: arch_mips64_n32,
 			"mips64_n64"	: arch_mips64_n64,
 			"mips64_multilib"	: arch_mips64_multilib,
+			"mips64r2"		: arch_mips64r2,
+			"mips64r2_n32"	: arch_mips64r2_n32,
+			"mips64r2_n64"	: arch_mips64r2_n64,
+			"mips64r2_multilib"	: arch_mips64r2_multilib,
 			"mipsel"		: arch_mipsel1,
 			"mipsel1"		: arch_mipsel1,
 			"mips32el"		: arch_mips32el,
+			"mips32r2el"	: arch_mips32r2el,
 			"mipsel3"		: arch_mipsel3,
 			"mipsel3_n32"	: arch_mipsel3_n32,
 			"mipsel3_n64"	: arch_mipsel3_n64,
@@ -271,6 +337,10 @@ def register():
 			"mips64el_n32"	: arch_mips64el_n32,
 			"mips64el_n64"	: arch_mips64el_n64,
 			"mips64el_multilib"	: arch_mips64el_multilib,
+			"mips64r2el"	: arch_mips64r2el,
+			"mips64r2el_n32"	: arch_mips64r2el_n32,
+			"mips64r2el_n64"	: arch_mips64r2el_n64,
+			"mips64r2el_multilib"	: arch_mips64r2el_multilib,
 			"loongson2e"		: arch_loongson2e,
 			"loongson2e_n32"	: arch_loongson2e_n32,
 			"loongson2f"		: arch_loongson2f,

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     ca2600ef80b526a10a255f02a7ca8c04764a61b9
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Wed Aug 17 04:17:16 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Wed Aug 17 04:22:09 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=ca2600ef

mips.py: remove incorrect word 'all' from descriptions

---
 arch/mips.py |   34 +++++++++++++++++-----------------
 1 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index a46cd71..1aa5fb6 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -145,31 +145,31 @@ class arch_mips64r2_multilib(generic_mips64):
 		self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
 
 class arch_mipsel1(generic_mipsel):
-	"Builder class for all MIPS I [Little-endian]"
+	"Builder class for MIPS I [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
 
 class arch_mips32el(generic_mipsel):
-	"Builder class for all MIPS 32 [Little-endian]"
+	"Builder class for MIPS 32 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
 
 class arch_mips32r2el(generic_mipsel):
-	"Builder class for all MIPS 32r2 [Little-endian]"
+	"Builder class for MIPS 32r2 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
 
 class arch_mipsel3(generic_mipsel):
-	"Builder class for all MIPS III [Little-endian]"
+	"Builder class for MIPS III [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n32(generic_mips64el):
-	"Builder class for all MIPS III [Little-endian N32]"
+	"Builder class for MIPS III [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
@@ -187,37 +187,37 @@ class arch_mipsel3_multilib(generic_mips64el):
 		self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2e(generic_mipsel):
-	"Builder class for all Loongson 2E [Little-endian]"
+	"Builder class for Loongson 2E [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=32 -pipe -mplt"
 
 class arch_loongson2e_n32(generic_mips64el):
-	"Builder class for all Loongson 2E [Little-endian N32]"
+	"Builder class for Loongson 2E [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -pipe -mplt"
 
 class arch_loongson2f(generic_mipsel):
-	"Builder class for all Loongson 2F [Little-endian]"
+	"Builder class for Loongson 2F [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
 
 class arch_loongson2f_n32(generic_mips64el):
-	"Builder class for all Loongson 2F [Little-endian N32]"
+	"Builder class for Loongson 2F [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
 
 class arch_mipsel4(generic_mipsel):
-	"Builder class for all MIPS IV [Little-endian]"
+	"Builder class for MIPS IV [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
 
 class arch_mipsel4_n32(generic_mips64el):
-	"Builder class for all MIPS IV [Little-endian N32]"
+	"Builder class for MIPS IV [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
@@ -235,13 +235,13 @@ class arch_mipsel4_multilib(generic_mips64el):
 		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
 
 class arch_mips64el(generic_mipsel):
-	"Builder class for all MIPS 64 [Little-endian]"
+	"Builder class for MIPS 64 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
 
 class arch_mips64el_n32(generic_mips64el):
-	"Builder class for all MIPS 64 [Little-endian N32]"
+	"Builder class for MIPS 64 [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
@@ -259,13 +259,13 @@ class arch_mips64el_multilib(generic_mips64el):
 		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
 
 class arch_mips64r2el(generic_mipsel):
-	"Builder class for all MIPS 64r2 [Little-endian]"
+	"Builder class for MIPS 64r2 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
 
 class arch_mips64r2el_n32(generic_mips64el):
-	"Builder class for all MIPS 64r2 [Little-endian N32]"
+	"Builder class for MIPS 64r2 [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
@@ -283,14 +283,14 @@ class arch_mips64r2el_multilib(generic_mips64el):
 		self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
 
 class arch_cobalt(generic_mipsel):
-	"Builder class for all cobalt [Little-endian]"
+	"Builder class for cobalt [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=32 -pipe"
 		self.settings["HOSTUSE"]=["cobalt"]
 
 class arch_cobalt_n32(generic_mips64el):
-	"Builder class for all cobalt [Little-endian N32]"
+	"Builder class for cobalt [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -pipe"

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     a3628d0779df62343e092d424214ddcbba19b31f
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sun Aug 21 23:20:16 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sun Aug 21 23:23:03 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=a3628d07

mips.py: add mips4_r10k classes

---
 arch/mips.py |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 1aa5fb6..9e26c9c 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -96,6 +96,30 @@ class arch_mips4_multilib(generic_mips64):
 		generic_mips64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
 
+class arch_mips4_r10k(generic_mips):
+	"Builder class for MIPS IV R10k [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=r10k -mabi=32 -pipe"
+
+class arch_mips4_r10k_n32(generic_mips64):
+	"Builder class for MIPS IV R10k [Big-endian N32]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=r10k -mabi=n32 -pipe"
+
+class arch_mips4_r10k_n64(generic_mips64):
+	"Builder class for MIPS IV R10k [Big-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=r10k -mabi=64 -pipe"
+
+class arch_mips4_r10k_multilib(generic_mips64):
+	"Builder class for MIPS IV R10k [Big-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=r10k -pipe"
+
 class arch_mips64(generic_mips):
 	"Builder class for MIPS 64 [Big-endian]"
 	def __init__(self,myspec):
@@ -313,6 +337,10 @@ def register():
 			"mips4_n32"		: arch_mips4_n32,
 			"mips4_n64"		: arch_mips4_n64,
 			"mips4_multilib": arch_mips4_multilib,
+			"mips4_r10k"	: arch_mips4_r10k,
+			"mips4_r10k_n32": arch_mips4_r10k_n32,
+			"mips4_r10k_n64": arch_mips4_r10k_n64,
+			"mips4_r10k_multilib"	: arch_mips4_r10k_multilib,
 			"mips64"		: arch_mips64,
 			"mips64_n32"	: arch_mips64_n32,
 			"mips64_n64"	: arch_mips64_n64,

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     18abbdf41a0d5df009b509eb4a60d3f812d45236
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Sep  3 01:19:19 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Sep  3 01:19:19 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=18abbdf4

mips.py: replace -mips* with new -march=mips*

---
 arch/mips.py |   36 ++++++++++++++++++------------------
 1 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 9e26c9c..a0f0fed 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -34,7 +34,7 @@ class arch_mips1(generic_mips):
 	"Builder class for MIPS I [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -pipe"
 
 class arch_mips32(generic_mips):
 	"Builder class for MIPS 32 [Big-endian]"
@@ -52,49 +52,49 @@ class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n32(generic_mips64):
 	"Builder class for MIPS III [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n64(generic_mips64):
 	"Builder class for MIPS III [Big-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_multilib(generic_mips64):
 	"Builder class for MIPS III [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips4(generic_mips):
 	"Builder class for MIPS IV [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -pipe"
 
 class arch_mips4_n32(generic_mips64):
 	"Builder class for MIPS IV [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -pipe"
 
 class arch_mips4_n64(generic_mips64):
 	"Builder class for MIPS IV [Big-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=64 -pipe"
 
 class arch_mips4_multilib(generic_mips64):
 	"Builder class for MIPS IV [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -pipe"
 
 class arch_mips4_r10k(generic_mips):
 	"Builder class for MIPS IV R10k [Big-endian]"
@@ -172,7 +172,7 @@ class arch_mipsel1(generic_mipsel):
 	"Builder class for MIPS I [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -pipe"
 
 class arch_mips32el(generic_mipsel):
 	"Builder class for MIPS 32 [Little-endian]"
@@ -190,25 +190,25 @@ class arch_mipsel3(generic_mipsel):
 	"Builder class for MIPS III [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n32(generic_mips64el):
 	"Builder class for MIPS III [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n64(generic_mips64el):
 	"Builder class for MIPS III [Little-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_multilib(generic_mips64el):
 	"Builder class for MIPS III [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2e(generic_mipsel):
 	"Builder class for Loongson 2E [Little-endian]"
@@ -238,25 +238,25 @@ class arch_mipsel4(generic_mipsel):
 	"Builder class for MIPS IV [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -pipe"
 
 class arch_mipsel4_n32(generic_mips64el):
 	"Builder class for MIPS IV [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -pipe"
 
 class arch_mipsel4_n64(generic_mips64el):
 	"Builder class for MIPS IV [Little-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=64 -pipe"
 
 class arch_mipsel4_multilib(generic_mips64el):
 	"Builder class for MIPS IV [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -pipe"
 
 class arch_mips64el(generic_mipsel):
 	"Builder class for MIPS 64 [Little-endian]"

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     bb3c7c26a878f620d09821ff6a8246db41974198
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Mon Oct 17 02:16:45 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Mon Oct 17 02:16:45 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=bb3c7c26

mips.py: add mips32 softfloat targets

softfloat targets are for producing a userland (ie glibc, gcc) that
handles software floating-point emulation in userspace. The alternative
is configuring your kernel to emulate floating-point math, which is
slower but allows you to use a standard "hard float" userland.

---
 arch/mips.py |   32 ++++++++++++++++++++++++++++++++
 1 files changed, 32 insertions(+), 0 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index a0f0fed..ca8e828 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -42,12 +42,26 @@ class arch_mips32(generic_mips):
 		generic_mips.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
 
+class arch_mips32_softfloat(generic_mips):
+	"Builder class for MIPS 32 [Big-endian softfloat]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+		self.settings["CHOST"]="mips-softfloat-linux-gnu"
+
 class arch_mips32r2(generic_mips):
 	"Builder class for MIPS 32r2 [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
 
+class arch_mips32r2_softfloat(generic_mips):
+	"Builder class for MIPS 32r2 [Big-endian softfloat]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+		self.settings["CHOST"]="mips-softfloat-linux-gnu"
+
 class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
 	def __init__(self,myspec):
@@ -180,12 +194,26 @@ class arch_mips32el(generic_mipsel):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
 
+class arch_mips32el_softfloat(generic_mipsel):
+	"Builder class for MIPS 32 [Little-endian softfloat]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+		self.settings["CHOST"]="mipsel-softfloat-linux-gnu"
+
 class arch_mips32r2el(generic_mipsel):
 	"Builder class for MIPS 32r2 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
 
+class arch_mips32r2el_softfloat(generic_mipsel):
+	"Builder class for MIPS 32r2 [Little-endian softfloat]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+		self.settings["CHOST"]="mipsel-softfloat-linux-gnu"
+
 class arch_mipsel3(generic_mipsel):
 	"Builder class for MIPS III [Little-endian]"
 	def __init__(self,myspec):
@@ -328,7 +356,9 @@ def register():
 			"mips"			: arch_mips1,
 			"mips1"			: arch_mips1,
 			"mips32"		: arch_mips32,
+			"mips32_softfloat"		: arch_mips32_softfloat,
 			"mips32r2"		: arch_mips32r2,
+			"mips32r2_softfloat"	: arch_mips32r2_softfloat,
 			"mips3"			: arch_mips3,
 			"mips3_n32"		: arch_mips3_n32,
 			"mips3_n64"		: arch_mips3_n64,
@@ -352,7 +382,9 @@ def register():
 			"mipsel"		: arch_mipsel1,
 			"mipsel1"		: arch_mipsel1,
 			"mips32el"		: arch_mips32el,
+			"mips32el_softfloat"	: arch_mips32el_softfloat,
 			"mips32r2el"	: arch_mips32r2el,
+			"mips32r2el_softfloat"	: arch_mips32r2el_softfloat,
 			"mipsel3"		: arch_mipsel3,
 			"mipsel3_n32"	: arch_mipsel3_n32,
 			"mipsel3_n64"	: arch_mipsel3_n64,

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     11685882ba9cd6365e085069b4d81d14df7e863b
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Mon Oct 17 02:26:13 2011 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Mon Oct 17 02:26:13 2011 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=11685882

mips.py: align class table

---
 arch/mips.py |   96 +++++++++++++++++++++++++++++-----------------------------
 1 files changed, 48 insertions(+), 48 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index ca8e828..7ffc741 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -351,58 +351,58 @@ class arch_cobalt_n32(generic_mips64el):
 def register():
 	"Inform main catalyst program of the contents of this plugin."
 	return ({ 
-			"cobalt"		: arch_cobalt,
-			"cobalt_n32"	: arch_cobalt_n32,
-			"mips"			: arch_mips1,
-			"mips1"			: arch_mips1,
-			"mips32"		: arch_mips32,
+			"cobalt"				: arch_cobalt,
+			"cobalt_n32"			: arch_cobalt_n32,
+			"mips"					: arch_mips1,
+			"mips1"					: arch_mips1,
+			"mips32"				: arch_mips32,
 			"mips32_softfloat"		: arch_mips32_softfloat,
-			"mips32r2"		: arch_mips32r2,
+			"mips32r2"				: arch_mips32r2,
 			"mips32r2_softfloat"	: arch_mips32r2_softfloat,
-			"mips3"			: arch_mips3,
-			"mips3_n32"		: arch_mips3_n32,
-			"mips3_n64"		: arch_mips3_n64,
-			"mips3_multilib": arch_mips3_multilib,
-			"mips4"			: arch_mips4,
-			"mips4_n32"		: arch_mips4_n32,
-			"mips4_n64"		: arch_mips4_n64,
-			"mips4_multilib": arch_mips4_multilib,
-			"mips4_r10k"	: arch_mips4_r10k,
-			"mips4_r10k_n32": arch_mips4_r10k_n32,
-			"mips4_r10k_n64": arch_mips4_r10k_n64,
+			"mips3"					: arch_mips3,
+			"mips3_n32"				: arch_mips3_n32,
+			"mips3_n64"				: arch_mips3_n64,
+			"mips3_multilib"		: arch_mips3_multilib,
+			"mips4"					: arch_mips4,
+			"mips4_n32"				: arch_mips4_n32,
+			"mips4_n64"				: arch_mips4_n64,
+			"mips4_multilib"		: arch_mips4_multilib,
+			"mips4_r10k"			: arch_mips4_r10k,
+			"mips4_r10k_n32"		: arch_mips4_r10k_n32,
+			"mips4_r10k_n64"		: arch_mips4_r10k_n64,
 			"mips4_r10k_multilib"	: arch_mips4_r10k_multilib,
-			"mips64"		: arch_mips64,
-			"mips64_n32"	: arch_mips64_n32,
-			"mips64_n64"	: arch_mips64_n64,
-			"mips64_multilib"	: arch_mips64_multilib,
-			"mips64r2"		: arch_mips64r2,
-			"mips64r2_n32"	: arch_mips64r2_n32,
-			"mips64r2_n64"	: arch_mips64r2_n64,
-			"mips64r2_multilib"	: arch_mips64r2_multilib,
-			"mipsel"		: arch_mipsel1,
-			"mipsel1"		: arch_mipsel1,
-			"mips32el"		: arch_mips32el,
+			"mips64"				: arch_mips64,
+			"mips64_n32"			: arch_mips64_n32,
+			"mips64_n64"			: arch_mips64_n64,
+			"mips64_multilib"		: arch_mips64_multilib,
+			"mips64r2"				: arch_mips64r2,
+			"mips64r2_n32"			: arch_mips64r2_n32,
+			"mips64r2_n64"			: arch_mips64r2_n64,
+			"mips64r2_multilib"		: arch_mips64r2_multilib,
+			"mipsel"				: arch_mipsel1,
+			"mipsel1"				: arch_mipsel1,
+			"mips32el"				: arch_mips32el,
 			"mips32el_softfloat"	: arch_mips32el_softfloat,
-			"mips32r2el"	: arch_mips32r2el,
+			"mips32r2el"			: arch_mips32r2el,
 			"mips32r2el_softfloat"	: arch_mips32r2el_softfloat,
-			"mipsel3"		: arch_mipsel3,
-			"mipsel3_n32"	: arch_mipsel3_n32,
-			"mipsel3_n64"	: arch_mipsel3_n64,
-			"mipsel3_multilib"	: arch_mipsel3_multilib,
-			"mipsel4"		: arch_mipsel4,
-			"mipsel4_n32"	: arch_mipsel4_n32,
-			"mipsel4_n64"	: arch_mipsel4_n64,
-			"mipsel4_multilib"	: arch_mipsel4_multilib,
-			"mips64el"		: arch_mips64el,
-			"mips64el_n32"	: arch_mips64el_n32,
-			"mips64el_n64"	: arch_mips64el_n64,
-			"mips64el_multilib"	: arch_mips64el_multilib,
-			"mips64r2el"	: arch_mips64r2el,
-			"mips64r2el_n32"	: arch_mips64r2el_n32,
-			"mips64r2el_n64"	: arch_mips64r2el_n64,
+			"mipsel3"				: arch_mipsel3,
+			"mipsel3_n32"			: arch_mipsel3_n32,
+			"mipsel3_n64"			: arch_mipsel3_n64,
+			"mipsel3_multilib"		: arch_mipsel3_multilib,
+			"mipsel4"				: arch_mipsel4,
+			"mipsel4_n32"			: arch_mipsel4_n32,
+			"mipsel4_n64"			: arch_mipsel4_n64,
+			"mipsel4_multilib"		: arch_mipsel4_multilib,
+			"mips64el"				: arch_mips64el,
+			"mips64el_n32"			: arch_mips64el_n32,
+			"mips64el_n64"			: arch_mips64el_n64,
+			"mips64el_multilib"		: arch_mips64el_multilib,
+			"mips64r2el"			: arch_mips64r2el,
+			"mips64r2el_n32"		: arch_mips64r2el_n32,
+			"mips64r2el_n64"		: arch_mips64r2el_n64,
 			"mips64r2el_multilib"	: arch_mips64r2el_multilib,
-			"loongson2e"		: arch_loongson2e,
-			"loongson2e_n32"	: arch_loongson2e_n32,
-			"loongson2f"		: arch_loongson2f,
-			"loongson2f_n32"	: arch_loongson2f_n32,
+			"loongson2e"			: arch_loongson2e,
+			"loongson2e_n32"		: arch_loongson2e_n32,
+			"loongson2f"			: arch_loongson2f,
+			"loongson2f_n32"		: arch_loongson2f_n32,
 	}, ("mips","mips64"))

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     8f879050d2029758c2f0536d41fccbd422c8c020
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Fri Jan 27 16:00:24 2012 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Fri Jan 27 16:02:25 2012 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=8f879050

amd64.py: define CHOST for nocona and core2

Fixes: https://bugs.gentoo.org/show_bug.cgi?id=400829

---
 arch/amd64.py |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/amd64.py b/arch/amd64.py
index aaf587a..1697483 100644
--- a/arch/amd64.py
+++ b/arch/amd64.py
@@ -20,6 +20,7 @@ class arch_nocona(generic_amd64):
 	def __init__(self,myspec):
 		generic_amd64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=nocona -pipe"
+		self.settings["CHOST"]="x86_64-pc-linux-gnu"
 		self.settings["HOSTUSE"]=["mmx","sse","sse2"]
 
 # Requires gcc 4.3 to use this class
@@ -28,6 +29,7 @@ class arch_core2(generic_amd64):
 	def __init__(self,myspec):
 		generic_amd64.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=core2 -pipe"
+		self.settings["CHOST"]="x86_64-pc-linux-gnu"
 		self.settings["HOSTUSE"]=["mmx","sse","sse2","ssse3"]
 
 class arch_k8(generic_amd64):

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     335ab431340f720d1961209f563528bce050c301
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Mar 17 18:27:50 2012 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Mar 17 18:34:19 2012 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=335ab431

mips.py: add -mplt to non-n64 CFLAGS

---
 arch/mips.py |   86 +++++++++++++++++++++++++++++-----------------------------
 1 files changed, 43 insertions(+), 43 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 7ffc741..1d463f0 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -34,45 +34,45 @@ class arch_mips1(generic_mips):
 	"Builder class for MIPS I [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -mplt -pipe"
 
 class arch_mips32(generic_mips):
 	"Builder class for MIPS 32 [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -mplt -pipe"
 
 class arch_mips32_softfloat(generic_mips):
 	"Builder class for MIPS 32 [Big-endian softfloat]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -mplt -pipe"
 		self.settings["CHOST"]="mips-softfloat-linux-gnu"
 
 class arch_mips32r2(generic_mips):
 	"Builder class for MIPS 32r2 [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -mplt -pipe"
 
 class arch_mips32r2_softfloat(generic_mips):
 	"Builder class for MIPS 32r2 [Big-endian softfloat]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -mplt -pipe"
 		self.settings["CHOST"]="mips-softfloat-linux-gnu"
 
 class arch_mips3(generic_mips):
 	"Builder class for MIPS III [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -mplt -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n32(generic_mips64):
 	"Builder class for MIPS III [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -mplt -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n64(generic_mips64):
 	"Builder class for MIPS III [Big-endian N64]"
@@ -84,19 +84,19 @@ class arch_mips3_multilib(generic_mips64):
 	"Builder class for MIPS III [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips3 -mfix-r4000 -mfix-r4400 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mplt -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips4(generic_mips):
 	"Builder class for MIPS IV [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -mplt -pipe"
 
 class arch_mips4_n32(generic_mips64):
 	"Builder class for MIPS IV [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -mplt -pipe"
 
 class arch_mips4_n64(generic_mips64):
 	"Builder class for MIPS IV [Big-endian N64]"
@@ -108,19 +108,19 @@ class arch_mips4_multilib(generic_mips64):
 	"Builder class for MIPS IV [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips4 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mplt -pipe"
 
 class arch_mips4_r10k(generic_mips):
 	"Builder class for MIPS IV R10k [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=r10k -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=r10k -mabi=32 -mplt -pipe"
 
 class arch_mips4_r10k_n32(generic_mips64):
 	"Builder class for MIPS IV R10k [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=r10k -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=r10k -mabi=n32 -mplt -pipe"
 
 class arch_mips4_r10k_n64(generic_mips64):
 	"Builder class for MIPS IV R10k [Big-endian N64]"
@@ -132,19 +132,19 @@ class arch_mips4_r10k_multilib(generic_mips64):
 	"Builder class for MIPS IV R10k [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=r10k -pipe"
+		self.settings["CFLAGS"]="-O2 -march=r10k -mplt -pipe"
 
 class arch_mips64(generic_mips):
 	"Builder class for MIPS 64 [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -mplt -pipe"
 
 class arch_mips64_n32(generic_mips64):
 	"Builder class for MIPS 64 [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -mplt -pipe"
 
 class arch_mips64_n64(generic_mips64):
 	"Builder class for MIPS 64 [Big-endian N64]"
@@ -156,19 +156,19 @@ class arch_mips64_multilib(generic_mips64):
 	"Builder class for MIPS 64 [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mplt -pipe"
 
 class arch_mips64r2(generic_mips):
 	"Builder class for MIPS 64r2 [Big-endian]"
 	def __init__(self,myspec):
 		generic_mips.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -mplt -pipe"
 
 class arch_mips64r2_n32(generic_mips64):
 	"Builder class for MIPS 64r2 [Big-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -mplt -pipe"
 
 class arch_mips64r2_n64(generic_mips64):
 	"Builder class for MIPS 64r2 [Big-endian N64]"
@@ -180,51 +180,51 @@ class arch_mips64r2_multilib(generic_mips64):
 	"Builder class for MIPS 64r2 [Big-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mplt -pipe"
 
 class arch_mipsel1(generic_mipsel):
 	"Builder class for MIPS I [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -mplt -pipe"
 
 class arch_mips32el(generic_mipsel):
 	"Builder class for MIPS 32 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -mplt -pipe"
 
 class arch_mips32el_softfloat(generic_mipsel):
 	"Builder class for MIPS 32 [Little-endian softfloat]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -mplt -pipe"
 		self.settings["CHOST"]="mipsel-softfloat-linux-gnu"
 
 class arch_mips32r2el(generic_mipsel):
 	"Builder class for MIPS 32r2 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -mplt -pipe"
 
 class arch_mips32r2el_softfloat(generic_mipsel):
 	"Builder class for MIPS 32r2 [Little-endian softfloat]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -mplt -pipe"
 		self.settings["CHOST"]="mipsel-softfloat-linux-gnu"
 
 class arch_mipsel3(generic_mipsel):
 	"Builder class for MIPS III [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n32(generic_mips64el):
 	"Builder class for MIPS III [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n64(generic_mips64el):
 	"Builder class for MIPS III [Little-endian N64]"
@@ -236,43 +236,43 @@ class arch_mipsel3_multilib(generic_mips64el):
 	"Builder class for MIPS III [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips3 -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips3 -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2e(generic_mipsel):
 	"Builder class for Loongson 2E [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=32 -pipe -mplt"
+		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=32 -mplt -pipe"
 
 class arch_loongson2e_n32(generic_mips64el):
 	"Builder class for Loongson 2E [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -pipe -mplt"
+		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -mplt -pipe"
 
 class arch_loongson2f(generic_mipsel):
 	"Builder class for Loongson 2F [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
+		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2f_n32(generic_mips64el):
 	"Builder class for Loongson 2F [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
+		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel4(generic_mipsel):
 	"Builder class for MIPS IV [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -mplt -pipe"
 
 class arch_mipsel4_n32(generic_mips64el):
 	"Builder class for MIPS IV [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -mplt -pipe"
 
 class arch_mipsel4_n64(generic_mips64el):
 	"Builder class for MIPS IV [Little-endian N64]"
@@ -284,19 +284,19 @@ class arch_mipsel4_multilib(generic_mips64el):
 	"Builder class for MIPS IV [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips4 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips4 -mplt -pipe"
 
 class arch_mips64el(generic_mipsel):
 	"Builder class for MIPS 64 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -mplt -pipe"
 
 class arch_mips64el_n32(generic_mips64el):
 	"Builder class for MIPS 64 [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -mplt -pipe"
 
 class arch_mips64el_n64(generic_mips64el):
 	"Builder class for MIPS 64 [Little-endian N64]"
@@ -308,19 +308,19 @@ class arch_mips64el_multilib(generic_mips64el):
 	"Builder class for MIPS 64 [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64 -mplt -pipe"
 
 class arch_mips64r2el(generic_mipsel):
 	"Builder class for MIPS 64r2 [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -mplt -pipe"
 
 class arch_mips64r2el_n32(generic_mips64el):
 	"Builder class for MIPS 64r2 [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -mplt -pipe"
 
 class arch_mips64r2el_n64(generic_mips64el):
 	"Builder class for MIPS 64r2 [Little-endian N64]"
@@ -332,20 +332,20 @@ class arch_mips64r2el_multilib(generic_mips64el):
 	"Builder class for MIPS 64r2 [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=mips64r2 -mplt -pipe"
 
 class arch_cobalt(generic_mipsel):
 	"Builder class for cobalt [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=32 -mplt -pipe"
 		self.settings["HOSTUSE"]=["cobalt"]
 
 class arch_cobalt_n32(generic_mips64el):
 	"Builder class for cobalt [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -pipe"
+		self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -mplt -pipe"
 		self.settings["HOSTUSE"]=["cobalt"]
 
 def register():

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     bf0574264a9cc840cc640a0c0985919e71d6a1f3
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Mar 17 18:33:23 2012 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Mar 17 18:35:46 2012 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=bf057426

mips.py: add loongson2{e,f} n64 and multilib classes

---
 arch/mips.py |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 1d463f0..1dc163c 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -250,6 +250,18 @@ class arch_loongson2e_n32(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -mplt -pipe"
 
+class arch_loongson2e_n64(generic_mips64el):
+	"Builder class for Loongson 2E [Little-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=64 -pipe"
+
+class arch_loongson2e_multilib(generic_mips64el):
+	"Builder class for Loongson 2E [Little-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -march=loongson2e -mplt -pipe"
+
 class arch_loongson2f(generic_mipsel):
 	"Builder class for Loongson 2F [Little-endian]"
 	def __init__(self,myspec):
@@ -262,6 +274,18 @@ class arch_loongson2f_n32(generic_mips64el):
 		generic_mips64el.__init__(self,myspec)
 		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
+class arch_loongson2f_n64(generic_mips64el):
+	"Builder class for Loongson 2F [Little-endian N64]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
+
+class arch_loongson2f_multilib(generic_mips64el):
+	"Builder class for Loongson 2F [Little-endian multilib]"
+	def __init__(self,myspec):
+		generic_mips64el.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O3 -march=loongson2f -mplt -Wa,-mfix-loongson2f-nop -pipe"
+
 class arch_mipsel4(generic_mipsel):
 	"Builder class for MIPS IV [Little-endian]"
 	def __init__(self,myspec):
@@ -403,6 +427,10 @@ def register():
 			"mips64r2el_multilib"	: arch_mips64r2el_multilib,
 			"loongson2e"			: arch_loongson2e,
 			"loongson2e_n32"		: arch_loongson2e_n32,
+			"loongson2e_n64"		: arch_loongson2e_n64,
+			"loongson2e_multilib"	: arch_loongson2e_multilib,
 			"loongson2f"			: arch_loongson2f,
 			"loongson2f_n32"		: arch_loongson2f_n32,
+			"loongson2f_n64"		: arch_loongson2f_n64,
+			"loongson2f_multilib"	: arch_loongson2f_multilib,
 	}, ("mips","mips64"))

[gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/

[Matt Turner]

commit:     d77d4f1a5c2dbca3176e1f3e09469ba23e1be459
Author:     Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Mar 17 18:33:48 2012 +0000
Commit:     Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Mar 17 18:35:56 2012 +0000
URL:        http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=d77d4f1a

mips.py: change -O3 to -O2 in loongson2f classes

---
 arch/mips.py |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/mips.py b/arch/mips.py
index 1dc163c..6c20642 100644
--- a/arch/mips.py
+++ b/arch/mips.py
@@ -266,25 +266,25 @@ class arch_loongson2f(generic_mipsel):
 	"Builder class for Loongson 2F [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=loongson2f -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2f_n32(generic_mips64el):
 	"Builder class for Loongson 2F [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=loongson2f -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2f_n64(generic_mips64el):
 	"Builder class for Loongson 2F [Little-endian N64]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=loongson2f -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2f_multilib(generic_mips64el):
 	"Builder class for Loongson 2F [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["CFLAGS"]="-O3 -march=loongson2f -mplt -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["CFLAGS"]="-O2 -march=loongson2f -mplt -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel4(generic_mipsel):
 	"Builder class for MIPS IV [Little-endian]"