From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pigeon.gentoo.org ([208.92.234.80] helo=lists.gentoo.org) by finch.gentoo.org with esmtp (Exim 4.60) (envelope-from ) id 1QtXf1-0005xI-D5 for garchives@archives.gentoo.org; Wed, 17 Aug 2011 04:23:23 +0000 Received: from pigeon.gentoo.org (localhost [127.0.0.1]) by pigeon.gentoo.org (Postfix) with SMTP id 9665C21C2EE; Wed, 17 Aug 2011 04:23:04 +0000 (UTC) Received: from smtp.gentoo.org (smtp.gentoo.org [140.211.166.183]) by pigeon.gentoo.org (Postfix) with ESMTP id 444BD21C2EE for ; Wed, 17 Aug 2011 04:23:04 +0000 (UTC) Received: from pelican.gentoo.org (unknown [66.219.59.40]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 6978B1B4073 for ; Wed, 17 Aug 2011 04:23:03 +0000 (UTC) Received: from localhost.localdomain (localhost [127.0.0.1]) by pelican.gentoo.org (Postfix) with ESMTP id 7349A8004B for ; Wed, 17 Aug 2011 04:23:02 +0000 (UTC) From: "Matt Turner" To: gentoo-commits@lists.gentoo.org Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Matt Turner" Message-ID: <4f59e74e5266cb2b9bb1693036fc869973fd69ae.mattst88@gentoo> Subject: [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/ X-VCS-Repository: proj/catalyst X-VCS-Files: modules/catalyst/arch/mips.py X-VCS-Directories: modules/catalyst/arch/ X-VCS-Committer: mattst88 X-VCS-Committer-Name: Matt Turner X-VCS-Revision: 4f59e74e5266cb2b9bb1693036fc869973fd69ae Date: Wed, 17 Aug 2011 04:23:02 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: quoted-printable X-Archives-Salt: X-Archives-Hash: 01070b62c4b031fed9ccfd5da9d37b96 commit: 4f59e74e5266cb2b9bb1693036fc869973fd69ae Author: Matt Turner gmail com> AuthorDate: Wed Aug 17 04:09:58 2011 +0000 Commit: Matt Turner gmail com> CommitDate: Wed Aug 17 04:09:58 2011 +0000 URL: http://git.overlays.gentoo.org/gitweb/?p=3Dproj/catalyst.git;= a=3Dcommit;h=3D4f59e74e mips.py: add mips32r2 and mips64r2 builder classes --- modules/catalyst/arch/mips.py | 70 +++++++++++++++++++++++++++++++++++= ++++++ 1 files changed, 70 insertions(+), 0 deletions(-) diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.p= y index 4b05551..f042af4 100644 --- a/modules/catalyst/arch/mips.py +++ b/modules/catalyst/arch/mips.py @@ -41,6 +41,12 @@ class arch_mips32(generic_mips): generic_mips.__init__(self,myspec) self.settings["CFLAGS"]=3D"-O2 -march=3Dmips32 -mabi=3D32 -pipe" =20 +class arch_mips32r2(generic_mips): + "Builder class for MIPS 32r2 [Big-endian]" + def __init__(self,myspec): + generic_mips.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips32r2 -mabi=3D32 -pipe" + class arch_mips3(generic_mips): "Builder class for MIPS III [Big-endian]" def __init__(self,myspec): @@ -113,6 +119,30 @@ class arch_mips64_multilib(generic_mips64): generic_mips64.__init__(self,myspec) self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64 -pipe" =20 +class arch_mips64r2(generic_mips): + "Builder class for MIPS 64r2 [Big-endian]" + def __init__(self,myspec): + generic_mips.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64r2 -mabi=3D32 -pipe" + +class arch_mips64r2_n32(generic_mips64): + "Builder class for MIPS 64r2 [Big-endian N32]" + def __init__(self,myspec): + generic_mips64.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64r2 -mabi=3Dn32 -pipe" + +class arch_mips64r2_n64(generic_mips64): + "Builder class for MIPS 64r2 [Big-endian N64]" + def __init__(self,myspec): + generic_mips64.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64r2 -mabi=3D64 -pipe" + +class arch_mips64r2_multilib(generic_mips64): + "Builder class for MIPS 64r2 [Big-endian multilib]" + def __init__(self,myspec): + generic_mips64.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64r2 -pipe" + class arch_mipsel1(generic_mipsel): "Builder class for all MIPS I [Little-endian]" def __init__(self,myspec): @@ -125,6 +155,12 @@ class arch_mips32el(generic_mipsel): generic_mipsel.__init__(self,myspec) self.settings["CFLAGS"]=3D"-O2 -march=3Dmips32 -mabi=3D32 -pipe" =20 +class arch_mips32r2el(generic_mipsel): + "Builder class for all MIPS 32r2 [Little-endian]" + def __init__(self,myspec): + generic_mipsel.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips32r2 -mabi=3D32 -pipe" + class arch_mipsel3(generic_mipsel): "Builder class for all MIPS III [Little-endian]" def __init__(self,myspec): @@ -221,6 +257,30 @@ class arch_mips64el_multilib(generic_mips64el): generic_mips64el.__init__(self,myspec) self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64 -pipe" =20 +class arch_mips64r2el(generic_mipsel): + "Builder class for all MIPS 64r2 [Little-endian]" + def __init__(self,myspec): + generic_mipsel.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64r2 -mabi=3D32 -pipe" + +class arch_mips64r2el_n32(generic_mips64el): + "Builder class for all MIPS 64r2 [Little-endian N32]" + def __init__(self,myspec): + generic_mips64el.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64r2 -mabi=3Dn32 -pipe" + +class arch_mips64r2el_n64(generic_mips64el): + "Builder class for MIPS 64r2 [Little-endian N64]" + def __init__(self,myspec): + generic_mips64el.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64r2 -mabi=3D64 -pipe" + +class arch_mips64r2el_multilib(generic_mips64el): + "Builder class for MIPS 64r2 [Little-endian multilib]" + def __init__(self,myspec): + generic_mips64el.__init__(self,myspec) + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips64r2 -pipe" + class arch_cobalt(generic_mipsel): "Builder class for all cobalt [Little-endian]" def __init__(self,myspec): @@ -241,6 +301,7 @@ _subarch_map =3D { "mips" : arch_mips1, "mips1" : arch_mips1, "mips32" : arch_mips32, + "mips32r2" : arch_mips32r2, "mips3" : arch_mips3, "mips3_n32" : arch_mips3_n32, "mips3_n64" : arch_mips3_n64, @@ -253,9 +314,14 @@ _subarch_map =3D { "mips64_n32" : arch_mips64_n32, "mips64_n64" : arch_mips64_n64, "mips64_multilib" : arch_mips64_multilib, + "mips64r2" : arch_mips64r2, + "mips64r2_n32" : arch_mips64r2_n32, + "mips64r2_n64" : arch_mips64r2_n64, + "mips64r2_multilib" : arch_mips64r2_multilib, "mipsel" : arch_mipsel1, "mipsel1" : arch_mipsel1, "mips32el" : arch_mips32el, + "mips32r2el" : arch_mips32r2el, "mipsel3" : arch_mipsel3, "mipsel3_n32" : arch_mipsel3_n32, "mipsel3_n64" : arch_mipsel3_n64, @@ -268,6 +334,10 @@ _subarch_map =3D { "mips64el_n32" : arch_mips64el_n32, "mips64el_n64" : arch_mips64el_n64, "mips64el_multilib" : arch_mips64el_multilib, + "mips64r2el" : arch_mips64r2el, + "mips64r2el_n32" : arch_mips64r2el_n32, + "mips64r2el_n64" : arch_mips64r2el_n64, + "mips64r2el_multilib" : arch_mips64r2el_multilib, "loongson2e" : arch_loongson2e, "loongson2e_n32" : arch_loongson2e_n32, "loongson2f" : arch_loongson2f,