From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pigeon.gentoo.org ([208.92.234.80] helo=lists.gentoo.org) by finch.gentoo.org with esmtp (Exim 4.60) (envelope-from ) id 1Qzeu8-0005rT-Ku for garchives@archives.gentoo.org; Sat, 03 Sep 2011 01:20:16 +0000 Received: from pigeon.gentoo.org (localhost [127.0.0.1]) by pigeon.gentoo.org (Postfix) with SMTP id 3FD4921C036; Sat, 3 Sep 2011 01:20:09 +0000 (UTC) Received: from smtp.gentoo.org (smtp.gentoo.org [140.211.166.183]) by pigeon.gentoo.org (Postfix) with ESMTP id F2B6C21C036 for ; Sat, 3 Sep 2011 01:20:08 +0000 (UTC) Received: from pelican.gentoo.org (unknown [66.219.59.40]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 4A5751B402E for ; Sat, 3 Sep 2011 01:20:08 +0000 (UTC) Received: from localhost.localdomain (localhost [127.0.0.1]) by pelican.gentoo.org (Postfix) with ESMTP id 31BFA80042 for ; Sat, 3 Sep 2011 01:20:07 +0000 (UTC) From: "Matt Turner" To: gentoo-commits@lists.gentoo.org Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Matt Turner" Message-ID: <18abbdf41a0d5df009b509eb4a60d3f812d45236.mattst88@gentoo> Subject: [gentoo-commits] proj/catalyst:catalyst_2 commit in: arch/ X-VCS-Repository: proj/catalyst X-VCS-Files: arch/mips.py X-VCS-Directories: arch/ X-VCS-Committer: mattst88 X-VCS-Committer-Name: Matt Turner X-VCS-Revision: 18abbdf41a0d5df009b509eb4a60d3f812d45236 Date: Sat, 3 Sep 2011 01:20:07 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: quoted-printable X-Archives-Salt: X-Archives-Hash: bdb47d65f3443bda542d70e76c5be033 commit: 18abbdf41a0d5df009b509eb4a60d3f812d45236 Author: Matt Turner gmail com> AuthorDate: Sat Sep 3 01:19:19 2011 +0000 Commit: Matt Turner gmail com> CommitDate: Sat Sep 3 01:19:19 2011 +0000 URL: http://git.overlays.gentoo.org/gitweb/?p=3Dproj/catalyst.git;= a=3Dcommit;h=3D18abbdf4 mips.py: replace -mips* with new -march=3Dmips* --- arch/mips.py | 36 ++++++++++++++++++------------------ 1 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/mips.py b/arch/mips.py index 9e26c9c..a0f0fed 100644 --- a/arch/mips.py +++ b/arch/mips.py @@ -34,7 +34,7 @@ class arch_mips1(generic_mips): "Builder class for MIPS I [Big-endian]" def __init__(self,myspec): generic_mips.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips1 -mabi=3D32 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips1 -mabi=3D32 -pipe" =20 class arch_mips32(generic_mips): "Builder class for MIPS 32 [Big-endian]" @@ -52,49 +52,49 @@ class arch_mips3(generic_mips): "Builder class for MIPS III [Big-endian]" def __init__(self,myspec): generic_mips.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips3 -mabi=3D32 -mfix-r4000 -mfix-r44= 00 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips3 -mabi=3D32 -mfix-r4000 -= mfix-r4400 -pipe" =20 class arch_mips3_n32(generic_mips64): "Builder class for MIPS III [Big-endian N32]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips3 -mabi=3Dn32 -mfix-r4000 -mfix-r4= 400 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips3 -mabi=3Dn32 -mfix-r4000 = -mfix-r4400 -pipe" =20 class arch_mips3_n64(generic_mips64): "Builder class for MIPS III [Big-endian N64]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips3 -mabi=3D64 -mfix-r4000 -mfix-r44= 00 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips3 -mabi=3D64 -mfix-r4000 -= mfix-r4400 -pipe" =20 class arch_mips3_multilib(generic_mips64): "Builder class for MIPS III [Big-endian multilib]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips3 -mfix-r4000 -mfix-r4400 = -pipe" =20 class arch_mips4(generic_mips): "Builder class for MIPS IV [Big-endian]" def __init__(self,myspec): generic_mips.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips4 -mabi=3D32 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips4 -mabi=3D32 -pipe" =20 class arch_mips4_n32(generic_mips64): "Builder class for MIPS IV [Big-endian N32]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips4 -mabi=3Dn32 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips4 -mabi=3Dn32 -pipe" =20 class arch_mips4_n64(generic_mips64): "Builder class for MIPS IV [Big-endian N64]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips4 -mabi=3D64 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips4 -mabi=3D64 -pipe" =20 class arch_mips4_multilib(generic_mips64): "Builder class for MIPS IV [Big-endian multilib]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips4 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips4 -pipe" =20 class arch_mips4_r10k(generic_mips): "Builder class for MIPS IV R10k [Big-endian]" @@ -172,7 +172,7 @@ class arch_mipsel1(generic_mipsel): "Builder class for MIPS I [Little-endian]" def __init__(self,myspec): generic_mipsel.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips1 -mabi=3D32 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips1 -mabi=3D32 -pipe" =20 class arch_mips32el(generic_mipsel): "Builder class for MIPS 32 [Little-endian]" @@ -190,25 +190,25 @@ class arch_mipsel3(generic_mipsel): "Builder class for MIPS III [Little-endian]" def __init__(self,myspec): generic_mipsel.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips3 -mabi=3D32 -Wa,-mfix-loongson2f-= nop -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips3 -mabi=3D32 -Wa,-mfix-loo= ngson2f-nop -pipe" =20 class arch_mipsel3_n32(generic_mips64el): "Builder class for MIPS III [Little-endian N32]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips3 -mabi=3Dn32 -Wa,-mfix-loongson2f= -nop -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips3 -mabi=3Dn32 -Wa,-mfix-lo= ongson2f-nop -pipe" =20 class arch_mipsel3_n64(generic_mips64el): "Builder class for MIPS III [Little-endian N64]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips3 -mabi=3D64 -Wa,-mfix-loongson2f-= nop -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips3 -mabi=3D64 -Wa,-mfix-loo= ngson2f-nop -pipe" =20 class arch_mipsel3_multilib(generic_mips64el): "Builder class for MIPS III [Little-endian multilib]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips3 -Wa,-mfix-loongson2f-nop= -pipe" =20 class arch_loongson2e(generic_mipsel): "Builder class for Loongson 2E [Little-endian]" @@ -238,25 +238,25 @@ class arch_mipsel4(generic_mipsel): "Builder class for MIPS IV [Little-endian]" def __init__(self,myspec): generic_mipsel.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips4 -mabi=3D32 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips4 -mabi=3D32 -pipe" =20 class arch_mipsel4_n32(generic_mips64el): "Builder class for MIPS IV [Little-endian N32]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips4 -mabi=3Dn32 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips4 -mabi=3Dn32 -pipe" =20 class arch_mipsel4_n64(generic_mips64el): "Builder class for MIPS IV [Little-endian N64]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips4 -mabi=3D64 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips4 -mabi=3D64 -pipe" =20 class arch_mipsel4_multilib(generic_mips64el): "Builder class for MIPS IV [Little-endian multilib]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) - self.settings["CFLAGS"]=3D"-O2 -mips4 -pipe" + self.settings["CFLAGS"]=3D"-O2 -march=3Dmips4 -pipe" =20 class arch_mips64el(generic_mipsel): "Builder class for MIPS 64 [Little-endian]"