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Mon, 2 Sep 2024 17:52:27 +0000 (UTC) Received: from localhost.localdomain (localhost [IPv6:::1]) by oystercatcher.gentoo.org (Postfix) with ESMTP id 73A8BBB4 for ; Mon, 2 Sep 2024 17:52:26 +0000 (UTC) From: "Matt Turner" To: gentoo-commits@lists.gentoo.org Content-Transfer-Encoding: 8bit Content-type: text/plain; charset=UTF-8 Reply-To: gentoo-dev@lists.gentoo.org, "Matt Turner" Message-ID: <1725299538.74c2b4d56ad1e7b2407e96a6a1f64196863d1971.mattst88@gentoo> Subject: [gentoo-commits] repo/gentoo:master commit in: dev-util/intel_clc/ X-VCS-Repository: repo/gentoo X-VCS-Files: dev-util/intel_clc/Manifest dev-util/intel_clc/intel_clc-24.2.1.ebuild X-VCS-Directories: dev-util/intel_clc/ X-VCS-Committer: mattst88 X-VCS-Committer-Name: Matt Turner X-VCS-Revision: 74c2b4d56ad1e7b2407e96a6a1f64196863d1971 X-VCS-Branch: master Date: Mon, 2 Sep 2024 17:52:26 +0000 (UTC) Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-Id: Gentoo Linux mail X-BeenThere: gentoo-commits@lists.gentoo.org X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-Archives-Salt: 2afb9016-b67a-49e8-8f85-6a7dc6281ec1 X-Archives-Hash: 4fee83805d4c0e460fcc37956dcd384d commit: 74c2b4d56ad1e7b2407e96a6a1f64196863d1971 Author: Matt Turner gentoo org> AuthorDate: Mon Sep 2 17:18:42 2024 +0000 Commit: Matt Turner gentoo org> CommitDate: Mon Sep 2 17:52:18 2024 +0000 URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=74c2b4d5 dev-util/intel_clc: Version bump to 24.2.1 Signed-off-by: Matt Turner gentoo.org> dev-util/intel_clc/Manifest | 1 + dev-util/intel_clc/intel_clc-24.2.1.ebuild | 93 ++++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+) diff --git a/dev-util/intel_clc/Manifest b/dev-util/intel_clc/Manifest index 099315026706..cc41e3896dda 100644 --- a/dev-util/intel_clc/Manifest +++ b/dev-util/intel_clc/Manifest @@ -5,3 +5,4 @@ DIST mesa-24.1.5.tar.xz 29140156 BLAKE2B ea29b3b8b6f178dd21d7ee3042ea829755e398f DIST mesa-24.1.6.tar.xz 29172600 BLAKE2B 295634438e1a2ae64bd1c5b0309a253e72a4d95e559cabad72f94aa2b91e5b05179c69cce5e371b69707419399dae0bfe808cb16b2e9ee112277e18b8f0f31f9 SHA512 2df0c78126f34a9ab7ce4946ed9fcd58d828717ecfd93681d9e136e605e9a8e01428dd632c0125e06d805498ffd75250f0e617f47fbb7e6368e6c8a48f4c4dfc DIST mesa-24.2.0-rc4.tar.xz 29324360 BLAKE2B da26f43fa3e940a406e4987ed311fd22fc7608d4e09fc6cfd6584fe8873b8c5fdbf51d5f32042c46a883739cd22204a3dde2a0a1d6283c3453bc635bfba24ed5 SHA512 5a0b9043e8c3222faeaad31f435f3ea440d670ffa5497340c5809666a857fa4c77288745d52372a2267e9f9be97fc04e0d20b81bc027c1b7a33176a3bfa6b3c6 DIST mesa-24.2.0.tar.xz 29342732 BLAKE2B dfbd0e5b8de3db475f40a8313ee3013bb513d505541e056efd84aad50d5043414dd2c0b95e6c7336a1b4d29037274dae2fa1fdb9697187bf239a5adb54dd3721 SHA512 a585c788801b5a341d356e44d958b148e6e14f6b3d7224e99a92faa2f004bf0cfc90103c5fdc651afb22f805c6f9dc594f9f3f5ecebcea36f6305b3a6ccb9294 +DIST mesa-24.2.1.tar.xz 29431192 BLAKE2B f4ef9fd08bbf16551498a8edce1e19e594a0b85ee1f05f8f7c80fcf12ec7ac4cb5947b713791f5202201f8cfc48773507d869dbd239e6fc3dcf2c3a621892327 SHA512 3b77e5faec51b67583131123b0cc010b52325ea308e4075323102aa999d9c9fbb65b873eb537ed4f577b5a0811e7f096e7e101510cb50326ea5c439b4b468380 diff --git a/dev-util/intel_clc/intel_clc-24.2.1.ebuild b/dev-util/intel_clc/intel_clc-24.2.1.ebuild new file mode 100644 index 000000000000..4acbe36c77e0 --- /dev/null +++ b/dev-util/intel_clc/intel_clc-24.2.1.ebuild @@ -0,0 +1,93 @@ +# Copyright 2023-2024 Gentoo Authors +# Distributed under the terms of the GNU General Public License v2 + +EAPI=8 + +LLVM_COMPAT=( {16..18} ) +PYTHON_COMPAT=( python3_{10..13} ) + +inherit llvm-r1 meson python-any-r1 + +MY_PV="${PV/_/-}" + +DESCRIPTION="intel_clc tool used for building OpenCL C to SPIR-V" +HOMEPAGE="https://mesa3d.org/" + +if [[ ${PV} == 9999 ]]; then + S="${WORKDIR}/intel_clc-${MY_PV}" + EGIT_REPO_URI="https://gitlab.freedesktop.org/mesa/mesa.git" + inherit git-r3 +else + S="${WORKDIR}/mesa-${MY_PV}" + SRC_URI="https://archive.mesa3d.org/mesa-${MY_PV}.tar.xz" + KEYWORDS="~amd64 ~x86" +fi + +LICENSE="MIT SGI-B-2.0" +SLOT="0" +IUSE="debug" + +RDEPEND=" + dev-libs/libclc + dev-util/spirv-tools + >=sys-libs/zlib-1.2.8:= + x11-libs/libdrm + $(llvm_gen_dep ' + dev-util/spirv-llvm-translator:${LLVM_SLOT} + sys-devel/clang:${LLVM_SLOT} + sys-devel/llvm:${LLVM_SLOT} + ') +" +DEPEND="${RDEPEND} + dev-libs/expat +" +BDEPEND=" + ${PYTHON_DEPS} + $(python_gen_any_dep " + >=dev-python/mako-0.8.0[\${PYTHON_USEDEP}] + dev-python/packaging[\${PYTHON_USEDEP}] + dev-python/pyyaml[\${PYTHON_USEDEP}] + ") + virtual/pkgconfig +" + +python_check_deps() { + python_has_version -b ">=dev-python/mako-0.8.0[${PYTHON_USEDEP}]" && + python_has_version -b "dev-python/packaging[${PYTHON_USEDEP}]" && + python_has_version -b "dev-python/pyyaml[${PYTHON_USEDEP}]" || return 1 +} + +pkg_setup() { + llvm-r1_pkg_setup + python-any-r1_pkg_setup +} + +src_configure() { + PKG_CONFIG_PATH="$(get_llvm_prefix)/$(get_libdir)/pkgconfig" + + use debug && EMESON_BUILDTYPE=debug + + local emesonargs=( + -Dllvm=enabled + -Dshared-llvm=enabled + -Dintel-clc=enabled + + -Dgallium-drivers='' + -Dvulkan-drivers='' + + # Set platforms empty to avoid the default "auto" setting. If + # platforms is empty meson.build will add surfaceless. + -Dplatforms='' + + -Dglx=disabled + -Dlibunwind=disabled + -Dzstd=disabled + + -Db_ndebug=$(usex debug false true) + ) + meson_src_configure +} + +src_install() { + dobin "${BUILD_DIR}"/src/intel/compiler/intel_clc +}