[gentoo-commits] proj/gcc-patches:master commit in: 15.0.0/gentoo/

["Sam James" <sam@gentoo.org>]

commit:     b6fdeaf382dd20760fc3baf1ca9ff3db9f58c14d
Author:     Sam James <sam <AT> gentoo <DOT> org>
AuthorDate: Mon Aug 26 06:23:04 2024 +0000
Commit:     Sam James <sam <AT> gentoo <DOT> org>
CommitDate: Mon Aug 26 06:23:13 2024 +0000
URL:        https://gitweb.gentoo.org/proj/gcc-patches.git/commit/?id=b6fdeaf3

15.0.0: cut 11 patchset, add two patches

* Add an ICE fix for vectorization (PR116348)
* Fix bootstrap on x86 w/ debug info (PR116470)

Bug: https://gcc.gnu.org/PR116348
Bug: https://gcc.gnu.org/PR116470
Signed-off-by: Sam James <sam <AT> gentoo.org>

 .../gentoo/32_all_PR116470-debug-bootstrap.patch   | 78 ++++++++++++++++++++++
 15.0.0/gentoo/33_all_PR116348-vect.patch           | 78 ++++++++++++++++++++++
 15.0.0/gentoo/README.history                       |  4 +-
 3 files changed, 159 insertions(+), 1 deletion(-)

diff --git a/15.0.0/gentoo/32_all_PR116470-debug-bootstrap.patch b/15.0.0/gentoo/32_all_PR116470-debug-bootstrap.patch
new file mode 100644
index 0000000..613cf4c
--- /dev/null
+++ b/15.0.0/gentoo/32_all_PR116470-debug-bootstrap.patch
@@ -0,0 +1,78 @@
+https://gcc.gnu.org/PR116470
+https://inbox.sourceware.org/gcc-patches/AS1PR01MB946587924CF9EFA4950ECBAFE48B2@AS1PR01MB9465.eurprd01.prod.exchangelabs.com/
+
+From 9c7050effd98d868d59fbd5ec7eeff1160eb05b8 Mon Sep 17 00:00:00 2001
+Message-ID: <9c7050effd98d868d59fbd5ec7eeff1160eb05b8.1724653254.git.sam@gentoo.org>
+From: Bernd Edlinger <bernd.edlinger@hotmail.de>
+Date: Mon, 26 Aug 2024 05:46:16 +0200
+Subject: [PATCH] Fix bootstap-errors due to enabling -gvariable-location-views
+
+This recent change triggered various bootsteap-errors, mostly on
+x86 targets because line info advance address entries were output
+in the wrong section table.
+The switch to the wrong line table happened in dwarfout_set_ignored_loc.
+It must use the same section as the earlier called
+dwarf2out_switch_text_section.
+
+But also ft32-elf was affected, because the assembler choked on
+something simple as ".2byte .LM2-.LM1", but fortunately it is
+able to use native location views, the configure test was just
+not executed because the ft32 "nop" instruction was missing.
+
+gcc/ChangeLog:
+
+PR debug/116470
+	* configure.ac: Add the "nop" instruction for cpu type ft32.
+	* configure: Regenerate.
+	* dwarf2out.cc (dwarf2out_set_ignored_loc): Use the correct
+	line info section.
+---
+ gcc/configure    | 2 +-
+ gcc/configure.ac | 2 +-
+ gcc/dwarf2out.cc | 2 +-
+ 3 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/gcc/configure b/gcc/configure
+index 557ea5fa3ac9..3d301b6ecd3d 100755
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -31398,7 +31398,7 @@ esac
+ case "$cpu_type" in
+   aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | loongarch | m32c \
+   | m68k | microblaze | mips | nds32 | nios2 | pa | riscv | rs6000 | score | sparc \
+-  | visium | xstormy16 | xtensa)
++  | visium | xstormy16 | xtensa | ft32)
+     insn="nop"
+     ;;
+   ia64 | s390)
+diff --git a/gcc/configure.ac b/gcc/configure.ac
+index eaa01d0d7e56..8a2d2b0438e7 100644
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -5610,7 +5610,7 @@ esac
+ case "$cpu_type" in
+   aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | loongarch | m32c \
+   | m68k | microblaze | mips | nds32 | nios2 | pa | riscv | rs6000 | score | sparc \
+-  | visium | xstormy16 | xtensa)
++  | visium | xstormy16 | xtensa | ft32)
+     insn="nop"
+     ;;
+   ia64 | s390)
+diff --git a/gcc/dwarf2out.cc b/gcc/dwarf2out.cc
+index 633900b035fe..3f040da33a63 100644
+--- a/gcc/dwarf2out.cc
++++ b/gcc/dwarf2out.cc
+@@ -28939,7 +28939,7 @@ dwarf2out_set_ignored_loc (unsigned int line, unsigned int column,
+   dw_fde_ref fde = cfun->fde;
+ 
+   fde->ignored_debug = false;
+-  set_cur_line_info_table (function_section (fde->decl));
++  set_cur_line_info_table (current_function_section ());
+ 
+   dwarf2out_source_line (line, column, filename, 0, true);
+ }
+
+base-commit: b4ac2c23d8745d98984954e88f02aa73f1c3594b
+-- 
+2.46.0
+

diff --git a/15.0.0/gentoo/33_all_PR116348-vect.patch b/15.0.0/gentoo/33_all_PR116348-vect.patch
new file mode 100644
index 0000000..623ce34
--- /dev/null
+++ b/15.0.0/gentoo/33_all_PR116348-vect.patch
@@ -0,0 +1,78 @@
+https://gcc.gnu.org/PR116348
+https://inbox.sourceware.org/gcc-patches/20240825185348.37025-1-xry111@xry111.site/T/#u
+
+From cc68092ef1bb1134f6d8ddf0281323658a4358ae Mon Sep 17 00:00:00 2001
+Message-ID: <cc68092ef1bb1134f6d8ddf0281323658a4358ae.1724653336.git.sam@gentoo.org>
+From: Xi Ruoyao <xry111@xry111.site>
+Date: Mon, 26 Aug 2024 02:53:13 +0800
+Subject: [PATCH] vect: Fix STMT_VINFO_DEF_TYPE check for odd/even widen mult
+ [PR116348]
+
+After fixing PR116142 some code started to trigger an ICE with -O3
+-march=znver4.  Per Richard Biener who actually made this fix:
+
+"supportable_widening_operation fails at transform time - that's likely
+because vectorizable_reduction "puns" defs to internal_def"
+
+so the check should use STMT_VINFO_REDUC_DEF instead of checking if
+STMT_VINFO_DEF_TYPE is vect_reduction_def.
+
+gcc/ChangeLog:
+
+	PR tree-optimization/PR116348
+	* tree-vect-stmts.cc (supportable_widening_operation): Use
+	STMT_VINFO_REDUC_DEF (x) instead of
+	STMT_VINFO_DEF_TYPE (x) == vect_reduction_def.
+
+gcc/testsuite/ChangeLog:
+
+	PR tree-optimization/PR116348
+	* gcc.c-torture/compile/pr116438.c: New test.
+
+Co-authored-by: Richard Biener <rguenther@suse.de>
+---
+ gcc/testsuite/gcc.c-torture/compile/pr116438.c | 14 ++++++++++++++
+ gcc/tree-vect-stmts.cc                         |  3 +--
+ 2 files changed, 15 insertions(+), 2 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr116438.c
+
+diff --git a/gcc/testsuite/gcc.c-torture/compile/pr116438.c b/gcc/testsuite/gcc.c-torture/compile/pr116438.c
+new file mode 100644
+index 000000000000..97ab0181ab8b
+--- /dev/null
++++ b/gcc/testsuite/gcc.c-torture/compile/pr116438.c
+@@ -0,0 +1,14 @@
++/* { dg-additional-options "-march=znver4" { target x86_64-*-* i?86-*-* } } */
++
++int *a;
++int b;
++long long c, d;
++void
++e (int f)
++{
++  for (; f; f++)
++    {
++      d += (long long)a[f] * b;
++      c += (long long)a[f] * 3;
++    }
++}
+diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
+index 385e63163c24..9eb73a599339 100644
+--- a/gcc/tree-vect-stmts.cc
++++ b/gcc/tree-vect-stmts.cc
+@@ -14193,8 +14193,7 @@ supportable_widening_operation (vec_info *vinfo,
+              by STMT is only directly used in the reduction statement.  */
+ 	  tree lhs = gimple_assign_lhs (vect_orig_stmt (stmt_info)->stmt);
+ 	  stmt_vec_info use_stmt_info = loop_info->lookup_single_use (lhs);
+-	  if (use_stmt_info
+-	      && STMT_VINFO_DEF_TYPE (use_stmt_info) == vect_reduction_def)
++	  if (use_stmt_info && STMT_VINFO_REDUC_DEF (use_stmt_info))
+ 	    return true;
+         }
+       c1 = VEC_WIDEN_MULT_LO_EXPR;
+
+base-commit: b4ac2c23d8745d98984954e88f02aa73f1c3594b
+prerequisite-patch-id: 743f4e4444f9cac24e67abce2bda52d6a421d870
+-- 
+2.46.0
+

diff --git a/15.0.0/gentoo/README.history b/15.0.0/gentoo/README.history
index 76096c4..728080e 100644
--- a/15.0.0/gentoo/README.history
+++ b/15.0.0/gentoo/README.history
@@ -1,8 +1,10 @@
-11	????
+11	26 August 2024
 
 	- 32_all_phi-opt-Fix-for-non-const-functions-for-factor_out_c.patch
 	- 33_all_phiopt-Reject-non-gimple-val-inside-factor_out_condi.patch
 	+ 09_all_esysroot.patch
+	+ 32_all_PR116470-debug-bootstrap.patch
+	+ 33_all_PR116348-vect.patch
 
 10	19 August 2024