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From: "Matt Turner" <mattst88@gentoo.org>
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Subject: [gentoo-commits] repo/gentoo:master commit in: dev-util/intel_clc/
X-VCS-Repository: repo/gentoo
X-VCS-Files: dev-util/intel_clc/Manifest dev-util/intel_clc/intel_clc-24.1.3.ebuild
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X-VCS-Committer-Name: Matt Turner
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Date: Mon,  8 Jul 2024 16:56:42 +0000 (UTC)
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commit:     cda08d50d9aafea8678bb4cb40b210113a03d0ce
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Mon Jul  8 14:53:07 2024 +0000
Commit:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
CommitDate: Mon Jul  8 16:56:38 2024 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=cda08d50

dev-util/intel_clc: Version bump to 24.1.3

Signed-off-by: Matt Turner <mattst88 <AT> gentoo.org>

 dev-util/intel_clc/Manifest                |  1 +
 dev-util/intel_clc/intel_clc-24.1.3.ebuild | 87 ++++++++++++++++++++++++++++++
 2 files changed, 88 insertions(+)

diff --git a/dev-util/intel_clc/Manifest b/dev-util/intel_clc/Manifest
index 4a4de2d7b5b3..f81f8c2fb8da 100644
--- a/dev-util/intel_clc/Manifest
+++ b/dev-util/intel_clc/Manifest
@@ -1,3 +1,4 @@
 DIST mesa-24.0.9.tar.xz 20197892 BLAKE2B 3c68e544898031fe76a57ea754f46ede5b105c259d13dd484eaa63fe51b7d52cf76a4084529b11a586c4d8d06f4cb32f993fd1ea4e6ccc4cbc91e78fe755743a SHA512 de2ee6c9df1fc106ee10befe0a76be1e9cfe83d65dbdb83bad6d8d7cfaa085232fb115293a1a790b37b50b1fe14bd58aafbcfe5a15e953b5901a7105d57569a5
 DIST mesa-24.1.1.tar.xz 29019256 BLAKE2B 152ce5f4847a321689bf4aa88529963278f7dd24097c4c3de2b3a9164d06cd23d7cccd96bd31fea88311ded576c834a73e2d669e6d290404283f33f92b9bf262 SHA512 a23fc2fe479f21027095a7791042148586b23da848474209ca4fecfe5c4d499e66fff0ebfa06d07ed9f16b5d6a2ef755b362cb6079141aff5fdc47cc571e3b1d
 DIST mesa-24.1.2.tar.xz 29057184 BLAKE2B 8c66d22101c516b8f9323fcfd92bc242a9d6133a65611cd8b5616eeed9f9825423ecd696a1bbe80832d9d6c1b3b14b34fb54bbe13527ac41af6d0d00a10126f2 SHA512 ea28540552f9f28200c22423afcf9d9bb961557eae0dc11416c5ef60788c3e7f6d2b841c6bdbe2827d1339ea9d854623c1a0e08d4f1fd79d304fcdd52f790637
+DIST mesa-24.1.3.tar.xz 29086488 BLAKE2B 2e8e4ee98f904aa02f304a6c3cbbb81d04802203e270e6b8ad2b7a62b334ac28f5e91687d7a92501f66b0043255a533d024537ff5ef3f2f03d986e46a7272eeb SHA512 db4071ac80747397023762d6e0355b001f4e942cdc706c67f8aced80e162058667c02a0dc0804a45afc2656cb65d8b16e17148bc03f0a1692067ec170f193c1a

diff --git a/dev-util/intel_clc/intel_clc-24.1.3.ebuild b/dev-util/intel_clc/intel_clc-24.1.3.ebuild
new file mode 100644
index 000000000000..df38191345d0
--- /dev/null
+++ b/dev-util/intel_clc/intel_clc-24.1.3.ebuild
@@ -0,0 +1,87 @@
+# Copyright 2023-2024 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+LLVM_COMPAT=( {16..18} )
+PYTHON_COMPAT=( python3_{10..12} )
+
+inherit llvm-r1 meson python-any-r1
+
+MY_PV="${PV/_/-}"
+
+DESCRIPTION="intel_clc tool used for building OpenCL C to SPIR-V"
+HOMEPAGE="https://mesa3d.org/"
+
+if [[ ${PV} == 9999 ]]; then
+	S="${WORKDIR}/intel_clc-${MY_PV}"
+	EGIT_REPO_URI="https://gitlab.freedesktop.org/mesa/mesa.git"
+	inherit git-r3
+else
+	S="${WORKDIR}/mesa-${MY_PV}"
+	SRC_URI="https://archive.mesa3d.org/mesa-${MY_PV}.tar.xz"
+	KEYWORDS="~amd64 ~x86"
+fi
+
+LICENSE="MIT SGI-B-2.0"
+SLOT="0"
+IUSE="debug"
+
+RDEPEND="
+	dev-libs/libclc
+	dev-util/spirv-tools
+	>=sys-libs/zlib-1.2.8:=
+	x11-libs/libdrm
+	$(llvm_gen_dep '
+		dev-util/spirv-llvm-translator:${LLVM_SLOT}
+		sys-devel/clang:${LLVM_SLOT}
+		sys-devel/llvm:${LLVM_SLOT}
+	')
+"
+DEPEND="${RDEPEND}
+	dev-libs/expat
+"
+BDEPEND="
+	${PYTHON_DEPS}
+	$(python_gen_any_dep ">=dev-python/mako-0.8.0[\${PYTHON_USEDEP}]")
+	virtual/pkgconfig
+"
+
+python_check_deps() {
+	python_has_version -b ">=dev-python/mako-0.8.0[${PYTHON_USEDEP}]"
+}
+
+pkg_setup() {
+	llvm-r1_pkg_setup
+	python-any-r1_pkg_setup
+}
+
+src_configure() {
+	PKG_CONFIG_PATH="$(get_llvm_prefix)/$(get_libdir)/pkgconfig"
+
+	use debug && EMESON_BUILDTYPE=debug
+
+	local emesonargs=(
+		-Dllvm=enabled
+		-Dshared-llvm=enabled
+		-Dintel-clc=enabled
+
+		-Dgallium-drivers=''
+		-Dvulkan-drivers=''
+
+		# Set platforms empty to avoid the default "auto" setting. If
+		# platforms is empty meson.build will add surfaceless.
+		-Dplatforms=''
+
+		-Dglx=disabled
+		-Dlibunwind=disabled
+		-Dzstd=disabled
+
+		-Db_ndebug=$(usex debug false true)
+	)
+	meson_src_configure
+}
+
+src_install() {
+	dobin "${BUILD_DIR}"/src/intel/compiler/intel_clc
+}