[gentoo-commits] repo/gentoo:master commit in: dev-util/intel_clc/

["Matt Turner" <mattst88@gentoo.org>]

commit:     78c1309a5d267fda2d50477da2882212a63f9950
Author:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Thu Jun  6 19:52:42 2024 +0000
Commit:     Matt Turner <mattst88 <AT> gentoo <DOT> org>
CommitDate: Thu Jun  6 19:54:07 2024 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=78c1309a

dev-util/intel_clc: Version bump to 24.0.9

Signed-off-by: Matt Turner <mattst88 <AT> gentoo.org>

 dev-util/intel_clc/Manifest                |  1 +
 dev-util/intel_clc/intel_clc-24.0.9.ebuild | 86 ++++++++++++++++++++++++++++++
 2 files changed, 87 insertions(+)

diff --git a/dev-util/intel_clc/Manifest b/dev-util/intel_clc/Manifest
index 82d61f37b1be..ab96be295359 100644
--- a/dev-util/intel_clc/Manifest
+++ b/dev-util/intel_clc/Manifest
@@ -1,4 +1,5 @@
 DIST mesa-24.0.7.tar.xz 20144724 BLAKE2B d9438e533b471445b2403e01e1fd593d83c0013b0991585f718122f1cadc6ac6bb1fb913f0fb257354ae21ddd9fe1f970ad9ac46f05d756c223ed56a11b9c9ce SHA512 77b0fae80ab0a07e2e528c113eadef0e3004b8df3e6e98fffe6fc2d8ac39f5ce7fa38ebe5c2ae32bfbac993dd7cbe288ace18ebb03cf2fb445fe7114f74dd45c
 DIST mesa-24.0.8.tar.xz 20170168 BLAKE2B 1919e99e6ccbd51c8e74e55985ea9a3f47bf49c7e4260a195a609ce175eeded9fc5a56970ae35d21bc650e4bb802df484d2088b29ef3861d13942bd495891a9a SHA512 1e1be9b50c2a404a96960db87d2ba4cd1c602445f9ab8acfb6a8a023410063620c2ef891fe516afec3d830756e0b0f4309ef50c6caeefa44e164b414c4708b10
+DIST mesa-24.0.9.tar.xz 20197892 BLAKE2B 3c68e544898031fe76a57ea754f46ede5b105c259d13dd484eaa63fe51b7d52cf76a4084529b11a586c4d8d06f4cb32f993fd1ea4e6ccc4cbc91e78fe755743a SHA512 de2ee6c9df1fc106ee10befe0a76be1e9cfe83d65dbdb83bad6d8d7cfaa085232fb115293a1a790b37b50b1fe14bd58aafbcfe5a15e953b5901a7105d57569a5
 DIST mesa-24.1.0.tar.xz 28994008 BLAKE2B 1558d20d426162bfe8cccf96107ddbf1373c8322f87f48daec73e23b283e00f95d6efd073cad9b92065928af4b9b4a339ff2d204412070eca903f77ca366e619 SHA512 4b7ed1940fc812ef4efb55978d3ffe3d0e2ae53d5b57a3baca10a52db2ba5852c5ee7e75c3739bd8d384c80bf1cba970a384250050f01f03bba98f255e12cec5
 DIST mesa-24.1.1.tar.xz 29019256 BLAKE2B 152ce5f4847a321689bf4aa88529963278f7dd24097c4c3de2b3a9164d06cd23d7cccd96bd31fea88311ded576c834a73e2d669e6d290404283f33f92b9bf262 SHA512 a23fc2fe479f21027095a7791042148586b23da848474209ca4fecfe5c4d499e66fff0ebfa06d07ed9f16b5d6a2ef755b362cb6079141aff5fdc47cc571e3b1d

diff --git a/dev-util/intel_clc/intel_clc-24.0.9.ebuild b/dev-util/intel_clc/intel_clc-24.0.9.ebuild
new file mode 100644
index 000000000000..8bc3bb53f6ba
--- /dev/null
+++ b/dev-util/intel_clc/intel_clc-24.0.9.ebuild
@@ -0,0 +1,86 @@
+# Copyright 2023-2024 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+LLVM_COMPAT=( 16 17 )
+PYTHON_COMPAT=( python3_{10..12} )
+
+inherit llvm-r1 meson python-any-r1
+
+MY_PV="${PV/_/-}"
+
+DESCRIPTION="intel_clc tool used for building OpenCL C to SPIR-V"
+HOMEPAGE="https://mesa3d.org/"
+
+if [[ ${PV} == 9999 ]]; then
+	S="${WORKDIR}/intel_clc-${MY_PV}"
+	EGIT_REPO_URI="https://gitlab.freedesktop.org/mesa/mesa.git"
+	inherit git-r3
+else
+	S="${WORKDIR}/mesa-${MY_PV}"
+	SRC_URI="https://archive.mesa3d.org/mesa-${MY_PV}.tar.xz"
+	KEYWORDS="~amd64"
+fi
+
+LICENSE="MIT SGI-B-2.0"
+SLOT="0"
+IUSE="debug"
+
+RDEPEND="
+	dev-libs/libclc
+	dev-util/spirv-tools
+	>=sys-libs/zlib-1.2.8:=
+	x11-libs/libdrm
+	$(llvm_gen_dep '
+		dev-util/spirv-llvm-translator:${LLVM_SLOT}
+		sys-devel/clang:${LLVM_SLOT}
+		sys-devel/llvm:${LLVM_SLOT}
+	')
+"
+DEPEND="${RDEPEND}
+	dev-libs/expat
+"
+BDEPEND="
+	${PYTHON_DEPS}
+	$(python_gen_any_dep ">=dev-python/mako-0.8.0[\${PYTHON_USEDEP}]")
+	virtual/pkgconfig
+"
+
+python_check_deps() {
+	python_has_version -b ">=dev-python/mako-0.8.0[${PYTHON_USEDEP}]"
+}
+
+pkg_setup() {
+	llvm-r1_pkg_setup
+	python-any-r1_pkg_setup
+}
+
+src_configure() {
+	PKG_CONFIG_PATH="$(get_llvm_prefix)/$(get_libdir)/pkgconfig"
+
+	local emesonargs=(
+		-Dllvm=enabled
+		-Dshared-llvm=enabled
+		-Dintel-clc=enabled
+
+		-Dgallium-drivers=''
+		-Dvulkan-drivers=''
+
+		# Set platforms empty to avoid the default "auto" setting. If
+		# platforms is empty meson.build will add surfaceless.
+		-Dplatforms=''
+
+		-Dglx=disabled
+		-Dlibunwind=disabled
+		-Dzstd=disabled
+
+		-Dbuildtype=$(usex debug debug plain)
+		-Db_ndebug=$(usex debug false true)
+	)
+	meson_src_configure
+}
+
+src_install() {
+	dobin "${BUILD_DIR}"/src/intel/compiler/intel_clc
+}