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* [gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/
@ 2020-07-18 17:19 Andreas K. Hüttel
  0 siblings, 0 replies; 8+ messages in thread
From: Andreas K. Hüttel @ 2020-07-18 17:19 UTC (permalink / raw
  To: gentoo-commits

commit:     bb7188e6904abf574f5335e331e549727c6dfcd3
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Fri Jul 17 09:47:16 2020 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Fri Jul 17 21:03:43 2020 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=bb7188e6

add rv64 subarch names (all cflags magic is done in the profiles)

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/riscv.py | 32 +++++++++++++++++++++++++++++---
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py
index 6f5695f9..9f7a421f 100644
--- a/catalyst/arch/riscv.py
+++ b/catalyst/arch/riscv.py
@@ -1,13 +1,39 @@
 
 from catalyst import builder
 
-class arch_riscv(builder.generic):
-	"builder class for riscv"
+class generic_riscv(builder.generic):
+	"abstract base class for all riscv builders"
 	def __init__(self,myspec):
 		builder.generic.__init__(self,myspec)
 		self.settings["COMMON_FLAGS"]="-O2 -pipe"
 		self.settings["CHOST"]="riscv64-unknown-linux-gnu"
 
+class arch_riscv(generic_riscv):
+	"builder class for generic riscv"
+	def __init__(self,myspec):
+		generic_riscv.__init__(self,myspec)
+
+class arch_rv64_multilib(generic_riscv):
+	"builder class for rv64_multilib"
+	def __init__(self,myspec):
+		generic_riscv.__init__(self,myspec)
+
+class arch_rv64_lp64d(generic_riscv):
+	"builder class for rv64_lp64d"
+	def __init__(self,myspec):
+		generic_riscv.__init__(self,myspec)
+
+class arch_rv64_lp64(generic_riscv):
+	"builder class for rv64_lp64"
+	def __init__(self,myspec):
+		generic_riscv.__init__(self,myspec)
+
+
 def register():
 	"Inform main catalyst program of the contents of this plugin."
-	return ({ "riscv":arch_riscv }, ("rv64","riscv64","riscv"))
+	return ({
+		"riscv"		: arch_riscv,
+		"rv64_multilib"	: arch_rv64_multilib,
+		"rv64_lp64d"	: arch_rv64_lp64d,
+		"rv64_lp64"	: arch_rv64_lp64
+		}, ("rv64_multilib"))


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/
@ 2020-09-17 21:03 Andreas K. Hüttel
  0 siblings, 0 replies; 8+ messages in thread
From: Andreas K. Hüttel @ 2020-09-17 21:03 UTC (permalink / raw
  To: gentoo-commits

commit:     ff88ce93296fc216eded48e4b26a1354380e3d60
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Fri Sep 11 19:04:38 2020 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Fri Sep 11 19:04:38 2020 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=ff88ce93

Add rv32 subarch names (all cflags magic is done in the profiles)

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/riscv.py | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py
index 9f7a421f..18695b51 100644
--- a/catalyst/arch/riscv.py
+++ b/catalyst/arch/riscv.py
@@ -28,6 +28,16 @@ class arch_rv64_lp64(generic_riscv):
 	def __init__(self,myspec):
 		generic_riscv.__init__(self,myspec)
 
+class arch_rv32_ilp32d(generic_riscv):
+	"builder class for rv64_lp64"
+	def __init__(self,myspec):
+		generic_riscv.__init__(self,myspec)
+
+class arch_rv32_ilp32(generic_riscv):
+	"builder class for rv64_lp64"
+	def __init__(self,myspec):
+		generic_riscv.__init__(self,myspec)
+
 
 def register():
 	"Inform main catalyst program of the contents of this plugin."
@@ -35,5 +45,7 @@ def register():
 		"riscv"		: arch_riscv,
 		"rv64_multilib"	: arch_rv64_multilib,
 		"rv64_lp64d"	: arch_rv64_lp64d,
-		"rv64_lp64"	: arch_rv64_lp64
+		"rv64_lp64"	: arch_rv64_lp64,
+		"rv32_ilp32d"	: arch_rv32_ilp32d,
+		"rv32_ilp32"	: arch_rv32_ilp32
 		}, ("rv64_multilib"))


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/
@ 2020-12-23 15:01 Andreas K. Hüttel
  0 siblings, 0 replies; 8+ messages in thread
From: Andreas K. Hüttel @ 2020-12-23 15:01 UTC (permalink / raw
  To: gentoo-commits

commit:     a11c83396d0d4a83644de3e8e6f3f9bd02d5563c
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Wed Dec 23 14:58:36 2020 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Wed Dec 23 15:01:28 2020 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=a11c8339

Fix builder entries for riscv32

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/riscv.py | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py
index 18695b51..1fb2c69b 100644
--- a/catalyst/arch/riscv.py
+++ b/catalyst/arch/riscv.py
@@ -29,14 +29,16 @@ class arch_rv64_lp64(generic_riscv):
 		generic_riscv.__init__(self,myspec)
 
 class arch_rv32_ilp32d(generic_riscv):
-	"builder class for rv64_lp64"
+	"builder class for rv32_ilp32d"
 	def __init__(self,myspec):
 		generic_riscv.__init__(self,myspec)
+		self.settings["CHOST"]="riscv32-unknown-linux-gnu"
 
 class arch_rv32_ilp32(generic_riscv):
-	"builder class for rv64_lp64"
+	"builder class for rv32_ilp32"
 	def __init__(self,myspec):
 		generic_riscv.__init__(self,myspec)
+		self.settings["CHOST"]="riscv32-unknown-linux-gnu"
 
 
 def register():


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/
@ 2022-02-27 15:46 Andreas K. Hüttel
  0 siblings, 0 replies; 8+ messages in thread
From: Andreas K. Hüttel @ 2022-02-27 15:46 UTC (permalink / raw
  To: gentoo-commits

commit:     5c3b5e006cbd915252a6dc345940e824f0275af9
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Sun Feb 27 15:45:43 2022 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Sun Feb 27 15:45:43 2022 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=5c3b5e00

arch: Add riscv64 lp64d musl definition

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/riscv.py | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py
index 1fb2c69b..d7b76c37 100644
--- a/catalyst/arch/riscv.py
+++ b/catalyst/arch/riscv.py
@@ -23,6 +23,12 @@ class arch_rv64_lp64d(generic_riscv):
 	def __init__(self,myspec):
 		generic_riscv.__init__(self,myspec)
 
+class arch_rv64_lp64d_musl(generic_riscv):
+	"builder class for rv64_lp64d_musl"
+	def __init__(self,myspec):
+		generic_riscv.__init__(self,myspec)
+		self.settings["CHOST"]="riscv64-gentoo-linux-musl"
+
 class arch_rv64_lp64(generic_riscv):
 	"builder class for rv64_lp64"
 	def __init__(self,myspec):
@@ -47,6 +53,7 @@ def register():
 		"riscv"		: arch_riscv,
 		"rv64_multilib"	: arch_rv64_multilib,
 		"rv64_lp64d"	: arch_rv64_lp64d,
+		"rv64_lp64d_musl"	: arch_rv64_lp64d_musl,
 		"rv64_lp64"	: arch_rv64_lp64,
 		"rv32_ilp32d"	: arch_rv32_ilp32d,
 		"rv32_ilp32"	: arch_rv32_ilp32


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/
@ 2022-04-23 13:24 Andreas K. Hüttel
  0 siblings, 0 replies; 8+ messages in thread
From: Andreas K. Hüttel @ 2022-04-23 13:24 UTC (permalink / raw
  To: gentoo-commits

commit:     a2a350478ed0301952ac97de8990d6b344842ac2
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Sat Apr 23 13:23:54 2022 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Sat Apr 23 13:23:54 2022 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=a2a35047

Compile mipsel3 stages with -mfix-r5900

... which will make them usable on the PlayStation 2. Don't bother
modifying the n64 ABI configuration, since it will never work on the
PS2.

Backport from master branch

Suggested-by: Fredrik Noring <noring <AT> nocrew.org>
Signed-off-by: Matt Turner <mattst88 <AT> gentoo.org>
Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/mips.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/catalyst/arch/mips.py b/catalyst/arch/mips.py
index 1ac6f85d..73359db7 100644
--- a/catalyst/arch/mips.py
+++ b/catalyst/arch/mips.py
@@ -249,13 +249,13 @@ class arch_mipsel3(generic_mipsel):
 	"Builder class for MIPS III [Little-endian]"
 	def __init__(self,myspec):
 		generic_mipsel.__init__(self,myspec)
-		self.settings["COMMON_FLAGS"]="-O2 -march=mips3 -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["COMMON_FLAGS"]="-O2 -march=mips3 -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -mfix-r5900 -pipe"
 
 class arch_mipsel3_n32(generic_mips64el):
 	"Builder class for MIPS III [Little-endian N32]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["COMMON_FLAGS"]="-O2 -march=mips3 -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["COMMON_FLAGS"]="-O2 -march=mips3 -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -mfix-r5900 -pipe"
 
 class arch_mipsel3_n64(generic_mips64el):
 	"Builder class for MIPS III [Little-endian N64]"
@@ -267,7 +267,7 @@ class arch_mipsel3_multilib(generic_mips64el):
 	"Builder class for MIPS III [Little-endian multilib]"
 	def __init__(self,myspec):
 		generic_mips64el.__init__(self,myspec)
-		self.settings["COMMON_FLAGS"]="-O2 -march=mips3 -mplt -Wa,-mfix-loongson2f-nop -pipe"
+		self.settings["COMMON_FLAGS"]="-O2 -march=mips3 -mplt -Wa,-mfix-loongson2f-nop -mfix-r5900 -pipe"
 
 class arch_loongson2e(generic_mipsel):
 	"Builder class for Loongson 2E [Little-endian]"


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/
@ 2022-07-30 18:41 Andreas K. Hüttel
  0 siblings, 0 replies; 8+ messages in thread
From: Andreas K. Hüttel @ 2022-07-30 18:41 UTC (permalink / raw
  To: gentoo-commits

commit:     4f2fd56455090dfa618857616f3ca1afc10663e3
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Sat Jul 30 18:41:18 2022 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Sat Jul 30 18:41:18 2022 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=4f2fd564

arch: Add subarch definition for riscv64 softfloat musl

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/riscv.py | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py
index d7b76c37..975bce99 100644
--- a/catalyst/arch/riscv.py
+++ b/catalyst/arch/riscv.py
@@ -34,6 +34,12 @@ class arch_rv64_lp64(generic_riscv):
 	def __init__(self,myspec):
 		generic_riscv.__init__(self,myspec)
 
+class arch_rv64_lp64_musl(generic_riscv):
+	"builder class for rv64_lp64_musl"
+	def __init__(self,myspec):
+		generic_riscv.__init__(self,myspec)
+		self.settings["CHOST"]="riscv64-gentoo-linux-musl"
+
 class arch_rv32_ilp32d(generic_riscv):
 	"builder class for rv32_ilp32d"
 	def __init__(self,myspec):


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/
@ 2022-08-13 11:35 Andreas K. Hüttel
  0 siblings, 0 replies; 8+ messages in thread
From: Andreas K. Hüttel @ 2022-08-13 11:35 UTC (permalink / raw
  To: gentoo-commits

commit:     bce5259b1e5ab711323b125da5448e2c3b1a463d
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Sat Aug 13 11:29:08 2022 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Sat Aug 13 11:29:08 2022 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=bce5259b

arch: Add subarch definition for riscv64 softfloat musl (part 2)

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/riscv.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py
index 975bce99..3b7796d9 100644
--- a/catalyst/arch/riscv.py
+++ b/catalyst/arch/riscv.py
@@ -61,6 +61,7 @@ def register():
 		"rv64_lp64d"	: arch_rv64_lp64d,
 		"rv64_lp64d_musl"	: arch_rv64_lp64d_musl,
 		"rv64_lp64"	: arch_rv64_lp64,
+		"rv64_lp64_musl"	: arch_rv64_lp64_musl,
 		"rv32_ilp32d"	: arch_rv32_ilp32d,
 		"rv32_ilp32"	: arch_rv32_ilp32
 		}, ("rv64_multilib"))


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/
@ 2022-10-11 12:53 Andreas K. Hüttel
  0 siblings, 0 replies; 8+ messages in thread
From: Andreas K. Hüttel @ 2022-10-11 12:53 UTC (permalink / raw
  To: gentoo-commits

commit:     2998cce2717052a01861b23b90572fb189d12cdc
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Tue Oct 11 12:52:55 2022 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Tue Oct 11 12:52:55 2022 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=2998cce2

arch: Add loong

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/loong.py | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/catalyst/arch/loong.py b/catalyst/arch/loong.py
new file mode 100644
index 00000000..66786dfe
--- /dev/null
+++ b/catalyst/arch/loong.py
@@ -0,0 +1,20 @@
+
+from catalyst import builder
+
+class generic_loong(builder.generic):
+	"abstract base class for all loong builders"
+	def __init__(self,myspec):
+		builder.generic.__init__(self,myspec)
+		self.settings["COMMON_FLAGS"]=" -pipe"
+
+class arch_loong(generic_loong):
+	"builder class for generic loong"
+	def __init__(self,myspec):
+		generic_loong.__init__(self,myspec)
+		self.settings["COMMON_FLAGS"]+=" -O2"
+		self.settings["CHOST"]="loongarch64-unknown-linux-gnu"
+
+def register():
+	"Inform main catalyst program of the contents of this plugin."
+	return ({ "loong":arch_loong },
+	("loong", ))


^ permalink raw reply related	[flat|nested] 8+ messages in thread

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