[gentoo-commits] proj/catalyst:catalyst-3.0-stable commit in: catalyst/arch/

["Andreas K. Hüttel" <dilfridge@gentoo.org>]

commit:     a11c83396d0d4a83644de3e8e6f3f9bd02d5563c
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Wed Dec 23 14:58:36 2020 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Wed Dec 23 15:01:28 2020 +0000
URL:        https://gitweb.gentoo.org/proj/catalyst.git/commit/?id=a11c8339

Fix builder entries for riscv32

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 catalyst/arch/riscv.py | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py
index 18695b51..1fb2c69b 100644
--- a/catalyst/arch/riscv.py
+++ b/catalyst/arch/riscv.py
@@ -29,14 +29,16 @@ class arch_rv64_lp64(generic_riscv):
 		generic_riscv.__init__(self,myspec)
 
 class arch_rv32_ilp32d(generic_riscv):
-	"builder class for rv64_lp64"
+	"builder class for rv32_ilp32d"
 	def __init__(self,myspec):
 		generic_riscv.__init__(self,myspec)
+		self.settings["CHOST"]="riscv32-unknown-linux-gnu"
 
 class arch_rv32_ilp32(generic_riscv):
-	"builder class for rv64_lp64"
+	"builder class for rv32_ilp32"
 	def __init__(self,myspec):
 		generic_riscv.__init__(self,myspec)
+		self.settings["CHOST"]="riscv32-unknown-linux-gnu"
 
 
 def register():