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From: "Michał Górny" <mgorny@gentoo.org>
To: gentoo-commits@lists.gentoo.org
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Reply-To: gentoo-dev@lists.gentoo.org, "Michał Górny" <mgorny@gentoo.org>
Message-ID: <1502800527.d9284d682a7f68bce8934017665e56eeccf4413a.mgorny@gentoo>
Subject: [gentoo-commits] repo/gentoo:master commit in: sys-devel/clang/
X-VCS-Repository: repo/gentoo
X-VCS-Files: sys-devel/clang/clang-5.0.9999.ebuild sys-devel/clang/clang-9999.ebuild
X-VCS-Directories: sys-devel/clang/
X-VCS-Committer: mgorny
X-VCS-Committer-Name: Michał Górny
X-VCS-Revision: d9284d682a7f68bce8934017665e56eeccf4413a
X-VCS-Branch: master
Date: Tue, 15 Aug 2017 12:35:42 +0000 (UTC)
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commit: d9284d682a7f68bce8934017665e56eeccf4413a
Author: Michał Górny <mgorny <AT> gentoo <DOT> org>
AuthorDate: Tue Aug 15 11:19:07 2017 +0000
Commit: Michał Górny <mgorny <AT> gentoo <DOT> org>
CommitDate: Tue Aug 15 12:35:27 2017 +0000
URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=d9284d68
sys-devel/clang: Disable RISCV following upstream
sys-devel/clang/clang-5.0.9999.ebuild | 2 +-
sys-devel/clang/clang-9999.ebuild | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/sys-devel/clang/clang-5.0.9999.ebuild b/sys-devel/clang/clang-5.0.9999.ebuild
index df33aa3a8b7..268b06fbc7b 100644
--- a/sys-devel/clang/clang-5.0.9999.ebuild
+++ b/sys-devel/clang/clang-5.0.9999.ebuild
@@ -20,7 +20,7 @@ EGIT_BRANCH="release_50"
# Keep in sync with sys-devel/llvm
ALL_LLVM_TARGETS=( AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430
- NVPTX PowerPC RISCV Sparc SystemZ X86 XCore )
+ NVPTX PowerPC Sparc SystemZ X86 XCore )
ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" )
LLVM_TARGET_USEDEPS=${ALL_LLVM_TARGETS[@]/%/?}
diff --git a/sys-devel/clang/clang-9999.ebuild b/sys-devel/clang/clang-9999.ebuild
index 57378c25ed3..73335e4fa4f 100644
--- a/sys-devel/clang/clang-9999.ebuild
+++ b/sys-devel/clang/clang-9999.ebuild
@@ -19,7 +19,7 @@ EGIT_REPO_URI="https://git.llvm.org/git/clang.git
# Keep in sync with sys-devel/llvm
ALL_LLVM_TARGETS=( AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430
- NVPTX PowerPC RISCV Sparc SystemZ X86 XCore )
+ NVPTX PowerPC Sparc SystemZ X86 XCore )
ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" )
LLVM_TARGET_USEDEPS=${ALL_LLVM_TARGETS[@]/%/?}