* [gentoo-commits] proj/releng:master commit in: tools-hardened/desktop/, tools-hardened/desktop/configs/, ...
@ 2014-05-06 19:27 Devan Franchini
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From: Devan Franchini @ 2014-05-06 19:27 UTC (permalink / raw
To: gentoo-commits
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commit: 726829e34d5832f0ff08a3d0b3670da45ea6dd20
Author: Devan Franchini <twitch153 <AT> gentoo <DOT> org>
AuthorDate: Tue May 6 19:22:32 2014 +0000
Commit: Devan Franchini <twitch153 <AT> gentoo <DOT> org>
CommitDate: Tue May 6 19:22:32 2014 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/releng.git;a=commit;h=726829e3
tools-hardened/desktop/: Updates kernel to 3.14.2-r1.
This update includes changes to the README which instruct on how to apply
the loop-AES patch along with updates to the kernel requirements. It also
updates the kernel config to a 3.14.2-r1 compatible .config file, as well as
updating the kernel-config variable to point towards the 3.14.2-r1 config
file.
---
tools-hardened/desktop/README | 11 +-
.../desktop/configs/loop-AES-kernel-3.14.patch | 9128 ++++++++++++++++++++
.../desktop/files/3.14.2-hardened-r1.config | 3237 +++++++
tools-hardened/desktop/files/kernel-config | 2 +-
4 files changed, 12376 insertions(+), 2 deletions(-)
diff --git a/tools-hardened/desktop/README b/tools-hardened/desktop/README
index c3d7c83..349f49d 100644
--- a/tools-hardened/desktop/README
+++ b/tools-hardened/desktop/README
@@ -3,13 +3,22 @@ Kernel Requirements:
On the host system, these two packages need to be installed:
-* sys-kernel/hardened-sources-3.13.5
+* sys-kernel/hardened-sources-3.14.2-r1
* sys-kernel/linux-firmware-20131230
* sys-kernel/genkernel
Once you emerge these things, create a symbolic link of the hardened-sources
to point to "/usr/src/linux-tinhat".
+After this you need to apply the Loop-AES patch by doing the following:
+
+* cp ./config/loop-AES-kernel-3.14.patch /usr/src/linux-tinhat/
+
+Then apply the patch:
+
+* rm -f drivers/block/loop.c include/linux/loop.h
+* patch -p1 < loop-AES-kernel-3.14.patch
+
To run:
=======
diff --git a/tools-hardened/desktop/configs/loop-AES-kernel-3.14.patch b/tools-hardened/desktop/configs/loop-AES-kernel-3.14.patch
new file mode 100644
index 0000000..bcc2b69
--- /dev/null
+++ b/tools-hardened/desktop/configs/loop-AES-kernel-3.14.patch
@@ -0,0 +1,9128 @@
+Before this patch can be applied to kernel, drivers/block/loop.c and
+include/linux/loop.h source files must be removed:
+
+ rm -f drivers/block/loop.c include/linux/loop.h
+
+diff -urN linux-3.14-noloop/drivers/block/Kconfig linux-3.14-AES/drivers/block/Kconfig
+--- linux-3.14-noloop/drivers/block/Kconfig 2014-03-31 06:40:15.000000000 +0300
++++ linux-3.14-AES/drivers/block/Kconfig 2014-03-31 22:20:36.000000000 +0300
+@@ -235,14 +235,6 @@
+ bits of, say, a sound file). This is also safe if the file resides
+ on a remote file server.
+
+- There are several ways of encrypting disks. Some of these require
+- kernel patches. The vanilla kernel offers the cryptoloop option
+- and a Device Mapper target (which is superior, as it supports all
+- file systems). If you want to use the cryptoloop, say Y to both
+- LOOP and CRYPTOLOOP, and make sure you have a recent (version 2.12
+- or later) version of util-linux. Additionally, be aware that
+- the cryptoloop is not safe for storing journaled filesystems.
+-
+ Note that this loop device has nothing to do with the loopback
+ device used for network connections from the machine to itself.
+
+@@ -251,35 +243,40 @@
+
+ Most users will answer N here.
+
+-config BLK_DEV_LOOP_MIN_COUNT
+- int "Number of loop devices to pre-create at init time"
++config BLK_DEV_LOOP_AES
++ bool "AES encrypted loop device support"
+ depends on BLK_DEV_LOOP
+- default 8
+- help
+- Static number of loop devices to be unconditionally pre-created
+- at init time.
+-
+- This default value can be overwritten on the kernel command
+- line or with module-parameter loop.max_loop.
+-
+- The historic default is 8. If a late 2011 version of losetup(8)
+- is used, it can be set to 0, since needed loop devices can be
+- dynamically allocated with the /dev/loop-control interface.
+-
+-config BLK_DEV_CRYPTOLOOP
+- tristate "Cryptoloop Support"
+- select CRYPTO
+- select CRYPTO_CBC
++ ---help---
++ If you want to use AES encryption algorithm to encrypt loop
++ devices, say Y here. If you don't know what to do here, say N.
++
++config BLK_DEV_LOOP_KEYSCRUB
++ bool "loop encryption key scrubbing support"
+ depends on BLK_DEV_LOOP
+ ---help---
+- Say Y here if you want to be able to use the ciphers that are
+- provided by the CryptoAPI as loop transformation. This might be
+- used as hard disk encryption.
+-
+- WARNING: This device is not safe for journaled file systems like
+- ext3 or Reiserfs. Please use the Device Mapper crypto module
+- instead, which can be configured to be on-disk compatible with the
+- cryptoloop device.
++ Loop encryption key scrubbing moves and inverts key bits in
++ kernel RAM so that the thin oxide which forms the storage
++ capacitor dielectric of DRAM cells is not permitted to develop
++ detectable property. For more info, see Peter Gutmann's paper:
++ http://www.cypherpunks.to/~peter/usenix01.pdf
++
++ Paranoid tinfoil hat crowd say Y here, everyone else say N.
++
++config BLK_DEV_LOOP_PADLOCK
++ bool "VIA padlock hardware AES support"
++ depends on BLK_DEV_LOOP && BLK_DEV_LOOP_AES && (X86 || X86_64)
++ ---help---
++ If you have VIA processor that supports padlock xcrypt instructions,
++ say Y here. If enabled, presence of VIA padlock instructions is detected
++ at run time, but code still works on non-padlock processors too.
++
++config BLK_DEV_LOOP_INTELAES
++ bool "Intel hardware AES support"
++ depends on BLK_DEV_LOOP && BLK_DEV_LOOP_AES && (X86 || X86_64)
++ ---help---
++ If you have a processor that supports Intel AES instructions,
++ say Y here. If enabled, presence of Intel AES instructions is detected
++ at run time, but code still works on older processors too.
+
+ source "drivers/block/drbd/Kconfig"
+
+diff -urN linux-3.14-noloop/drivers/block/loop.c linux-3.14-AES/drivers/block/loop.c
+--- linux-3.14-noloop/drivers/block/loop.c 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/block/loop.c 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,3278 @@
++/*
++ * linux/drivers/block/loop.c
++ *
++ * Written by Theodore Ts'o, 3/29/93
++ *
++ * Copyright 1993 by Theodore Ts'o. Redistribution of this file is
++ * permitted under the GNU General Public License.
++ *
++ * DES encryption plus some minor changes by Werner Almesberger, 30-MAY-1993
++ * more DES encryption plus IDEA encryption by Nicholas J. Leon, June 20, 1996
++ *
++ * Modularized and updated for 1.1.16 kernel - Mitch Dsouza 28th May 1994
++ * Adapted for 1.3.59 kernel - Andries Brouwer, 1 Feb 1996
++ *
++ * Fixed do_loop_request() re-entrancy - Vincent.Renardias@waw.com Mar 20, 1997
++ *
++ * Added devfs support - Richard Gooch <rgooch@atnf.csiro.au> 16-Jan-1998
++ *
++ * Handle sparse backing files correctly - Kenn Humborg, Jun 28, 1998
++ *
++ * Loadable modules and other fixes by AK, 1998
++ *
++ * Make real block number available to downstream transfer functions, enables
++ * CBC (and relatives) mode encryption requiring unique IVs per data block.
++ * Reed H. Petty, rhp@draper.net
++ *
++ * Maximum number of loop devices now dynamic via max_loop module parameter.
++ * Russell Kroll <rkroll@exploits.org> 19990701
++ *
++ * Maximum number of loop devices when compiled-in now selectable by passing
++ * max_loop=<1-255> to the kernel on boot.
++ * Erik I. Bolsø, <eriki@himolde.no>, Oct 31, 1999
++ *
++ * Completely rewrite request handling to be make_request_fn style and
++ * non blocking, pushing work to a helper thread. Lots of fixes from
++ * Al Viro too.
++ * Jens Axboe <axboe@suse.de>, Nov 2000
++ *
++ * Support up to 256 loop devices
++ * Heinz Mauelshagen <mge@sistina.com>, Feb 2002
++ *
++ * AES transfer added. IV is now passed as (512 byte) sector number.
++ * Jari Ruusu, May 18 2001
++ *
++ * External encryption module locking bug fixed.
++ * Ingo Rohloff <rohloff@in.tum.de>, June 21 2001
++ *
++ * Make device backed loop work with swap (pre-allocated buffers + queue rewrite).
++ * Jari Ruusu, September 2 2001
++ *
++ * Ported 'pre-allocated buffers + queue rewrite' to BIO for 2.5 kernels
++ * Ben Slusky <sluskyb@stwing.org>, March 1 2002
++ * Jari Ruusu, March 27 2002
++ *
++ * File backed code now uses file->f_op->read/write. Based on Andrew Morton's idea.
++ * Jari Ruusu, May 23 2002
++ *
++ * Exported hard sector size correctly, fixed file-backed-loop-on-tmpfs bug,
++ * plus many more enhancements and optimizations.
++ * Adam J. Richter <adam@yggdrasil.com>, Aug 2002
++ *
++ * Added support for removing offset from IV computations.
++ * Jari Ruusu, September 21 2003
++ *
++ * Added support for MD5 IV computation and multi-key operation.
++ * Jari Ruusu, October 8 2003
++ *
++ *
++ * Still To Fix:
++ * - Advisory locking is ignored here.
++ * - Should use an own CAP_* category instead of CAP_SYS_ADMIN
++ */
++
++#include <linux/version.h>
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/sched.h>
++#include <linux/fs.h>
++#include <linux/file.h>
++#include <linux/bio.h>
++#include <linux/stat.h>
++#include <linux/errno.h>
++#include <linux/major.h>
++#include <linux/wait.h>
++#include <linux/blkdev.h>
++#include <linux/blkpg.h>
++#include <linux/init.h>
++#ifdef CONFIG_DEVFS_FS
++# include <linux/devfs_fs_kernel.h>
++#endif
++#include <linux/swap.h>
++#include <linux/slab.h>
++#include <linux/loop.h>
++#include <linux/suspend.h>
++#include <linux/writeback.h>
++#include <linux/buffer_head.h> /* for invalidate_bdev() */
++#include <linux/completion.h>
++#include <linux/kthread.h>
++#if defined(CONFIG_COMPAT) && defined(HAVE_COMPAT_IOCTL)
++# include <linux/compat.h>
++#endif
++#include <linux/mqueue.h>
++#include <linux/delay.h>
++#include <linux/spinlock.h>
++#include <linux/backing-dev.h>
++
++#include <asm/uaccess.h>
++#include <asm/byteorder.h>
++#if (defined(CONFIG_BLK_DEV_LOOP_PADLOCK) || defined(CONFIG_BLK_DEV_LOOP_INTELAES)) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++# include <asm/processor.h>
++#endif
++#if defined(CONFIG_BLK_DEV_LOOP_INTELAES) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++# include <asm/i387.h>
++#endif
++
++#if defined(CONFIG_X86) && !defined(CONFIG_X86_64)
++# define X86_ASM 1
++#endif
++#if defined(CONFIG_X86_64)
++# define AMD64_ASM 1
++#endif
++
++#include "../misc/aes.h"
++#include "../misc/md5.h"
++
++#if defined(CONFIG_COMPAT) && !defined(HAVE_COMPAT_IOCTL)
++# include <linux/ioctl32.h>
++# define IOCTL32_COMPATIBLE_PTR ((void*)0)
++#endif
++
++//#define LOOP_HAVE_CONGESTED_FN 1
++
++#define L_BIO_RW_AHEAD (REQ_RAHEAD)
++#define L_BIO_RW_NOIDLE (REQ_NOIDLE)
++#define L_BIO_RW_SYNCIO (REQ_SYNC)
++
++static int max_loop = 8;
++
++#ifdef MODULE
++module_param(max_loop, int, 0);
++MODULE_PARM_DESC(max_loop, "Maximum number of loop devices (1-256)");
++#else
++static int __init max_loop_setup(char *str)
++{
++ int y;
++
++ if (get_option(&str, &y) == 1)
++ max_loop = y;
++ return 1;
++}
++__setup("max_loop=", max_loop_setup);
++#endif
++
++static struct gendisk **disks;
++
++/*
++ * Transfer functions
++ */
++static int transfer_none(struct loop_device *lo, int cmd, char *raw_buf,
++ char *loop_buf, int size, sector_t real_block)
++{
++ /* this code is only called from file backed loop */
++ /* and that code expects this function to be no-op */
++
++ cond_resched();
++ return 0;
++}
++
++static int transfer_xor(struct loop_device *lo, int cmd, char *raw_buf,
++ char *loop_buf, int size, sector_t real_block)
++{
++ char *in, *out, *key;
++ int i, keysize;
++
++ if (cmd == READ) {
++ in = raw_buf;
++ out = loop_buf;
++ } else {
++ in = loop_buf;
++ out = raw_buf;
++ }
++
++ key = lo->lo_encrypt_key;
++ keysize = lo->lo_encrypt_key_size;
++ for (i = 0; i < size; i++)
++ *out++ = *in++ ^ key[(i & 511) % keysize];
++ cond_resched();
++ return 0;
++}
++
++static int xor_init(struct loop_device *lo, struct loop_info64 *info)
++{
++ if (info->lo_encrypt_key_size <= 0)
++ return -EINVAL;
++ return 0;
++}
++
++static struct loop_func_table none_funcs = {
++ .number = LO_CRYPT_NONE,
++ .transfer = transfer_none,
++};
++
++static struct loop_func_table xor_funcs = {
++ .number = LO_CRYPT_XOR,
++ .transfer = transfer_xor,
++ .init = xor_init,
++};
++
++#ifdef CONFIG_BLK_DEV_LOOP_AES
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++# define KEY_ALLOC_COUNT 128
++#else
++# define KEY_ALLOC_COUNT 64
++#endif
++
++typedef struct {
++ aes_context *keyPtr[KEY_ALLOC_COUNT];
++ unsigned keyMask;
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ u_int32_t *partialMD5;
++ u_int32_t partialMD5buf[8];
++ rwlock_t rwlock;
++ unsigned reversed;
++ unsigned blocked;
++ struct timer_list timer;
++#else
++ u_int32_t partialMD5[4];
++#endif
++#if defined(CONFIG_BLK_DEV_LOOP_PADLOCK) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++ u_int32_t padlock_cw_e;
++ u_int32_t padlock_cw_d;
++#endif
++} AESmultiKey;
++
++#if (defined(CONFIG_BLK_DEV_LOOP_PADLOCK) || defined(CONFIG_BLK_DEV_LOOP_INTELAES)) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++/* This function allocates AES context structures at special address such */
++/* that returned address % 16 == 8 . That way expanded encryption and */
++/* decryption keys in AES context structure are always 16 byte aligned */
++static void *specialAligned_kmalloc(size_t size, unsigned int flags)
++{
++ void *pn, **ps;
++ pn = kmalloc(size + (16 + 8), flags);
++ if(!pn) return (void *)0;
++ ps = (void **)((((unsigned long)pn + 15) & ~((unsigned long)15)) + 8);
++ *(ps - 1) = pn;
++ return (void *)ps;
++}
++static void specialAligned_kfree(void *ps)
++{
++ if(ps) kfree(*((void **)ps - 1));
++}
++# define specialAligned_ctxSize ((sizeof(aes_context) + 15) & ~15)
++#else
++# define specialAligned_kmalloc kmalloc
++# define specialAligned_kfree kfree
++# define specialAligned_ctxSize sizeof(aes_context)
++#endif
++
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++static void keyScrubWork(AESmultiKey *m)
++{
++ aes_context *a0, *a1;
++ u_int32_t *p;
++ int x, y, z;
++
++ z = m->keyMask + 1;
++ for(x = 0; x < z; x++) {
++ a0 = m->keyPtr[x];
++ a1 = m->keyPtr[x + z];
++ memcpy(a1, a0, sizeof(aes_context));
++ m->keyPtr[x] = a1;
++ m->keyPtr[x + z] = a0;
++ p = (u_int32_t *) a0;
++ y = sizeof(aes_context) / sizeof(u_int32_t);
++ while(y > 0) {
++ *p ^= 0xFFFFFFFF;
++ p++;
++ y--;
++ }
++ }
++
++ x = m->reversed; /* x is 0 or 4 */
++ m->reversed ^= 4;
++ y = m->reversed; /* y is 4 or 0 */
++ p = &m->partialMD5buf[x];
++ memcpy(&m->partialMD5buf[y], p, 16);
++ m->partialMD5 = &m->partialMD5buf[y];
++ p[0] ^= 0xFFFFFFFF;
++ p[1] ^= 0xFFFFFFFF;
++ p[2] ^= 0xFFFFFFFF;
++ p[3] ^= 0xFFFFFFFF;
++
++ /* try to flush dirty cache data to RAM */
++#if !defined(CONFIG_XEN) && (defined(CONFIG_X86_64) || (defined(CONFIG_X86) && !defined(CONFIG_M386) && !defined(CONFIG_CPU_386)))
++ __asm__ __volatile__ ("wbinvd": : :"memory");
++#else
++ mb();
++#endif
++}
++
++/* called only from loop thread process context */
++static void keyScrubThreadFn(AESmultiKey *m)
++{
++ write_lock(&m->rwlock);
++ if(!m->blocked) keyScrubWork(m);
++ write_unlock(&m->rwlock);
++}
++
++#if defined(NEW_TIMER_VOID_PTR_PARAM)
++# define KeyScrubTimerFnParamType void *
++#else
++# define KeyScrubTimerFnParamType unsigned long
++#endif
++
++static void keyScrubTimerFn(KeyScrubTimerFnParamType);
++
++static void keyScrubTimerInit(struct loop_device *lo)
++{
++ AESmultiKey *m;
++ unsigned long expire;
++
++ m = (AESmultiKey *)lo->key_data;
++ expire = jiffies + HZ;
++ init_timer(&m->timer);
++ m->timer.expires = expire;
++ m->timer.data = (KeyScrubTimerFnParamType)lo;
++ m->timer.function = keyScrubTimerFn;
++ add_timer(&m->timer);
++}
++
++/* called only from timer handler context */
++static void keyScrubTimerFn(KeyScrubTimerFnParamType d)
++{
++ struct loop_device *lo = (struct loop_device *)d;
++ extern void loop_add_keyscrub_fn(struct loop_device *, void (*)(void *), void *);
++
++ /* rw lock needs process context, so make loop thread do scrubbing */
++ loop_add_keyscrub_fn(lo, (void (*)(void*))keyScrubThreadFn, lo->key_data);
++ /* start timer again */
++ keyScrubTimerInit(lo);
++}
++#endif
++
++static AESmultiKey *allocMultiKey(void)
++{
++ AESmultiKey *m;
++ aes_context *a;
++ int x = 0, n;
++
++ m = (AESmultiKey *) kmalloc(sizeof(AESmultiKey), GFP_KERNEL);
++ if(!m) return 0;
++ memset(m, 0, sizeof(AESmultiKey));
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ m->partialMD5 = &m->partialMD5buf[0];
++ rwlock_init(&m->rwlock);
++ init_timer(&m->timer);
++ again:
++#endif
++
++ n = PAGE_SIZE / specialAligned_ctxSize;
++ if(!n) n = 1;
++
++ a = (aes_context *) specialAligned_kmalloc(specialAligned_ctxSize * n, GFP_KERNEL);
++ if(!a) {
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ if(x) specialAligned_kfree(m->keyPtr[0]);
++#endif
++ kfree(m);
++ return 0;
++ }
++
++ while((x < KEY_ALLOC_COUNT) && n) {
++ m->keyPtr[x] = a;
++ a = (aes_context *)((unsigned char *)a + specialAligned_ctxSize);
++ x++;
++ n--;
++ }
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ if(x < 2) goto again;
++#endif
++ return m;
++}
++
++static void clearAndFreeMultiKey(AESmultiKey *m)
++{
++ aes_context *a;
++ int x, n;
++
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ /* stop scrub timer. loop thread was killed earlier */
++ del_timer_sync(&m->timer);
++ /* make sure allocated keys are in original order */
++ if(m->reversed) keyScrubWork(m);
++#endif
++ n = PAGE_SIZE / specialAligned_ctxSize;
++ if(!n) n = 1;
++
++ x = 0;
++ while(x < KEY_ALLOC_COUNT) {
++ a = m->keyPtr[x];
++ if(!a) break;
++ memset(a, 0, specialAligned_ctxSize * n);
++ specialAligned_kfree(a);
++ x += n;
++ }
++
++ memset(m, 0, sizeof(AESmultiKey));
++ kfree(m);
++}
++
++static int multiKeySetup(struct loop_device *lo, unsigned char *k, int version3)
++{
++ AESmultiKey *m;
++ aes_context *a;
++ int x, y, n, err = 0;
++ union {
++ u_int32_t w[16];
++ unsigned char b[64];
++ } un;
++
++#if LINUX_VERSION_CODE >= 0x30600
++ if(!uid_eq(lo->lo_key_owner, current_uid()) && !capable(CAP_SYS_ADMIN))
++ return -EPERM;
++#elif LINUX_VERSION_CODE >= 0x2061c
++ if(lo->lo_key_owner != current_uid() && !capable(CAP_SYS_ADMIN))
++ return -EPERM;
++#else
++ if(lo->lo_key_owner != current->uid && !capable(CAP_SYS_ADMIN))
++ return -EPERM;
++#endif
++
++ m = (AESmultiKey *)lo->key_data;
++ if(!m) return -ENXIO;
++
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ /* temporarily prevent loop thread from messing with keys */
++ write_lock(&m->rwlock);
++ m->blocked = 1;
++ /* make sure allocated keys are in original order */
++ if(m->reversed) keyScrubWork(m);
++ write_unlock(&m->rwlock);
++#endif
++ n = PAGE_SIZE / specialAligned_ctxSize;
++ if(!n) n = 1;
++
++ x = 0;
++ while(x < KEY_ALLOC_COUNT) {
++ if(!m->keyPtr[x]) {
++ a = (aes_context *) specialAligned_kmalloc(specialAligned_ctxSize * n, GFP_KERNEL);
++ if(!a) {
++ err = -ENOMEM;
++ goto error_out;
++ }
++ y = x;
++ while((y < (x + n)) && (y < KEY_ALLOC_COUNT)) {
++ m->keyPtr[y] = a;
++ a = (aes_context *)((unsigned char *)a + specialAligned_ctxSize);
++ y++;
++ }
++ }
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ if(x >= 64) {
++ x++;
++ continue;
++ }
++#endif
++ if(copy_from_user(&un.b[0], k, 32)) {
++ err = -EFAULT;
++ goto error_out;
++ }
++ aes_set_key(m->keyPtr[x], &un.b[0], lo->lo_encrypt_key_size, 0);
++ k += 32;
++ x++;
++ }
++
++ m->partialMD5[0] = 0x67452301;
++ m->partialMD5[1] = 0xefcdab89;
++ m->partialMD5[2] = 0x98badcfe;
++ m->partialMD5[3] = 0x10325476;
++ if(version3) {
++ /* only first 128 bits of iv-key is used */
++ if(copy_from_user(&un.b[0], k, 16)) {
++ err = -EFAULT;
++ goto error_out;
++ }
++#if defined(__BIG_ENDIAN)
++ un.w[0] = cpu_to_le32(un.w[0]);
++ un.w[1] = cpu_to_le32(un.w[1]);
++ un.w[2] = cpu_to_le32(un.w[2]);
++ un.w[3] = cpu_to_le32(un.w[3]);
++#endif
++ memset(&un.b[16], 0, 48);
++ md5_transform_CPUbyteorder(&m->partialMD5[0], &un.w[0]);
++ lo->lo_flags |= 0x080000; /* multi-key-v3 (info exported to user space) */
++ }
++
++ m->keyMask = 0x3F; /* range 0...63 */
++ lo->lo_flags |= 0x100000; /* multi-key (info exported to user space) */
++ memset(&un.b[0], 0, 32);
++error_out:
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ /* re-enable loop thread key scrubbing */
++ write_lock(&m->rwlock);
++ m->blocked = 0;
++ write_unlock(&m->rwlock);
++#endif
++ return err;
++}
++
++static int keySetup_aes(struct loop_device *lo, struct loop_info64 *info)
++{
++ AESmultiKey *m;
++ union {
++ u_int32_t w[8]; /* needed for 4 byte alignment for b[] */
++ unsigned char b[32];
++ } un;
++
++ lo->key_data = m = allocMultiKey();
++ if(!m) return(-ENOMEM);
++ memcpy(&un.b[0], &info->lo_encrypt_key[0], 32);
++ aes_set_key(m->keyPtr[0], &un.b[0], info->lo_encrypt_key_size, 0);
++ memset(&info->lo_encrypt_key[0], 0, sizeof(info->lo_encrypt_key));
++ memset(&un.b[0], 0, 32);
++#if defined(CONFIG_BLK_DEV_LOOP_PADLOCK) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++ switch(info->lo_encrypt_key_size) {
++ case 256: /* bits */
++ case 32: /* bytes */
++ /* 14 rounds, AES, software key gen, normal oper, encrypt, 256-bit key */
++ m->padlock_cw_e = 14 | (1<<7) | (2<<10);
++ /* 14 rounds, AES, software key gen, normal oper, decrypt, 256-bit key */
++ m->padlock_cw_d = 14 | (1<<7) | (1<<9) | (2<<10);
++ break;
++ case 192: /* bits */
++ case 24: /* bytes */
++ /* 12 rounds, AES, software key gen, normal oper, encrypt, 192-bit key */
++ m->padlock_cw_e = 12 | (1<<7) | (1<<10);
++ /* 12 rounds, AES, software key gen, normal oper, decrypt, 192-bit key */
++ m->padlock_cw_d = 12 | (1<<7) | (1<<9) | (1<<10);
++ break;
++ default:
++ /* 10 rounds, AES, software key gen, normal oper, encrypt, 128-bit key */
++ m->padlock_cw_e = 10 | (1<<7);
++ /* 10 rounds, AES, software key gen, normal oper, decrypt, 128-bit key */
++ m->padlock_cw_d = 10 | (1<<7) | (1<<9);
++ break;
++ }
++#endif
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ keyScrubTimerInit(lo);
++#endif
++ return(0);
++}
++
++static int keyClean_aes(struct loop_device *lo)
++{
++ if(lo->key_data) {
++ clearAndFreeMultiKey((AESmultiKey *)lo->key_data);
++ lo->key_data = 0;
++ }
++ return(0);
++}
++
++static int handleIoctl_aes(struct loop_device *lo, int cmd, unsigned long arg)
++{
++ int err;
++
++ switch (cmd) {
++ case LOOP_MULTI_KEY_SETUP:
++ err = multiKeySetup(lo, (unsigned char *)arg, 0);
++ break;
++ case LOOP_MULTI_KEY_SETUP_V3:
++ err = multiKeySetup(lo, (unsigned char *)arg, 1);
++ break;
++ default:
++ err = -EINVAL;
++ }
++ return err;
++}
++
++void loop_compute_sector_iv(sector_t devSect, u_int32_t *ivout)
++{
++ if(sizeof(sector_t) == 8) {
++ ivout[0] = cpu_to_le32(devSect);
++ ivout[1] = cpu_to_le32((u_int64_t)devSect>>32);
++ ivout[3] = ivout[2] = 0;
++ } else {
++ ivout[0] = cpu_to_le32(devSect);
++ ivout[3] = ivout[2] = ivout[1] = 0;
++ }
++}
++
++void loop_compute_md5_iv_v3(sector_t devSect, u_int32_t *ivout, u_int32_t *data)
++{
++ int x;
++#if defined(__BIG_ENDIAN)
++ int y, e;
++#endif
++ u_int32_t buf[16];
++
++#if defined(__BIG_ENDIAN)
++ y = 7;
++ e = 16;
++ do {
++ if (!y) {
++ e = 12;
++ /* md5_transform_CPUbyteorder wants data in CPU byte order */
++ /* devSect is already in CPU byte order -- no need to convert */
++ if(sizeof(sector_t) == 8) {
++ /* use only 56 bits of sector number */
++ buf[12] = devSect;
++ buf[13] = (((u_int64_t)devSect >> 32) & 0xFFFFFF) | 0x80000000;
++ } else {
++ /* 32 bits of sector number + 24 zero bits */
++ buf[12] = devSect;
++ buf[13] = 0x80000000;
++ }
++ /* 4024 bits == 31 * 128 bit plaintext blocks + 56 bits of sector number */
++ /* For version 3 on-disk format this really should be 4536 bits, but can't be */
++ /* changed without breaking compatibility. V3 uses MD5-with-wrong-length IV */
++ buf[14] = 4024;
++ buf[15] = 0;
++ }
++ x = 0;
++ do {
++ buf[x ] = cpu_to_le32(data[0]);
++ buf[x + 1] = cpu_to_le32(data[1]);
++ buf[x + 2] = cpu_to_le32(data[2]);
++ buf[x + 3] = cpu_to_le32(data[3]);
++ x += 4;
++ data += 4;
++ } while (x < e);
++ md5_transform_CPUbyteorder(&ivout[0], &buf[0]);
++ } while (--y >= 0);
++ ivout[0] = cpu_to_le32(ivout[0]);
++ ivout[1] = cpu_to_le32(ivout[1]);
++ ivout[2] = cpu_to_le32(ivout[2]);
++ ivout[3] = cpu_to_le32(ivout[3]);
++#else
++ x = 6;
++ do {
++ md5_transform_CPUbyteorder(&ivout[0], data);
++ data += 16;
++ } while (--x >= 0);
++ memcpy(buf, data, 48);
++ /* md5_transform_CPUbyteorder wants data in CPU byte order */
++ /* devSect is already in CPU byte order -- no need to convert */
++ if(sizeof(sector_t) == 8) {
++ /* use only 56 bits of sector number */
++ buf[12] = devSect;
++ buf[13] = (((u_int64_t)devSect >> 32) & 0xFFFFFF) | 0x80000000;
++ } else {
++ /* 32 bits of sector number + 24 zero bits */
++ buf[12] = devSect;
++ buf[13] = 0x80000000;
++ }
++ /* 4024 bits == 31 * 128 bit plaintext blocks + 56 bits of sector number */
++ /* For version 3 on-disk format this really should be 4536 bits, but can't be */
++ /* changed without breaking compatibility. V3 uses MD5-with-wrong-length IV */
++ buf[14] = 4024;
++ buf[15] = 0;
++ md5_transform_CPUbyteorder(&ivout[0], &buf[0]);
++#endif
++}
++
++/* this function exists for compatibility with old external cipher modules */
++void loop_compute_md5_iv(sector_t devSect, u_int32_t *ivout, u_int32_t *data)
++{
++ ivout[0] = 0x67452301;
++ ivout[1] = 0xefcdab89;
++ ivout[2] = 0x98badcfe;
++ ivout[3] = 0x10325476;
++ loop_compute_md5_iv_v3(devSect, ivout, data);
++}
++
++/* Some external modules do not know if md5_transform_CPUbyteorder() */
++/* is asmlinkage or not, so here is C language wrapper for them. */
++void md5_transform_CPUbyteorder_C(u_int32_t *hash, u_int32_t const *in)
++{
++ md5_transform_CPUbyteorder(hash, in);
++}
++
++#if defined(CONFIG_X86_64) && defined(AMD64_ASM)
++# define HAVE_MD5_2X_IMPLEMENTATION 1
++#endif
++#if defined(HAVE_MD5_2X_IMPLEMENTATION)
++/*
++ * This 2x code is currently only available on little endian AMD64
++ * This 2x code assumes little endian byte order
++ * Context A input data is at zero offset, context B at data + 512 bytes
++ * Context A ivout at zero offset, context B at ivout + 16 bytes
++ */
++void loop_compute_md5_iv_v3_2x(sector_t devSect, u_int32_t *ivout, u_int32_t *data)
++{
++ int x;
++ u_int32_t buf[2*16];
++
++ x = 6;
++ do {
++ md5_transform_CPUbyteorder_2x(&ivout[0], data, data + (512/4));
++ data += 16;
++ } while (--x >= 0);
++ memcpy(&buf[0], data, 48);
++ memcpy(&buf[16], data + (512/4), 48);
++ /* md5_transform_CPUbyteorder wants data in CPU byte order */
++ /* devSect is already in CPU byte order -- no need to convert */
++ if(sizeof(sector_t) == 8) {
++ /* use only 56 bits of sector number */
++ buf[12] = devSect;
++ buf[13] = (((u_int64_t)devSect >> 32) & 0xFFFFFF) | 0x80000000;
++ buf[16 + 12] = ++devSect;
++ buf[16 + 13] = (((u_int64_t)devSect >> 32) & 0xFFFFFF) | 0x80000000;
++ } else {
++ /* 32 bits of sector number + 24 zero bits */
++ buf[12] = devSect;
++ buf[16 + 13] = buf[13] = 0x80000000;
++ buf[16 + 12] = ++devSect;
++ }
++ /* 4024 bits == 31 * 128 bit plaintext blocks + 56 bits of sector number */
++ /* For version 3 on-disk format this really should be 4536 bits, but can't be */
++ /* changed without breaking compatibility. V3 uses MD5-with-wrong-length IV */
++ buf[16 + 14] = buf[14] = 4024;
++ buf[16 + 15] = buf[15] = 0;
++ md5_transform_CPUbyteorder_2x(&ivout[0], &buf[0], &buf[16]);
++}
++#endif /* defined(HAVE_MD5_2X_IMPLEMENTATION) */
++
++/*
++ * Special requirements for transfer functions:
++ * (1) Plaintext data (loop_buf) may change while it is being read.
++ * (2) On 2.2 and older kernels ciphertext buffer (raw_buf) may be doing
++ * writes to disk at any time, so it can't be used as temporary buffer.
++ */
++static int transfer_aes(struct loop_device *lo, int cmd, char *raw_buf,
++ char *loop_buf, int size, sector_t devSect)
++{
++ aes_context *a;
++ AESmultiKey *m;
++ int x;
++ unsigned y;
++ u_int64_t iv[4], *dip;
++
++ if(!size || (size & 511)) {
++ return -EINVAL;
++ }
++ m = (AESmultiKey *)lo->key_data;
++ y = m->keyMask;
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ read_lock(&m->rwlock);
++#endif
++ if(cmd == READ) {
++#if defined(HAVE_MD5_2X_IMPLEMENTATION)
++ /* if possible, use faster 2x MD5 implementation, currently AMD64 only (#6) */
++ while((size >= (2*512)) && y) {
++ /* multi-key mode, decrypt 2 sectors at a time */
++ a = m->keyPtr[((unsigned)devSect ) & y];
++ /* decrypt using fake all-zero IV, first sector */
++ memset(iv, 0, 16);
++ x = 15;
++ do {
++ memcpy(&iv[2], raw_buf, 16);
++ aes_decrypt(a, raw_buf, loop_buf);
++ *((u_int64_t *)(&loop_buf[0])) ^= iv[0];
++ *((u_int64_t *)(&loop_buf[8])) ^= iv[1];
++ raw_buf += 16;
++ loop_buf += 16;
++ memcpy(iv, raw_buf, 16);
++ aes_decrypt(a, raw_buf, loop_buf);
++ *((u_int64_t *)(&loop_buf[0])) ^= iv[2];
++ *((u_int64_t *)(&loop_buf[8])) ^= iv[3];
++ raw_buf += 16;
++ loop_buf += 16;
++ } while(--x >= 0);
++ a = m->keyPtr[((unsigned)devSect + 1) & y];
++ /* decrypt using fake all-zero IV, second sector */
++ memset(iv, 0, 16);
++ x = 15;
++ do {
++ memcpy(&iv[2], raw_buf, 16);
++ aes_decrypt(a, raw_buf, loop_buf);
++ *((u_int64_t *)(&loop_buf[0])) ^= iv[0];
++ *((u_int64_t *)(&loop_buf[8])) ^= iv[1];
++ raw_buf += 16;
++ loop_buf += 16;
++ memcpy(iv, raw_buf, 16);
++ aes_decrypt(a, raw_buf, loop_buf);
++ *((u_int64_t *)(&loop_buf[0])) ^= iv[2];
++ *((u_int64_t *)(&loop_buf[8])) ^= iv[3];
++ raw_buf += 16;
++ loop_buf += 16;
++ } while(--x >= 0);
++ /* compute correct IV */
++ memcpy(&iv[0], &m->partialMD5[0], 16);
++ memcpy(&iv[2], &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3_2x(devSect, (u_int32_t *)iv, (u_int32_t *)(loop_buf - 1008));
++ /* XOR with correct IV now */
++ *((u_int64_t *)(loop_buf - 1024)) ^= iv[0];
++ *((u_int64_t *)(loop_buf - 1016)) ^= iv[1];
++ *((u_int64_t *)(loop_buf - 512)) ^= iv[2];
++ *((u_int64_t *)(loop_buf - 504)) ^= iv[3];
++ size -= 2*512;
++ devSect += 2;
++ }
++#endif /* defined(HAVE_MD5_2X_IMPLEMENTATION) */
++ while(size) {
++ /* decrypt one sector at a time */
++ a = m->keyPtr[((unsigned)devSect) & y];
++ /* decrypt using fake all-zero IV */
++ memset(iv, 0, 16);
++ x = 15;
++ do {
++ memcpy(&iv[2], raw_buf, 16);
++ aes_decrypt(a, raw_buf, loop_buf);
++ *((u_int64_t *)(&loop_buf[0])) ^= iv[0];
++ *((u_int64_t *)(&loop_buf[8])) ^= iv[1];
++ raw_buf += 16;
++ loop_buf += 16;
++ memcpy(iv, raw_buf, 16);
++ aes_decrypt(a, raw_buf, loop_buf);
++ *((u_int64_t *)(&loop_buf[0])) ^= iv[2];
++ *((u_int64_t *)(&loop_buf[8])) ^= iv[3];
++ raw_buf += 16;
++ loop_buf += 16;
++ } while(--x >= 0);
++ if(y) {
++ /* multi-key mode, compute correct IV */
++ memcpy(iv, &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3(devSect, (u_int32_t *)iv, (u_int32_t *)(loop_buf - 496));
++ } else {
++ /* single-key mode, compute correct IV */
++ loop_compute_sector_iv(devSect, (u_int32_t *)iv);
++ }
++ /* XOR with correct IV now */
++ *((u_int64_t *)(loop_buf - 512)) ^= iv[0];
++ *((u_int64_t *)(loop_buf - 504)) ^= iv[1];
++ size -= 512;
++ devSect++;
++ }
++ } else {
++#if defined(HAVE_MD5_2X_IMPLEMENTATION) && (LINUX_VERSION_CODE >= 0x20400)
++ /* if possible, use faster 2x MD5 implementation, currently AMD64 only (#5) */
++ while((size >= (2*512)) && y) {
++ /* multi-key mode, encrypt 2 sectors at a time */
++ memcpy(raw_buf, loop_buf, 2*512);
++ memcpy(&iv[0], &m->partialMD5[0], 16);
++ memcpy(&iv[2], &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3_2x(devSect, (u_int32_t *)iv, (u_int32_t *)(&raw_buf[16]));
++ /* first sector */
++ a = m->keyPtr[((unsigned)devSect ) & y];
++ dip = &iv[0];
++ x = 15;
++ do {
++ *((u_int64_t *)(&raw_buf[0])) ^= dip[0];
++ *((u_int64_t *)(&raw_buf[8])) ^= dip[1];
++ aes_encrypt(a, raw_buf, raw_buf);
++ dip = (u_int64_t *)raw_buf;
++ raw_buf += 16;
++ *((u_int64_t *)(&raw_buf[0])) ^= dip[0];
++ *((u_int64_t *)(&raw_buf[8])) ^= dip[1];
++ aes_encrypt(a, raw_buf, raw_buf);
++ dip = (u_int64_t *)raw_buf;
++ raw_buf += 16;
++ } while(--x >= 0);
++ /* second sector */
++ a = m->keyPtr[((unsigned)devSect + 1) & y];
++ dip = &iv[2];
++ x = 15;
++ do {
++ *((u_int64_t *)(&raw_buf[0])) ^= dip[0];
++ *((u_int64_t *)(&raw_buf[8])) ^= dip[1];
++ aes_encrypt(a, raw_buf, raw_buf);
++ dip = (u_int64_t *)raw_buf;
++ raw_buf += 16;
++ *((u_int64_t *)(&raw_buf[0])) ^= dip[0];
++ *((u_int64_t *)(&raw_buf[8])) ^= dip[1];
++ aes_encrypt(a, raw_buf, raw_buf);
++ dip = (u_int64_t *)raw_buf;
++ raw_buf += 16;
++ } while(--x >= 0);
++ loop_buf += 2*512;
++ size -= 2*512;
++ devSect += 2;
++ }
++#endif /* defined(HAVE_MD5_2X_IMPLEMENTATION) && (LINUX_VERSION_CODE >= 0x20400) */
++ while(size) {
++ /* encrypt one sector at a time */
++ a = m->keyPtr[((unsigned)devSect) & y];
++ if(y) {
++ /* multi-key mode encrypt, linux 2.4 and newer */
++ memcpy(raw_buf, loop_buf, 512);
++ memcpy(iv, &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3(devSect, (u_int32_t *)iv, (u_int32_t *)(&raw_buf[16]));
++ dip = iv;
++ x = 15;
++ do {
++ *((u_int64_t *)(&raw_buf[0])) ^= dip[0];
++ *((u_int64_t *)(&raw_buf[8])) ^= dip[1];
++ aes_encrypt(a, raw_buf, raw_buf);
++ dip = (u_int64_t *)raw_buf;
++ raw_buf += 16;
++ *((u_int64_t *)(&raw_buf[0])) ^= dip[0];
++ *((u_int64_t *)(&raw_buf[8])) ^= dip[1];
++ aes_encrypt(a, raw_buf, raw_buf);
++ dip = (u_int64_t *)raw_buf;
++ raw_buf += 16;
++ } while(--x >= 0);
++ loop_buf += 512;
++ } else {
++ /* single-key mode encrypt */
++ loop_compute_sector_iv(devSect, (u_int32_t *)iv);
++ dip = iv;
++ x = 15;
++ do {
++ iv[2] = *((u_int64_t *)(&loop_buf[0])) ^ dip[0];
++ iv[3] = *((u_int64_t *)(&loop_buf[8])) ^ dip[1];
++ aes_encrypt(a, (unsigned char *)(&iv[2]), raw_buf);
++ dip = (u_int64_t *)raw_buf;
++ loop_buf += 16;
++ raw_buf += 16;
++ iv[2] = *((u_int64_t *)(&loop_buf[0])) ^ dip[0];
++ iv[3] = *((u_int64_t *)(&loop_buf[8])) ^ dip[1];
++ aes_encrypt(a, (unsigned char *)(&iv[2]), raw_buf);
++ dip = (u_int64_t *)raw_buf;
++ loop_buf += 16;
++ raw_buf += 16;
++ } while(--x >= 0);
++ }
++ size -= 512;
++ devSect++;
++ }
++ }
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ read_unlock(&m->rwlock);
++#endif
++ cond_resched();
++ return(0);
++}
++
++#if defined(CONFIG_BLK_DEV_LOOP_PADLOCK) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++static __inline__ void padlock_flush_key_context(void)
++{
++ __asm__ __volatile__("pushf; popf" : : : "cc");
++}
++
++static __inline__ void padlock_rep_xcryptcbc(void *cw, void *k, void *s, void *d, void *iv, unsigned long cnt)
++{
++ __asm__ __volatile__(".byte 0xF3,0x0F,0xA7,0xD0"
++ : "+a" (iv), "+c" (cnt), "+S" (s), "+D" (d) /*output*/
++ : "b" (k), "d" (cw) /*input*/
++ : "cc", "memory" /*modified*/ );
++}
++
++typedef struct {
++#if defined(HAVE_MD5_2X_IMPLEMENTATION)
++ u_int64_t iv[2*2];
++#else
++ u_int64_t iv[2];
++#endif
++ u_int32_t cw[4];
++ u_int32_t dummy1[4];
++} Padlock_IV_CW;
++
++static int transfer_padlock_aes(struct loop_device *lo, int cmd, char *raw_buf,
++ char *loop_buf, int size, sector_t devSect)
++{
++ aes_context *a;
++ AESmultiKey *m;
++ unsigned y;
++ Padlock_IV_CW ivcwua;
++ Padlock_IV_CW *ivcw;
++
++ /* ivcw->iv and ivcw->cw must have 16 byte alignment */
++ ivcw = (Padlock_IV_CW *)(((unsigned long)&ivcwua + 15) & ~((unsigned long)15));
++ ivcw->cw[3] = ivcw->cw[2] = ivcw->cw[1] = 0;
++
++ if(!size || (size & 511) || (((unsigned long)raw_buf | (unsigned long)loop_buf) & 15)) {
++ return -EINVAL;
++ }
++ m = (AESmultiKey *)lo->key_data;
++ y = m->keyMask;
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ read_lock(&m->rwlock);
++#endif
++ if(cmd == READ) {
++ ivcw->cw[0] = m->padlock_cw_d;
++#if defined(HAVE_MD5_2X_IMPLEMENTATION)
++ /* if possible, use faster 2x MD5 implementation, currently AMD64 only (#4) */
++ while((size >= (2*512)) && y) {
++ /* decrypt using fake all-zero IV */
++ memset(&ivcw->iv[0], 0, 2*16);
++ a = m->keyPtr[((unsigned)devSect ) & y];
++ padlock_flush_key_context();
++ padlock_rep_xcryptcbc(&ivcw->cw[0], &a->aes_d_key[0], raw_buf, loop_buf, &ivcw->iv[0], 32);
++ a = m->keyPtr[((unsigned)devSect + 1) & y];
++ padlock_flush_key_context();
++ padlock_rep_xcryptcbc(&ivcw->cw[0], &a->aes_d_key[0], raw_buf + 512, loop_buf + 512, &ivcw->iv[2], 32);
++ /* compute correct IV */
++ memcpy(&ivcw->iv[0], &m->partialMD5[0], 16);
++ memcpy(&ivcw->iv[2], &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3_2x(devSect, (u_int32_t *)(&ivcw->iv[0]), (u_int32_t *)(&loop_buf[16]));
++ /* XOR with correct IV now */
++ *((u_int64_t *)(&loop_buf[0])) ^= ivcw->iv[0];
++ *((u_int64_t *)(&loop_buf[8])) ^= ivcw->iv[1];
++ *((u_int64_t *)(&loop_buf[512 + 0])) ^= ivcw->iv[2];
++ *((u_int64_t *)(&loop_buf[512 + 8])) ^= ivcw->iv[3];
++ size -= 2*512;
++ raw_buf += 2*512;
++ loop_buf += 2*512;
++ devSect += 2;
++ }
++#endif /* defined(HAVE_MD5_2X_IMPLEMENTATION) */
++ while(size) {
++ a = m->keyPtr[((unsigned)devSect) & y];
++ padlock_flush_key_context();
++ if(y) {
++ /* decrypt using fake all-zero IV */
++ memset(&ivcw->iv[0], 0, 16);
++ padlock_rep_xcryptcbc(&ivcw->cw[0], &a->aes_d_key[0], raw_buf, loop_buf, &ivcw->iv[0], 32);
++ /* compute correct IV */
++ memcpy(&ivcw->iv[0], &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3(devSect, (u_int32_t *)(&ivcw->iv[0]), (u_int32_t *)(&loop_buf[16]));
++ /* XOR with correct IV now */
++ *((u_int64_t *)(&loop_buf[ 0])) ^= ivcw->iv[0];
++ *((u_int64_t *)(&loop_buf[ 8])) ^= ivcw->iv[1];
++ } else {
++ loop_compute_sector_iv(devSect, (u_int32_t *)(&ivcw->iv[0]));
++ padlock_rep_xcryptcbc(&ivcw->cw[0], &a->aes_d_key[0], raw_buf, loop_buf, &ivcw->iv[0], 32);
++ }
++ size -= 512;
++ raw_buf += 512;
++ loop_buf += 512;
++ devSect++;
++ }
++ } else {
++ ivcw->cw[0] = m->padlock_cw_e;
++#if defined(HAVE_MD5_2X_IMPLEMENTATION)
++ /* if possible, use faster 2x MD5 implementation, currently AMD64 only (#3) */
++ while((size >= (2*512)) && y) {
++ memcpy(raw_buf, loop_buf, 2*512);
++ memcpy(&ivcw->iv[0], &m->partialMD5[0], 16);
++ memcpy(&ivcw->iv[2], &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3_2x(devSect, (u_int32_t *)(&ivcw->iv[0]), (u_int32_t *)(&raw_buf[16]));
++ a = m->keyPtr[((unsigned)devSect ) & y];
++ padlock_flush_key_context();
++ padlock_rep_xcryptcbc(&ivcw->cw[0], &a->aes_e_key[0], raw_buf, raw_buf, &ivcw->iv[0], 32);
++ a = m->keyPtr[((unsigned)devSect + 1) & y];
++ padlock_flush_key_context();
++ padlock_rep_xcryptcbc(&ivcw->cw[0], &a->aes_e_key[0], raw_buf + 512, raw_buf + 512, &ivcw->iv[2], 32);
++ size -= 2*512;
++ raw_buf += 2*512;
++ loop_buf += 2*512;
++ devSect += 2;
++ }
++#endif /* defined(HAVE_MD5_2X_IMPLEMENTATION) */
++ while(size) {
++ a = m->keyPtr[((unsigned)devSect) & y];
++ padlock_flush_key_context();
++ if(y) {
++ memcpy(raw_buf, loop_buf, 512);
++ memcpy(&ivcw->iv[0], &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3(devSect, (u_int32_t *)(&ivcw->iv[0]), (u_int32_t *)(&raw_buf[16]));
++ padlock_rep_xcryptcbc(&ivcw->cw[0], &a->aes_e_key[0], raw_buf, raw_buf, &ivcw->iv[0], 32);
++ } else {
++ loop_compute_sector_iv(devSect, (u_int32_t *)(&ivcw->iv[0]));
++ padlock_rep_xcryptcbc(&ivcw->cw[0], &a->aes_e_key[0], loop_buf, raw_buf, &ivcw->iv[0], 32);
++ }
++ size -= 512;
++ raw_buf += 512;
++ loop_buf += 512;
++ devSect++;
++ }
++ }
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ read_unlock(&m->rwlock);
++#endif
++ cond_resched();
++ return(0);
++}
++#endif
++
++#if defined(CONFIG_BLK_DEV_LOOP_INTELAES) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++asmlinkage extern void intel_aes_cbc_encrypt(const aes_context *, void *src, void *dst, size_t len, void *iv);
++asmlinkage extern void intel_aes_cbc_decrypt(const aes_context *, void *src, void *dst, size_t len, void *iv);
++asmlinkage extern void intel_aes_cbc_enc_4x512(aes_context **, void *src, void *dst, void *iv);
++
++static int transfer_intel_aes(struct loop_device *lo, int cmd, char *raw_buf,
++ char *loop_buf, int size, sector_t devSect)
++{
++ aes_context *acpa[4];
++ AESmultiKey *m;
++ unsigned y;
++ u_int64_t ivua[(4*2)+2];
++ u_int64_t *iv;
++
++ /* make iv 16 byte aligned */
++ iv = (u_int64_t *)(((unsigned long)&ivua + 15) & ~((unsigned long)15));
++
++ if(!size || (size & 511) || (((unsigned long)raw_buf | (unsigned long)loop_buf) & 15)) {
++ return -EINVAL;
++ }
++ m = (AESmultiKey *)lo->key_data;
++ y = m->keyMask;
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ read_lock(&m->rwlock);
++#endif
++ kernel_fpu_begin(); /* intel_aes_* code uses xmm registers */
++ if(cmd == READ) {
++#if defined(HAVE_MD5_2X_IMPLEMENTATION)
++ /* if possible, use faster 2x MD5 implementation, currently AMD64 only (#2) */
++ while((size >= (2*512)) && y) {
++ acpa[0] = m->keyPtr[((unsigned)devSect ) & y];
++ acpa[1] = m->keyPtr[((unsigned)devSect + 1) & y];
++ /* decrypt using fake all-zero IV */
++ memset(iv, 0, 2*16);
++ intel_aes_cbc_decrypt(acpa[0], raw_buf, loop_buf, 512, &iv[0]);
++ intel_aes_cbc_decrypt(acpa[1], raw_buf + 512, loop_buf + 512, 512, &iv[2]);
++ /* compute correct IV, use 2x parallelized version */
++ memcpy(&iv[0], &m->partialMD5[0], 16);
++ memcpy(&iv[2], &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3_2x(devSect, (u_int32_t *)iv, (u_int32_t *)(&loop_buf[16]));
++ /* XOR with correct IV now */
++ *((u_int64_t *)(&loop_buf[0])) ^= iv[0];
++ *((u_int64_t *)(&loop_buf[8])) ^= iv[1];
++ *((u_int64_t *)(&loop_buf[512 + 0])) ^= iv[2];
++ *((u_int64_t *)(&loop_buf[512 + 8])) ^= iv[3];
++ size -= 2*512;
++ raw_buf += 2*512;
++ loop_buf += 2*512;
++ devSect += 2;
++ }
++#endif /* defined(HAVE_MD5_2X_IMPLEMENTATION) */
++ while(size) {
++ acpa[0] = m->keyPtr[((unsigned)devSect) & y];
++ if(y) {
++ /* decrypt using fake all-zero IV */
++ memset(iv, 0, 16);
++ intel_aes_cbc_decrypt(acpa[0], raw_buf, loop_buf, 512, iv);
++ /* compute correct IV */
++ memcpy(iv, &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3(devSect, (u_int32_t *)iv, (u_int32_t *)(&loop_buf[16]));
++ /* XOR with correct IV now */
++ *((u_int64_t *)(&loop_buf[0])) ^= iv[0];
++ *((u_int64_t *)(&loop_buf[8])) ^= iv[1];
++ } else {
++ loop_compute_sector_iv(devSect, (u_int32_t *)iv);
++ intel_aes_cbc_decrypt(acpa[0], raw_buf, loop_buf, 512, iv);
++ }
++ size -= 512;
++ raw_buf += 512;
++ loop_buf += 512;
++ devSect++;
++ }
++ } else {
++ /* if possible, use faster 4-chains at a time encrypt implementation (#1) */
++ while(size >= (4*512)) {
++ acpa[0] = m->keyPtr[((unsigned)devSect ) & y];
++ acpa[1] = m->keyPtr[((unsigned)devSect + 1) & y];
++ acpa[2] = m->keyPtr[((unsigned)devSect + 2) & y];
++ acpa[3] = m->keyPtr[((unsigned)devSect + 3) & y];
++ if(y) {
++ memcpy(raw_buf, loop_buf, 4*512);
++ memcpy(&iv[0], &m->partialMD5[0], 16);
++ memcpy(&iv[2], &m->partialMD5[0], 16);
++ memcpy(&iv[4], &m->partialMD5[0], 16);
++ memcpy(&iv[6], &m->partialMD5[0], 16);
++#if defined(HAVE_MD5_2X_IMPLEMENTATION)
++ /* use 2x parallelized version */
++ loop_compute_md5_iv_v3_2x(devSect, (u_int32_t *)(&iv[0]), (u_int32_t *)(&raw_buf[ 16]));
++ loop_compute_md5_iv_v3_2x(devSect + 2, (u_int32_t *)(&iv[4]), (u_int32_t *)(&raw_buf[0x400 + 16]));
++#else
++ loop_compute_md5_iv_v3(devSect, (u_int32_t *)(&iv[0]), (u_int32_t *)(&raw_buf[ 16]));
++ loop_compute_md5_iv_v3(devSect + 1, (u_int32_t *)(&iv[2]), (u_int32_t *)(&raw_buf[0x200 + 16]));
++ loop_compute_md5_iv_v3(devSect + 2, (u_int32_t *)(&iv[4]), (u_int32_t *)(&raw_buf[0x400 + 16]));
++ loop_compute_md5_iv_v3(devSect + 3, (u_int32_t *)(&iv[6]), (u_int32_t *)(&raw_buf[0x600 + 16]));
++#endif
++ intel_aes_cbc_enc_4x512(&acpa[0], raw_buf, raw_buf, iv);
++ } else {
++ loop_compute_sector_iv(devSect, (u_int32_t *)(&iv[0]));
++ loop_compute_sector_iv(devSect + 1, (u_int32_t *)(&iv[2]));
++ loop_compute_sector_iv(devSect + 2, (u_int32_t *)(&iv[4]));
++ loop_compute_sector_iv(devSect + 3, (u_int32_t *)(&iv[6]));
++ intel_aes_cbc_enc_4x512(&acpa[0], loop_buf, raw_buf, iv);
++ }
++ size -= 4*512;
++ raw_buf += 4*512;
++ loop_buf += 4*512;
++ devSect += 4;
++ }
++ /* encrypt the rest (if any) using slower 1-chain at a time implementation */
++ while(size) {
++ acpa[0] = m->keyPtr[((unsigned)devSect) & y];
++ if(y) {
++ memcpy(raw_buf, loop_buf, 512);
++ memcpy(iv, &m->partialMD5[0], 16);
++ loop_compute_md5_iv_v3(devSect, (u_int32_t *)iv, (u_int32_t *)(&raw_buf[16]));
++ intel_aes_cbc_encrypt(acpa[0], raw_buf, raw_buf, 512, iv);
++ } else {
++ loop_compute_sector_iv(devSect, (u_int32_t *)iv);
++ intel_aes_cbc_encrypt(acpa[0], loop_buf, raw_buf, 512, iv);
++ }
++ size -= 512;
++ raw_buf += 512;
++ loop_buf += 512;
++ devSect++;
++ }
++ }
++ kernel_fpu_end(); /* intel_aes_* code uses xmm registers */
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ read_unlock(&m->rwlock);
++#endif
++ cond_resched();
++ return(0);
++}
++#endif
++
++static struct loop_func_table funcs_aes = {
++ number: 16, /* 16 == AES */
++ transfer: transfer_aes,
++ init: keySetup_aes,
++ release: keyClean_aes,
++ ioctl: handleIoctl_aes
++};
++
++#if defined(CONFIG_BLK_DEV_LOOP_PADLOCK) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++static struct loop_func_table funcs_padlock_aes = {
++ number: 16, /* 16 == AES */
++ transfer: transfer_padlock_aes,
++ init: keySetup_aes,
++ release: keyClean_aes,
++ ioctl: handleIoctl_aes
++};
++#endif
++
++#if defined(CONFIG_BLK_DEV_LOOP_INTELAES) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++static struct loop_func_table funcs_intel_aes = {
++ number: 16, /* 16 == AES */
++ transfer: transfer_intel_aes,
++ init: keySetup_aes,
++ release: keyClean_aes,
++ ioctl: handleIoctl_aes
++};
++#endif
++
++#if defined(CONFIG_BLK_DEV_LOOP_PADLOCK) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++static int CentaurHauls_ID_and_enabled_ACE(void)
++{
++ unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
++
++ /* check for "CentaurHauls" ID string, and enabled ACE */
++ cpuid(0x00000000, &eax, &ebx, &ecx, &edx);
++ if((ebx == 0x746e6543) && (edx == 0x48727561) && (ecx == 0x736c7561)
++ && (cpuid_eax(0xC0000000) >= 0xC0000001)
++ && ((cpuid_edx(0xC0000001) & 0xC0) == 0xC0)) {
++ return 1; /* ACE enabled */
++ }
++ return 0;
++}
++#endif
++
++EXPORT_SYMBOL(loop_compute_sector_iv);
++EXPORT_SYMBOL(loop_compute_md5_iv_v3);
++EXPORT_SYMBOL(loop_compute_md5_iv);
++EXPORT_SYMBOL(md5_transform_CPUbyteorder_C);
++#endif /* CONFIG_BLK_DEV_LOOP_AES */
++
++/* xfer_funcs[0] is special - its release function is never called */
++static struct loop_func_table *xfer_funcs[MAX_LO_CRYPT] = {
++ &none_funcs,
++ &xor_funcs,
++#ifdef CONFIG_BLK_DEV_LOOP_AES
++ [LO_CRYPT_AES] = &funcs_aes,
++#endif
++};
++
++/*
++ * First number of 'lo_prealloc' is the default number of RAM pages
++ * to pre-allocate for each device backed loop. Every (configured)
++ * device backed loop pre-allocates this amount of RAM pages unless
++ * later 'lo_prealloc' numbers provide an override. 'lo_prealloc'
++ * overrides are defined in pairs: loop_index,number_of_pages
++ */
++static int lo_prealloc[9] = { 256, -1, 0, -1, 0, -1, 0, -1, 0 };
++#define LO_PREALLOC_MIN 4 /* minimum user defined pre-allocated RAM pages */
++#define LO_PREALLOC_MAX 4096 /* maximum user defined pre-allocated RAM pages */
++
++#ifdef MODULE
++static int dummy1;
++module_param_array(lo_prealloc, int, &dummy1, 0);
++MODULE_PARM_DESC(lo_prealloc, "Number of pre-allocated pages [,index,pages]...");
++#else
++static int __init lo_prealloc_setup(char *str)
++{
++ int x, y, z;
++
++ for (x = 0; x < (sizeof(lo_prealloc) / sizeof(int)); x++) {
++ z = get_option(&str, &y);
++ if (z > 0)
++ lo_prealloc[x] = y;
++ if (z < 2)
++ break;
++ }
++ return 1;
++}
++__setup("lo_prealloc=", lo_prealloc_setup);
++#endif
++
++/*
++ * First number of 'lo_threads' is the default number of helper threads to
++ * create for each device backed loop device. Every (configured) device
++ * backed loop device has this many threads unless later 'lo_threads'
++ * numbers provide an override. File backed loops always have 1 helper
++ * thread. 'lo_threads' overrides are defined in pairs: loop_index,threads
++ *
++ * This value is ignored on 2.6.18 and older kernels.
++ */
++static int lo_threads[9] = { 1, -1, 0, -1, 0, -1, 0, -1, 0 };
++#define LO_THREADS_MIN 1 /* minimum user defined thread count */
++#define LO_THREADS_MAX 4 /* maximum user defined thread count */
++
++#ifdef MODULE
++static int dummy2;
++module_param_array(lo_threads, int, &dummy2, 0);
++MODULE_PARM_DESC(lo_threads, "Number of threads per loop [,index,threads]...");
++#else
++static int __init lo_threads_setup(char *str)
++{
++ int x, y, z;
++
++ for (x = 0; x < (sizeof(lo_threads) / sizeof(int)); x++) {
++ z = get_option(&str, &y);
++ if (z > 0)
++ lo_threads[x] = y;
++ if (z < 2)
++ break;
++ }
++ return 1;
++}
++__setup("lo_threads=", lo_threads_setup);
++#endif
++
++/*
++ * This is loop helper thread nice value in range
++ * from 0 (low priority) to -20 (high priority).
++ */
++static int lo_nice = -1;
++
++#ifdef MODULE
++module_param(lo_nice, int, 0);
++MODULE_PARM_DESC(lo_nice, "Loop thread scheduler nice (0 ... -20)");
++#else
++static int __init lo_nice_setup(char *str)
++{
++ int y;
++
++ if (get_option(&str, &y) == 1)
++ lo_nice = y;
++ return 1;
++}
++__setup("lo_nice=", lo_nice_setup);
++#endif
++
++struct loop_bio_extension {
++ struct bio *bioext_merge;
++ struct loop_device *bioext_loop;
++ struct bio_vec *bioext_bi_io_vec_orig;
++ sector_t bioext_iv;
++ int bioext_index;
++ int bioext_size;
++ unsigned int bioext_bi_max_vecs_orig;
++#if LINUX_VERSION_CODE >= 0x30e00
++ unsigned int bioext_done_offset;
++#endif
++};
++
++#if LINUX_VERSION_CODE >= 0x30e00
++# define LOOP_COMPAT_BI_SECTOR bi_iter.bi_sector
++# define LOOP_COMPAT_BI_SIZE bi_iter.bi_size
++# define LOOP_COMPAT_BI_IDX bi_iter.bi_idx
++#else
++# define LOOP_COMPAT_BI_SECTOR bi_sector
++# define LOOP_COMPAT_BI_SIZE bi_size
++# define LOOP_COMPAT_BI_IDX bi_idx
++#endif
++
++static struct loop_device **loop_dev_ptr_arr;
++
++static void loop_prealloc_cleanup(struct loop_device *lo)
++{
++ struct bio *bio;
++ struct loop_bio_extension *extension;
++
++ while ((bio = lo->lo_bio_free0)) {
++ lo->lo_bio_free0 = bio->bi_next;
++ extension = bio->bi_private;
++ bio->bi_io_vec = extension->bioext_bi_io_vec_orig;
++ bio->bi_max_vecs = extension->bioext_bi_max_vecs_orig;
++ bio->bi_vcnt = 1;
++ __free_page(bio->bi_io_vec[0].bv_page);
++ kfree(extension);
++ bio->bi_next = NULL;
++ bio_put(bio);
++ }
++ while ((bio = lo->lo_bio_free1)) {
++ lo->lo_bio_free1 = bio->bi_next;
++ /* bi_flags bit 0 was used for other purpose */
++ clear_bit(0, &bio->bi_flags);
++ /* bi_size was used for other purpose */
++ bio->LOOP_COMPAT_BI_SIZE = 0;
++ /* bi_cnt was used for other purpose */
++ atomic_set(&bio->bi_cnt, 1);
++ bio->bi_next = NULL;
++ bio_put(bio);
++ }
++}
++
++static int loop_prealloc_init(struct loop_device *lo, int y)
++{
++ struct bio *bio;
++ struct loop_bio_extension *extension;
++ int x;
++
++ if(!y) {
++ y = lo_prealloc[0];
++ for (x = 1; x < (sizeof(lo_prealloc) / sizeof(int)); x += 2) {
++ if (lo_prealloc[x + 1] && (lo->lo_number == lo_prealloc[x])) {
++ y = lo_prealloc[x + 1];
++ break;
++ }
++ }
++ }
++ lo->lo_bio_flshMax = (y * 3) / 4;
++ lo->lo_bio_flshCnt = 0;
++
++ for (x = 0; x < y; x++) {
++ bio = bio_alloc(GFP_KERNEL, 1);
++ if (!bio) {
++ fail1:
++ loop_prealloc_cleanup(lo);
++ return 1;
++ }
++ bio->bi_io_vec[0].bv_page = alloc_page(GFP_KERNEL);
++ if (!bio->bi_io_vec[0].bv_page) {
++ fail2:
++ bio->bi_next = NULL;
++ bio_put(bio);
++ goto fail1;
++ }
++ memset(page_address(bio->bi_io_vec[0].bv_page), 0, PAGE_SIZE);
++ bio->bi_vcnt = 1;
++ extension = kmalloc(sizeof(struct loop_bio_extension), GFP_KERNEL);
++ if (!extension) {
++ __free_page(bio->bi_io_vec[0].bv_page);
++ goto fail2;
++ }
++ bio->bi_private = extension;
++ extension->bioext_bi_io_vec_orig = bio->bi_io_vec;
++ extension->bioext_bi_max_vecs_orig = bio->bi_max_vecs;
++ bio->bi_next = lo->lo_bio_free0;
++ lo->lo_bio_free0 = bio;
++
++ bio = bio_alloc(GFP_KERNEL, 1);
++ if (!bio)
++ goto fail1;
++ bio->bi_vcnt = 1;
++ bio->bi_next = lo->lo_bio_free1;
++ lo->lo_bio_free1 = bio;
++ }
++ return 0;
++}
++
++static void loop_add_queue_last(struct loop_device *lo, struct bio *bio, struct bio **q)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&lo->lo_lock, flags);
++ if (*q) {
++ bio->bi_next = (*q)->bi_next;
++ (*q)->bi_next = bio;
++ } else {
++ bio->bi_next = bio;
++ }
++ *q = bio;
++ spin_unlock_irqrestore(&lo->lo_lock, flags);
++
++ if (waitqueue_active(&lo->lo_bio_wait))
++ wake_up_interruptible_all(&lo->lo_bio_wait);
++}
++
++static struct bio *loop_get_bio(struct loop_device *lo)
++{
++ struct bio *bio = NULL, *last;
++
++ spin_lock_irq(&lo->lo_lock);
++ if ((last = lo->lo_bio_que0)) {
++ bio = last->bi_next;
++ if (bio == last)
++ lo->lo_bio_que0 = NULL;
++ else
++ last->bi_next = bio->bi_next;
++ bio->bi_next = NULL;
++ }
++ spin_unlock_irq(&lo->lo_lock);
++ return bio;
++}
++
++static void loop_put_buffer(struct loop_device *lo, struct bio *b, int flist)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&lo->lo_lock, flags);
++ if(!flist) {
++ b->bi_next = lo->lo_bio_free0;
++ lo->lo_bio_free0 = b;
++ } else {
++ b->bi_next = lo->lo_bio_free1;
++ lo->lo_bio_free1 = b;
++ }
++ spin_unlock_irqrestore(&lo->lo_lock, flags);
++
++ if (waitqueue_active(&lo->lo_buf_wait))
++ wake_up_all(&lo->lo_buf_wait);
++}
++
++static void loop_end_io_transfer(struct bio *bio, int err)
++{
++ struct loop_bio_extension *extension = bio->bi_private;
++ struct bio *merge = extension->bioext_merge;
++ struct loop_device *lo = extension->bioext_loop;
++ struct bio *origbio = merge->bi_private;
++
++ if (err) {
++ merge->LOOP_COMPAT_BI_SIZE = err; /* used as error code */
++ if(err == -EIO)
++ clear_bit(0, &merge->bi_flags);
++ printk(KERN_ERR "loop%d: loop_end_io_transfer err=%d bi_rw=0x%lx\n", lo->lo_number, err, bio->bi_rw);
++ }
++ if (bio_rw(bio) == WRITE) {
++ loop_put_buffer(lo, bio, 0);
++ if (!atomic_dec_and_test(&merge->bi_cnt)) {
++ return;
++ }
++ origbio->bi_next = NULL;
++ bio_endio(origbio, test_bit(0, &merge->bi_flags) ? (int)merge->LOOP_COMPAT_BI_SIZE : -EIO);
++ loop_put_buffer(lo, merge, 1);
++ if (atomic_dec_and_test(&lo->lo_pending))
++ wake_up_interruptible_all(&lo->lo_bio_wait);
++ } else {
++ loop_add_queue_last(lo, bio, &lo->lo_bio_que0);
++ }
++}
++
++static struct bio *loop_get_buffer(struct loop_device *lo, struct bio *orig_bio,
++ struct bio **merge_ptr, int *flushPtr, int origHasData, int *lastVePtr)
++{
++ struct bio *bio = NULL, *merge = *merge_ptr, *fbtst;
++ struct loop_bio_extension *extension;
++ int len, nzCnt, flsh = 0, firstVec, lastVec;
++
++ spin_lock_irq(&lo->lo_lock);
++ if (!merge) {
++ merge = lo->lo_bio_free1;
++ if (merge) {
++ lo->lo_bio_free1 = merge->bi_next;
++ }
++ }
++ if (merge) {
++ bio = lo->lo_bio_free0;
++ if (bio) {
++ lo->lo_bio_free0 = bio->bi_next;
++ }
++ }
++ fbtst = lo->lo_bio_free0;
++ if(!fbtst || !fbtst->bi_next) {
++ flsh = 1;
++ }
++ fbtst = lo->lo_bio_free1;
++ if(!fbtst || !fbtst->bi_next) {
++ flsh = 1;
++ }
++ spin_unlock_irq(&lo->lo_lock);
++
++ *flushPtr = flsh;
++
++ if (!(*merge_ptr) && merge) {
++ /*
++ * initialize "merge-bio" which is used as
++ * rendezvous point among multiple vecs
++ */
++ *merge_ptr = merge;
++ merge->LOOP_COMPAT_BI_SECTOR = orig_bio->LOOP_COMPAT_BI_SECTOR + lo->lo_offs_sec;
++ merge->LOOP_COMPAT_BI_SIZE = 0; /* used as error code */
++ set_bit(0, &merge->bi_flags);
++ merge->LOOP_COMPAT_BI_IDX = orig_bio->LOOP_COMPAT_BI_IDX;
++#if LINUX_VERSION_CODE >= 0x30e00
++ nzCnt = 1;
++ if(origHasData) {
++ /* compute total number of vecs that this driver must process */
++ unsigned int orIdx = orig_bio->LOOP_COMPAT_BI_IDX;
++ unsigned int orSiz = orig_bio->LOOP_COMPAT_BI_SIZE;
++ unsigned int orDon = orig_bio->bi_iter.bi_bvec_done;
++ unsigned int vecRem;
++ do {
++ vecRem = orig_bio->bi_io_vec[orIdx].bv_len - orDon;
++ if(orSiz <= vecRem)
++ break;
++ orSiz -= vecRem;
++ nzCnt++;
++ orIdx++;
++ orDon = 0;
++ } while(1);
++ }
++#else
++ nzCnt = orig_bio->bi_vcnt - orig_bio->LOOP_COMPAT_BI_IDX;
++ if(nzCnt < 1) nzCnt = 1;
++#endif
++ atomic_set(&merge->bi_cnt, nzCnt);
++ merge->bi_private = orig_bio;
++ }
++
++ if (!bio)
++ return NULL;
++
++ extension = bio->bi_private;
++ if(origHasData) {
++ firstVec = (merge->LOOP_COMPAT_BI_IDX == orig_bio->LOOP_COMPAT_BI_IDX) ? 1 : 0;
++#if LINUX_VERSION_CODE >= 0x30e00
++ lastVec = (orig_bio->LOOP_COMPAT_BI_SIZE <= (orig_bio->bi_io_vec[merge->LOOP_COMPAT_BI_IDX].bv_len - orig_bio->bi_iter.bi_bvec_done)) ? 1 : 0;
++#else
++ lastVec = (merge->LOOP_COMPAT_BI_IDX == (orig_bio->bi_vcnt - 1)) ? 1 : 0;
++#endif
++ } else {
++ firstVec = 1;
++ lastVec = 1;
++ }
++ *lastVePtr = lastVec;
++
++ /*
++ * initialize one page "buffer-bio"
++ */
++#if LINUX_VERSION_CODE >= 0x30700
++ bio_reset(bio);
++ bio->bi_private = extension;
++#else
++#if !defined(BIO_RESET_BITS)
++# define BIO_RESET_BITS BIO_POOL_OFFSET
++#endif
++ bio->bi_flags &= (~0UL << BIO_RESET_BITS);
++ bio->bi_flags |= (1 << BIO_UPTODATE);
++#endif
++ bio->LOOP_COMPAT_BI_SECTOR = merge->LOOP_COMPAT_BI_SECTOR;
++ bio->bi_next = NULL;
++ bio->bi_bdev = lo->lo_device;
++
++#if LINUX_VERSION_CODE < 0x30200
++ if(orig_bio->bi_flags & (1 << BIO_CPU_AFFINE)) {
++ bio->bi_comp_cpu = orig_bio->bi_comp_cpu;
++ bio->bi_flags |= (1 << BIO_CPU_AFFINE);
++ }
++#endif
++ /* read-ahead bit needs to be cleared to work around kernel bug */
++ /* that causes I/O errors on -EWOULDBLOCK I/O elevator failures */
++ bio->bi_rw = orig_bio->bi_rw & ~L_BIO_RW_AHEAD;
++
++ if(orig_bio->bi_rw & REQ_FLUSH) {
++ if(!firstVec) {
++ bio->bi_rw &= ~REQ_FLUSH;
++ } else {
++ *flushPtr = 1;
++ }
++ }
++ if(orig_bio->bi_rw & REQ_FUA) {
++ if(!lastVec) {
++ bio->bi_rw &= ~REQ_FUA;
++ } else {
++ *flushPtr = 1;
++ }
++ }
++ if(orig_bio->bi_rw & L_BIO_RW_SYNCIO) {
++ if(!lastVec) {
++ bio->bi_rw &= ~L_BIO_RW_SYNCIO;
++ } else {
++ *flushPtr = 1;
++ }
++ }
++ if(orig_bio->bi_rw & L_BIO_RW_NOIDLE) {
++ if(!lastVec) {
++ bio->bi_rw &= ~L_BIO_RW_NOIDLE;
++ }
++ }
++ if(flsh) {
++ bio->bi_rw |= L_BIO_RW_NOIDLE;
++ }
++
++ bio->LOOP_COMPAT_BI_IDX = 0;
++ bio->bi_phys_segments = 0;
++ if(origHasData) {
++ /* original bio has data */
++ bio->bi_io_vec = extension->bioext_bi_io_vec_orig;
++ bio->bi_max_vecs = extension->bioext_bi_max_vecs_orig;
++ bio->bi_vcnt = 1;
++#if LINUX_VERSION_CODE >= 0x30e00
++ len = orig_bio->bi_io_vec[merge->LOOP_COMPAT_BI_IDX].bv_len - orig_bio->bi_iter.bi_bvec_done;
++ if(len > orig_bio->LOOP_COMPAT_BI_SIZE)
++ len = orig_bio->LOOP_COMPAT_BI_SIZE;
++ bio->LOOP_COMPAT_BI_SIZE = len;
++ extension->bioext_done_offset = orig_bio->bi_iter.bi_bvec_done;
++#else
++ bio->LOOP_COMPAT_BI_SIZE = len = orig_bio->bi_io_vec[merge->LOOP_COMPAT_BI_IDX].bv_len;
++#endif
++ bio->bi_io_vec[0].bv_len = len;
++ bio->bi_io_vec[0].bv_offset = 0;
++ } else {
++ /* original bio does not have data */
++ bio->bi_io_vec = 0;
++ bio->bi_max_vecs = 0;
++ bio->bi_vcnt = 0;
++#if LINUX_VERSION_CODE >= 0x30e00
++ extension->bioext_done_offset = 0;
++#endif
++ bio->LOOP_COMPAT_BI_SIZE = len = 0;
++ }
++
++ bio->bi_seg_front_size = 0;
++ bio->bi_seg_back_size = 0;
++ bio->bi_end_io = loop_end_io_transfer;
++
++ /*
++ * initialize "buffer-bio" extension. This extension is
++ * permanently glued to above "buffer-bio" via bio->bi_private
++ */
++ extension->bioext_merge = merge;
++ extension->bioext_loop = lo;
++ extension->bioext_iv = merge->LOOP_COMPAT_BI_SECTOR - lo->lo_iv_remove;
++ extension->bioext_index = merge->LOOP_COMPAT_BI_IDX;
++ extension->bioext_size = len;
++
++ /*
++ * prepare "merge-bio" for next vec
++ */
++ merge->LOOP_COMPAT_BI_SECTOR += len >> 9;
++ merge->LOOP_COMPAT_BI_IDX++;
++
++#if LINUX_VERSION_CODE >= 0x30e00
++ orig_bio->LOOP_COMPAT_BI_SIZE -= len;
++ orig_bio->bi_iter.bi_bvec_done = 0;
++ bio->bi_iter.bi_bvec_done = 0;
++#endif
++ return bio;
++}
++
++static int figure_loop_size(struct loop_device *lo, struct block_device *bdev)
++{
++ loff_t size, offs;
++ sector_t x;
++ int err = 0;
++
++ size = i_size_read(lo->lo_backing_file->f_path.dentry->d_inode->i_mapping->host);
++ offs = lo->lo_offset;
++ if (!(lo->lo_flags & LO_FLAGS_DO_BMAP))
++ offs &= ~((loff_t)511);
++ if ((offs > 0) && (offs < size)) {
++ size -= offs;
++ } else {
++ if (offs)
++ err = -EINVAL;
++ lo->lo_offset = 0;
++ lo->lo_offs_sec = lo->lo_iv_remove = 0;
++ }
++ if ((lo->lo_sizelimit > 0) && (lo->lo_sizelimit <= size)) {
++ size = lo->lo_sizelimit;
++ } else {
++ if (lo->lo_sizelimit)
++ err = -EINVAL;
++ lo->lo_sizelimit = 0;
++ }
++ size >>= 9;
++
++ /*
++ * Unfortunately, if we want to do I/O on the device,
++ * the number of 512-byte sectors has to fit into a sector_t.
++ */
++ x = (sector_t)size;
++ if ((loff_t)x != size) {
++ err = -EFBIG;
++ size = 0;
++ }
++
++ set_capacity(disks[lo->lo_number], size); /* 512 byte units */
++ i_size_write(bdev->bd_inode, size << 9); /* byte units */
++ return err;
++}
++
++static inline int lo_do_transfer(struct loop_device *lo, int cmd, char *rbuf,
++ char *lbuf, int size, sector_t rblock)
++{
++ if (!lo->transfer)
++ return 0;
++
++ return lo->transfer(lo, cmd, rbuf, lbuf, size, rblock);
++}
++
++static int loop_file_io(struct file *file, char *buf, int size, loff_t *ppos, int w)
++{
++ mm_segment_t fs;
++ int x, y, z;
++
++ y = 0;
++ do {
++ z = size - y;
++ fs = get_fs();
++ set_fs(get_ds());
++ if (w) {
++ x = file->f_op->write(file, buf + y, z, ppos);
++ set_fs(fs);
++ } else {
++ x = file->f_op->read(file, buf + y, z, ppos);
++ set_fs(fs);
++ if (!x)
++ return 1;
++ }
++ if (x < 0) {
++ if ((x == -EAGAIN) || (x == -ENOMEM) || (x == -ERESTART) || (x == -EINTR)) {
++ set_current_state(TASK_INTERRUPTIBLE);
++ schedule_timeout(HZ / 2);
++ continue;
++ }
++ return 1;
++ }
++ y += x;
++ } while (y < size);
++ return 0;
++}
++
++static int do_bio_filebacked(struct loop_device *lo, struct bio *bio)
++{
++ loff_t pos;
++ struct file *file = lo->lo_backing_file;
++ char *data, *buf;
++ unsigned int size, len, more;
++ sector_t IV;
++ struct page *pg;
++#if LINUX_VERSION_CODE >= 0x30e00
++ unsigned int oln;
++#endif
++
++ if(!bio_has_data(bio))
++ return 0;
++
++ pos = ((loff_t) bio->LOOP_COMPAT_BI_SECTOR << 9) + lo->lo_offset;
++ buf = page_address(lo->lo_bio_free0->bi_io_vec[0].bv_page);
++ IV = bio->LOOP_COMPAT_BI_SECTOR;
++ if (!lo->lo_iv_remove)
++ IV += lo->lo_offs_sec;
++ do {
++ pg = bio->bi_io_vec[bio->LOOP_COMPAT_BI_IDX].bv_page;
++#if LINUX_VERSION_CODE >= 0x30e00
++ len = bio->bi_io_vec[bio->LOOP_COMPAT_BI_IDX].bv_len - bio->bi_iter.bi_bvec_done;
++ if(len > bio->LOOP_COMPAT_BI_SIZE)
++ len = bio->LOOP_COMPAT_BI_SIZE;
++ oln = len;
++ data = kmap(pg) + bio->bi_io_vec[bio->LOOP_COMPAT_BI_IDX].bv_offset + bio->bi_iter.bi_bvec_done;
++ bio->bi_iter.bi_bvec_done = 0;
++#else
++ len = bio->bi_io_vec[bio->LOOP_COMPAT_BI_IDX].bv_len;
++ data = kmap(pg) + bio->bi_io_vec[bio->LOOP_COMPAT_BI_IDX].bv_offset;
++#endif
++ while (len > 0) {
++ if (!lo->lo_encryption) {
++ /* this code relies that NONE transfer is a no-op */
++ buf = data;
++ }
++ size = PAGE_CACHE_SIZE;
++ if (size > len)
++ size = len;
++ if (bio_rw(bio) == WRITE) {
++ if (lo_do_transfer(lo, WRITE, buf, data, size, IV)) {
++ printk(KERN_ERR "loop%d: write transfer error, sector %llu\n", lo->lo_number, (unsigned long long)IV);
++ goto kunmap_and_out;
++ }
++ if (loop_file_io(file, buf, size, &pos, 1)) {
++ printk(KERN_ERR "loop%d: write i/o error, sector %llu\n", lo->lo_number, (unsigned long long)IV);
++ goto kunmap_and_out;
++ }
++ } else {
++ if (loop_file_io(file, buf, size, &pos, 0)) {
++ printk(KERN_ERR "loop%d: read i/o error, sector %llu\n", lo->lo_number, (unsigned long long)IV);
++ goto kunmap_and_out;
++ }
++ if (lo_do_transfer(lo, READ, buf, data, size, IV)) {
++ printk(KERN_ERR "loop%d: read transfer error, sector %llu\n", lo->lo_number, (unsigned long long)IV);
++ goto kunmap_and_out;
++ }
++ flush_dcache_page(pg);
++ }
++ data += size;
++ len -= size;
++ IV += size >> 9;
++ }
++ kunmap(pg);
++ bio->LOOP_COMPAT_BI_IDX++;
++#if LINUX_VERSION_CODE >= 0x30e00
++ more = ((bio->LOOP_COMPAT_BI_SIZE -= oln) > 0) ? 1 : 0;
++#else
++ more = (bio->LOOP_COMPAT_BI_IDX < bio->bi_vcnt) ? 1 : 0;
++#endif
++ } while (more);
++ return 0;
++
++kunmap_and_out:
++ kunmap(pg);
++ return -EIO;
++}
++
++static void loop_unplug_backingdev(struct request_queue *bq)
++{
++ struct blk_plug *plug = current->plug;
++ if(plug) {
++ /* A thread may sleep and wait for new buffers from previously submitted requests. */
++ /* Make sure requests are actually sent to backing device, and not just queued. */
++ struct bio_list *blistTmp = current->bio_list;
++ current->bio_list = NULL;
++ blk_finish_plug(plug); /* clears current->plug */
++ current->bio_list = blistTmp;
++ blk_start_plug(plug); /* sets current->plug */
++ }
++}
++
++#if LINUX_VERSION_CODE >= 0x30200
++static void loop_make_request_err(struct request_queue *q, struct bio *old_bio)
++#else
++static int loop_make_request_err(struct request_queue *q, struct bio *old_bio)
++#endif
++{
++ old_bio->bi_next = NULL;
++ bio_io_error(old_bio);
++#if LINUX_VERSION_CODE >= 0x30200
++ return;
++#else
++ return 0;
++#endif
++}
++
++#if LINUX_VERSION_CODE >= 0x30200
++static void loop_make_request_real(struct request_queue *q, struct bio *old_bio)
++#else
++static int loop_make_request_real(struct request_queue *q, struct bio *old_bio)
++#endif
++{
++ struct bio *new_bio, *merge;
++ struct loop_device *lo = q->queuedata;
++ struct loop_bio_extension *extension;
++ int rw = bio_rw(old_bio), y, x, flushFlag = 0, origHasData, lastVec = 0;
++ char *md;
++ wait_queue_t waitq;
++
++ set_current_state(TASK_RUNNING);
++ origHasData = bio_has_data(old_bio);
++ if (!lo)
++ goto out;
++ if ((rw == WRITE) && (lo->lo_flags & LO_FLAGS_READ_ONLY))
++ goto out;
++ atomic_inc(&lo->lo_pending);
++
++ /*
++ * file backed, queue for loop_thread to handle
++ */
++ if (lo->lo_flags & LO_FLAGS_DO_BMAP) {
++ loop_add_queue_last(lo, old_bio, &lo->lo_bio_que0);
++#if LINUX_VERSION_CODE >= 0x30200
++ return;
++#else
++ return 0;
++#endif
++ }
++
++ /*
++ * device backed, just remap bdev & sector for NONE transfer
++ */
++ if (!lo->lo_encryption) {
++ old_bio->LOOP_COMPAT_BI_SECTOR += lo->lo_offs_sec;
++ old_bio->bi_bdev = lo->lo_device;
++ generic_make_request(old_bio);
++ if (atomic_dec_and_test(&lo->lo_pending))
++ wake_up_interruptible_all(&lo->lo_bio_wait);
++#if LINUX_VERSION_CODE >= 0x30200
++ return;
++#else
++ return 0;
++#endif
++ }
++
++ /*
++ * device backed, start reads and writes now if buffer available
++ */
++ merge = NULL;
++ init_waitqueue_entry(&waitq, current);
++ try_next_old_bio_vec:
++ new_bio = loop_get_buffer(lo, old_bio, &merge, &flushFlag, origHasData, &lastVec);
++ if (!new_bio) {
++ /* wait for buffer to be freed, and try again */
++ spin_lock_irq(&lo->lo_lock);
++ lo->lo_bio_flshCnt = 0;
++ spin_unlock_irq(&lo->lo_lock);
++ loop_unplug_backingdev(lo->lo_backingQueue);
++ add_wait_queue(&lo->lo_buf_wait, &waitq);
++ for (;;) {
++ set_current_state(TASK_UNINTERRUPTIBLE);
++ x = 0;
++ spin_lock_irq(&lo->lo_lock);
++ if (!merge && lo->lo_bio_free1) {
++ /* don't sleep if merge bio is available */
++ x = 1;
++ }
++ if (merge && lo->lo_bio_free0) {
++ /* don't sleep if buffer bio is available */
++ x = 1;
++ }
++ spin_unlock_irq(&lo->lo_lock);
++ if (x)
++ break;
++ schedule();
++ }
++ set_current_state(TASK_RUNNING);
++ remove_wait_queue(&lo->lo_buf_wait, &waitq);
++ goto try_next_old_bio_vec;
++ }
++ if ((rw == WRITE) && origHasData) {
++ extension = new_bio->bi_private;
++ y = extension->bioext_index;
++#if LINUX_VERSION_CODE >= 0x30e00
++ md = kmap(old_bio->bi_io_vec[y].bv_page) + old_bio->bi_io_vec[y].bv_offset + extension->bioext_done_offset;
++#else
++ md = kmap(old_bio->bi_io_vec[y].bv_page) + old_bio->bi_io_vec[y].bv_offset;
++#endif
++ if (lo_do_transfer(lo, WRITE, page_address(new_bio->bi_io_vec[0].bv_page), md, extension->bioext_size, extension->bioext_iv)) {
++ clear_bit(0, &merge->bi_flags);
++ }
++ kunmap(old_bio->bi_io_vec[y].bv_page);
++ }
++
++ x = 0;
++ spin_lock_irq(&lo->lo_lock);
++ if((++lo->lo_bio_flshCnt >= lo->lo_bio_flshMax) || flushFlag) {
++ x = 1;
++ lo->lo_bio_flshCnt = 0;
++ new_bio->bi_rw |= L_BIO_RW_NOIDLE;
++ }
++ spin_unlock_irq(&lo->lo_lock);
++
++ /* A thread may sleep and wait for new buffers from previously submitted requests. */
++ /* Make sure requests are actually sent to backing device, and not just queued. */
++ {
++ struct bio_list *blistTmp = current->bio_list;
++ current->bio_list = NULL;
++ generic_make_request(new_bio);
++ current->bio_list = blistTmp;
++ }
++
++ if (x)
++ loop_unplug_backingdev(lo->lo_backingQueue);
++
++ /* other vecs may need processing too */
++ if (!lastVec)
++ goto try_next_old_bio_vec;
++#if LINUX_VERSION_CODE >= 0x30200
++ return;
++#else
++ return 0;
++#endif
++
++out:
++ old_bio->bi_next = NULL;
++ bio_io_error(old_bio);
++#if LINUX_VERSION_CODE >= 0x30200
++ return;
++#else
++ return 0;
++#endif
++}
++
++struct loop_switch_request {
++ struct file *file;
++ struct completion wait;
++};
++
++static void do_loop_switch(struct loop_device *lo, struct loop_switch_request *p)
++{
++ struct file *file = p->file;
++ struct file *old_file=lo->lo_backing_file;
++ struct address_space *mapping = file->f_path.dentry->d_inode->i_mapping;
++
++ /* This code runs on file backed loop only */
++ /* no need to worry about -1 old_gfp_mask */
++ mapping_set_gfp_mask(old_file->f_path.dentry->d_inode->i_mapping, lo->old_gfp_mask);
++ lo->lo_backing_file = file;
++ memset(lo->lo_file_name, 0, LO_NAME_SIZE);
++ lo->old_gfp_mask = mapping_gfp_mask(mapping);
++ mapping_set_gfp_mask(mapping, (lo->old_gfp_mask & ~(__GFP_IO|__GFP_FS)) | __GFP_HIGH);
++ complete(&p->wait);
++}
++
++/*
++ * worker thread that handles reads/writes to file backed loop devices,
++ * to avoid blocking in our make_request_fn. it also does loop decrypting
++ * on reads for block backed loop, as that is too heavy to do from
++ * b_end_io context where irqs may be disabled.
++ */
++static int loop_thread(void *data)
++{
++ struct loop_device *lo = data;
++ struct bio *bio, *xbio, *merge;
++ struct loop_bio_extension *extension;
++ int x = 0, y;
++ wait_queue_t waitq;
++ char *md;
++ static const struct rlimit loop_rlim_defaults[RLIM_NLIMITS] = INIT_RLIMITS;
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ void (*keyscrubFn)(void *) = 0;
++#endif
++
++ init_waitqueue_entry(&waitq, current);
++ memcpy(¤t->signal->rlim[0], &loop_rlim_defaults[0], sizeof(current->signal->rlim));
++
++ /*
++ * loop can be used in an encrypted device,
++ * hence, it mustn't be stopped at all
++ * because it could be indirectly used during suspension
++ */
++ current->flags |= PF_NOFREEZE;
++ current->flags |= PF_LESS_THROTTLE;
++
++ if (lo_nice > 0)
++ lo_nice = 0;
++ if (lo_nice < -20)
++ lo_nice = -20;
++ set_user_nice(current, lo_nice);
++
++ atomic_inc(&lo->lo_pending);
++
++ /*
++ * up sem, we are running
++ */
++ complete(&lo->lo_done);
++
++ for (;;) {
++ add_wait_queue(&lo->lo_bio_wait, &waitq);
++ for (;;) {
++ set_current_state(TASK_INTERRUPTIBLE);
++ if (!atomic_read(&lo->lo_pending))
++ break;
++
++ x = 0;
++ spin_lock_irq(&lo->lo_lock);
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ if((keyscrubFn = lo->lo_keyscrub_fn) != 0) {
++ lo->lo_keyscrub_fn = 0;
++ x = 1;
++ }
++#endif
++ if (lo->lo_bio_que0) {
++ /* don't sleep if device backed READ needs processing */
++ /* don't sleep if file backed READ/WRITE needs processing */
++ x = 1;
++ }
++ spin_unlock_irq(&lo->lo_lock);
++ if (x)
++ break;
++
++ schedule();
++ }
++ set_current_state(TASK_RUNNING);
++ remove_wait_queue(&lo->lo_bio_wait, &waitq);
++
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ if(keyscrubFn) {
++ (*keyscrubFn)(lo->lo_keyscrub_ptr);
++ keyscrubFn = 0;
++ }
++#endif
++ /*
++ * could be woken because of tear-down, not because of
++ * pending work
++ */
++ if (!atomic_read(&lo->lo_pending))
++ break;
++
++ bio = loop_get_bio(lo);
++ if (!bio)
++ continue;
++
++ if (lo->lo_flags & LO_FLAGS_DO_BMAP) {
++ /* request is for file backed device */
++ if(unlikely(!bio->bi_bdev)) {
++ do_loop_switch(lo, bio->bi_private);
++ bio->bi_next = NULL;
++ bio_put(bio);
++ } else {
++ y = do_bio_filebacked(lo, bio);
++ bio->bi_next = NULL;
++ bio_endio(bio, y);
++ }
++ } else {
++ /* device backed read has completed, do decrypt now */
++ extension = bio->bi_private;
++ merge = extension->bioext_merge;
++ y = extension->bioext_index;
++ xbio = merge->bi_private;
++ if(extension->bioext_size) {
++#if LINUX_VERSION_CODE >= 0x30e00
++ md = kmap(xbio->bi_io_vec[y].bv_page) + xbio->bi_io_vec[y].bv_offset + extension->bioext_done_offset;
++#else
++ md = kmap(xbio->bi_io_vec[y].bv_page) + xbio->bi_io_vec[y].bv_offset;
++#endif
++ if (lo_do_transfer(lo, READ, page_address(bio->bi_io_vec[0].bv_page), md, extension->bioext_size, extension->bioext_iv)) {
++ clear_bit(0, &merge->bi_flags);
++ }
++ flush_dcache_page(xbio->bi_io_vec[y].bv_page);
++ kunmap(xbio->bi_io_vec[y].bv_page);
++ }
++ loop_put_buffer(lo, bio, 0);
++ if (!atomic_dec_and_test(&merge->bi_cnt))
++ continue;
++ xbio->bi_next = NULL;
++ bio_endio(xbio, test_bit(0, &merge->bi_flags) ? (int)merge->LOOP_COMPAT_BI_SIZE : -EIO);
++ loop_put_buffer(lo, merge, 1);
++ }
++
++ /*
++ * woken both for pending work and tear-down, lo_pending
++ * will hit zero then
++ */
++ if (atomic_dec_and_test(&lo->lo_pending))
++ break;
++ }
++
++ complete(&lo->lo_done);
++ return 0;
++}
++
++static void loop_set_softblksz(struct loop_device *lo, struct block_device *bdev)
++{
++ int bs, x;
++
++ if (lo->lo_device)
++ bs = block_size(lo->lo_device);
++ else
++ bs = PAGE_SIZE;
++ if (lo->lo_flags & LO_FLAGS_DO_BMAP) {
++ x = (int) bdev->bd_inode->i_size;
++ if ((bs == 8192) && (x & 0x1E00))
++ bs = 4096;
++ if ((bs == 4096) && (x & 0x0E00))
++ bs = 2048;
++ if ((bs == 2048) && (x & 0x0600))
++ bs = 1024;
++ if ((bs == 1024) && (x & 0x0200))
++ bs = 512;
++ }
++ set_blocksize(bdev, bs);
++}
++
++/*
++ * loop_change_fd switches the backing store of a loopback device to a
++ * new file. This is useful for operating system installers to free up the
++ * original file and in High Availability environments to switch to an
++ * alternative location for the content in case of server meltdown.
++ * This can only work if the loop device is used read-only, file backed,
++ * and if the new backing store is the same size and type as the old
++ * backing store.
++ */
++static int loop_change_fd(struct loop_device *lo, unsigned int arg)
++{
++ struct file *file, *old_file;
++ struct inode *inode;
++ struct loop_switch_request w;
++ struct bio *bio;
++ int error;
++
++ error = -EINVAL;
++ /* loop must be read-only */
++ if (!(lo->lo_flags & LO_FLAGS_READ_ONLY))
++ goto out;
++
++ /* loop must be file backed */
++ if (!(lo->lo_flags & LO_FLAGS_DO_BMAP))
++ goto out;
++
++ error = -EBADF;
++ file = fget(arg);
++ if (!file)
++ goto out;
++
++ inode = file->f_path.dentry->d_inode;
++ old_file = lo->lo_backing_file;
++
++ error = -EINVAL;
++ /* new backing store must be file backed */
++ if (!S_ISREG(inode->i_mode))
++ goto out_putf;
++
++ /* new backing store must support reads */
++ if (!file->f_op || !file->f_op->read)
++ goto out_putf;
++
++ /* new backing store must be same size as the old one */
++ if(i_size_read(inode) != i_size_read(old_file->f_path.dentry->d_inode))
++ goto out_putf;
++
++ /* loop must be in properly initialized state */
++ if(lo->lo_queue->make_request_fn != loop_make_request_real)
++ goto out_putf;
++
++ error = -ENOMEM;
++ bio = bio_alloc(GFP_KERNEL, 1);
++ if (!bio)
++ goto out_putf;
++
++ /* wait for loop thread to do the switch */
++ init_completion(&w.wait);
++ w.file = file;
++ bio->bi_private = &w;
++ bio->bi_bdev = NULL;
++ bio->bi_rw = 0;
++ loop_make_request_real(lo->lo_queue, bio);
++ wait_for_completion(&w.wait);
++
++ fput(old_file);
++ return 0;
++
++out_putf:
++ fput(file);
++out:
++ return error;
++}
++
++static int loop_get_threads_count(struct loop_device *lo)
++{
++ int x, y;
++
++ if (lo->lo_flags & LO_FLAGS_DO_BMAP) {
++ /* file backed has only 1 pre-allocated page, so limit to 1 helper thread */
++ return 1;
++ }
++
++ y = lo_threads[0];
++ for (x = 1; x < (sizeof(lo_threads) / sizeof(int)); x += 2) {
++ if (lo_threads[x + 1] && (lo->lo_number == lo_threads[x])) {
++ y = lo_threads[x + 1];
++ break;
++ }
++ }
++ return y;
++}
++
++#if defined(LOOP_HAVE_CONGESTED_FN)
++static int loop_congested(void *data, int bits)
++{
++ struct loop_device *lo = data;
++ struct bio *bio;
++ int ret = 0;
++ unsigned long flags;
++ const int cong = (1 << BDI_sync_congested) | (1 << BDI_async_congested);
++
++ if(lo && lo->lo_backingQueue) {
++ /* check if backing device is congested */
++ ret |= bdi_congested(&lo->lo_backingQueue->backing_dev_info, bits);
++ /* check if loop device is low on resources */
++ spin_lock_irqsave(&lo->lo_lock, flags);
++ bio = lo->lo_bio_free0;
++ if(!bio || !bio->bi_next) {
++ ret |= cong;
++ }
++ bio = lo->lo_bio_free1;
++ if(!bio || !bio->bi_next) {
++ ret |= cong;
++ }
++ spin_unlock_irqrestore(&lo->lo_lock, flags);
++ }
++ return (ret & bits);
++}
++#endif
++
++static int loop_set_fd(struct loop_device *lo, unsigned int ldom,
++ struct block_device *bdev, unsigned int arg)
++{
++ struct file *file;
++ struct inode *inode;
++ struct block_device *lo_device = NULL;
++ int lo_flags = 0;
++ int error;
++ int x, y;
++ struct task_struct *t[LO_THREADS_MAX];
++
++ error = -EBADF;
++ file = fget(arg);
++ if (!file)
++ goto out;
++
++ error = -EINVAL;
++ inode = file->f_path.dentry->d_inode;
++
++ if (!(file->f_mode & FMODE_WRITE))
++ lo_flags |= LO_FLAGS_READ_ONLY;
++
++ init_completion(&lo->lo_done);
++ spin_lock_init(&lo->lo_lock);
++ init_waitqueue_head(&lo->lo_bio_wait);
++ init_waitqueue_head(&lo->lo_buf_wait);
++ atomic_set(&lo->lo_pending, 0);
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ lo->lo_keyscrub_fn = 0;
++#endif
++ lo->lo_offset = lo->lo_sizelimit = 0;
++ lo->lo_offs_sec = lo->lo_iv_remove = 0;
++ lo->lo_encryption = NULL;
++ lo->lo_encrypt_key_size = 0;
++ lo->transfer = NULL;
++ lo->lo_crypt_name[0] = 0;
++ lo->lo_file_name[0] = 0;
++ lo->lo_init[1] = lo->lo_init[0] = 0;
++#if LINUX_VERSION_CODE >= 0x30600
++ lo->lo_key_owner = GLOBAL_ROOT_UID;
++#else
++ lo->lo_key_owner = 0;
++#endif
++ lo->ioctl = NULL;
++ lo->key_data = NULL;
++ lo->lo_bio_que0 = NULL;
++ lo->lo_bio_free1 = lo->lo_bio_free0 = NULL;
++ lo->lo_bio_flshMax = lo->lo_bio_flshCnt = 0;
++
++ if (S_ISBLK(inode->i_mode)) {
++ lo_device = inode->i_bdev;
++ if (lo_device == bdev) {
++ error = -EBUSY;
++ goto out_putf;
++ }
++ if (loop_prealloc_init(lo, 0)) {
++ error = -ENOMEM;
++ goto out_putf;
++ }
++ if (bdev_read_only(lo_device))
++ lo_flags |= LO_FLAGS_READ_ONLY;
++ else
++ filemap_fdatawrite(inode->i_mapping);
++ } else if (S_ISREG(inode->i_mode)) {
++ /*
++ * If we can't read - sorry. If we only can't write - well,
++ * it's going to be read-only.
++ */
++ if (!file->f_op || !file->f_op->read)
++ goto out_putf;
++
++ if (!file->f_op->write)
++ lo_flags |= LO_FLAGS_READ_ONLY;
++
++ lo_flags |= LO_FLAGS_DO_BMAP;
++ if (loop_prealloc_init(lo, 1)) {
++ error = -ENOMEM;
++ goto out_putf;
++ }
++ } else
++ goto out_putf;
++
++ get_file(file);
++
++ if (!(ldom & FMODE_WRITE))
++ lo_flags |= LO_FLAGS_READ_ONLY;
++
++ set_device_ro(bdev, (lo_flags & LO_FLAGS_READ_ONLY) != 0);
++
++ lo->lo_device = lo_device;
++ lo->lo_flags = lo_flags;
++ if(lo_flags & LO_FLAGS_READ_ONLY)
++ lo->lo_flags |= 0x200000; /* export to user space */
++ lo->lo_backing_file = file;
++ if (figure_loop_size(lo, bdev)) {
++ error = -EFBIG;
++ goto out_cleanup;
++ }
++
++ /*
++ * set queue make_request_fn, and add limits based on lower level
++ * device
++ */
++ blk_queue_make_request(lo->lo_queue, loop_make_request_err);
++ blk_queue_bounce_limit(lo->lo_queue, BLK_BOUNCE_ANY);
++ blk_queue_max_segment_size(lo->lo_queue, PAGE_CACHE_SIZE);
++ blk_queue_segment_boundary(lo->lo_queue, PAGE_CACHE_SIZE - 1);
++ blk_queue_max_segments(lo->lo_queue, BLK_MAX_SEGMENTS);
++ blk_queue_max_hw_sectors(lo->lo_queue, BLK_DEF_MAX_SECTORS);
++ lo->lo_queue->limits.cluster = 0;
++ blk_queue_flush(lo->lo_queue, 0);
++ lo->lo_backingQueue = 0;
++
++ /*
++ * we remap to a block device, make sure we correctly stack limits
++ */
++ if (S_ISBLK(inode->i_mode) && lo_device) {
++ struct request_queue *q = bdev_get_queue(lo_device);
++
++ blk_queue_logical_block_size(lo->lo_queue, queue_logical_block_size(q));
++ blk_queue_flush(lo->lo_queue, q->flush_flags & (REQ_FLUSH | REQ_FUA));
++ lo->lo_queue->limits.io_min = q->limits.io_min;
++ if(lo->lo_queue->limits.io_min > (BLK_MAX_SEGMENTS * PAGE_CACHE_SIZE))
++ lo->lo_queue->limits.io_min = (BLK_MAX_SEGMENTS * PAGE_CACHE_SIZE);
++ lo->lo_queue->limits.io_opt = q->limits.io_opt;
++ if(lo->lo_queue->limits.io_opt > (BLK_MAX_SEGMENTS * PAGE_CACHE_SIZE))
++ lo->lo_queue->limits.io_opt = (BLK_MAX_SEGMENTS * PAGE_CACHE_SIZE);
++ lo->lo_backingQueue = q;
++ }
++
++ if (lo_flags & LO_FLAGS_DO_BMAP) {
++ lo->old_gfp_mask = mapping_gfp_mask(inode->i_mapping);
++ mapping_set_gfp_mask(inode->i_mapping, (lo->old_gfp_mask & ~(__GFP_IO|__GFP_FS)) | __GFP_HIGH);
++ } else {
++ lo->old_gfp_mask = -1;
++ }
++
++ loop_set_softblksz(lo, bdev);
++
++ y = loop_get_threads_count(lo);
++ for(x = 0; x < y; x++) {
++ if(y > 1) {
++ t[x] = kthread_create(loop_thread, lo, "loop%d%c", lo->lo_number, x + 'a');
++ } else {
++ t[x] = kthread_create(loop_thread, lo, "loop%d", lo->lo_number);
++ }
++ if (IS_ERR(t[x])) {
++ error = PTR_ERR(t[x]);
++ while(--x >= 0) {
++ kthread_stop(t[x]);
++ }
++ goto out_mapping;
++ }
++ }
++ for(x = 0; x < y; x++) {
++ wake_up_process(t[x]);
++ wait_for_completion(&lo->lo_done);
++ }
++
++ fput(file);
++#if defined(LOOP_HAVE_CONGESTED_FN)
++ lo->lo_queue->backing_dev_info.congested_data = lo;
++ lo->lo_queue->backing_dev_info.congested_fn = loop_congested;
++#endif
++ wmb();
++ lo->lo_queue->queuedata = lo;
++ __module_get(THIS_MODULE);
++ return 0;
++
++ out_mapping:
++ if(lo->old_gfp_mask != -1)
++ mapping_set_gfp_mask(inode->i_mapping, lo->old_gfp_mask);
++ out_cleanup:
++ loop_prealloc_cleanup(lo);
++ fput(file);
++ out_putf:
++ fput(file);
++ out:
++ return error;
++}
++
++static int loop_release_xfer(struct loop_device *lo)
++{
++ int err = 0;
++ struct loop_func_table *xfer = lo->lo_encryption;
++
++ if (xfer) {
++ lo->transfer = NULL;
++ if (xfer->release)
++ err = xfer->release(lo);
++ lo->lo_encryption = NULL;
++ module_put(xfer->owner);
++ }
++ return err;
++}
++
++static int loop_init_xfer(struct loop_device *lo, struct loop_func_table *xfer, struct loop_info64 *i)
++{
++ int err = 0;
++
++ if (xfer) {
++ struct module *owner = xfer->owner;
++
++ if(!try_module_get(owner))
++ return -EINVAL;
++ if (xfer->init)
++ err = xfer->init(lo, i);
++ if (err)
++ module_put(owner);
++ else
++ lo->lo_encryption = xfer;
++ }
++ return err;
++}
++
++static int loop_clr_fd(struct loop_device *lo, struct block_device *bdev)
++{
++ struct file *filp = lo->lo_backing_file;
++ int gfp = lo->old_gfp_mask;
++ int bdocnt, x, y;
++
++ /* sync /dev/loop? device */
++ sync_blockdev(bdev);
++ /* sync backing /dev/hda? device */
++ sync_blockdev(lo->lo_device);
++
++ for(x = 0; x < 20; x++) {
++ spin_lock(&lo->lo_ioctl_spin);
++ bdocnt = lo->lo_refcnt;
++ spin_unlock(&lo->lo_ioctl_spin);
++ if(bdocnt == 1) break;
++ /* work around reference count race */
++ msleep(50);
++ }
++
++ if (bdocnt != 1) /* one for this fd being open */
++ return -EBUSY;
++ if (filp==NULL)
++ return -EINVAL;
++
++ lo->lo_queue->queuedata = NULL;
++ lo->lo_queue->make_request_fn = loop_make_request_err;
++ lo->lo_backingQueue = 0;
++ y = loop_get_threads_count(lo);
++ for(x = 0; x < y; x++) {
++ if (atomic_dec_and_test(&lo->lo_pending))
++ wake_up_interruptible_all(&lo->lo_bio_wait);
++ }
++ for(x = 0; x < y; x++) {
++ wait_for_completion(&lo->lo_done);
++ }
++ blk_queue_flush(lo->lo_queue, 0);
++ loop_prealloc_cleanup(lo);
++ lo->lo_backing_file = NULL;
++ loop_release_xfer(lo);
++ lo->transfer = NULL;
++ lo->ioctl = NULL;
++ lo->lo_device = NULL;
++ lo->lo_encryption = NULL;
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ lo->lo_keyscrub_fn = 0;
++#endif
++ lo->lo_offset = lo->lo_sizelimit = 0;
++ lo->lo_offs_sec = lo->lo_iv_remove = 0;
++ lo->lo_encrypt_key_size = 0;
++ lo->lo_flags = 0;
++ lo->lo_init[1] = lo->lo_init[0] = 0;
++#if LINUX_VERSION_CODE >= 0x30600
++ lo->lo_key_owner = GLOBAL_ROOT_UID;
++#else
++ lo->lo_key_owner = 0;
++#endif
++ lo->key_data = NULL;
++ memset(lo->lo_encrypt_key, 0, LO_KEY_SIZE);
++ memset(lo->lo_crypt_name, 0, LO_NAME_SIZE);
++ memset(lo->lo_file_name, 0, LO_NAME_SIZE);
++ invalidate_bdev(bdev);
++ set_capacity(disks[lo->lo_number], 0);
++ if (gfp != -1)
++ mapping_set_gfp_mask(filp->f_path.dentry->d_inode->i_mapping, gfp);
++ fput(filp);
++ module_put(THIS_MODULE);
++ return 0;
++}
++
++static int loop_set_status(struct loop_device *lo, struct block_device *bdev, struct loop_info64 *info)
++{
++ int err;
++ struct loop_func_table *xfer = NULL;
++#if LINUX_VERSION_CODE >= 0x30600
++ kuid_t uid = current_uid();
++
++ if (lo->lo_encrypt_key_size && !uid_eq(lo->lo_key_owner, uid) && !capable(CAP_SYS_ADMIN))
++ return -EPERM;
++#else
++ uid_t uid = current_uid();
++
++ if (lo->lo_encrypt_key_size && lo->lo_key_owner != uid && !capable(CAP_SYS_ADMIN))
++ return -EPERM;
++#endif
++ if ((unsigned int) info->lo_encrypt_key_size > LO_KEY_SIZE)
++ return -EINVAL;
++
++ err = loop_release_xfer(lo);
++ if (err)
++ return err;
++
++ if ((loff_t)info->lo_offset < 0) {
++ /* negative offset == remove offset from IV computations */
++ lo->lo_offset = -(info->lo_offset);
++ lo->lo_iv_remove = lo->lo_offset >> 9;
++ } else {
++ /* positive offset == include offset in IV computations */
++ lo->lo_offset = info->lo_offset;
++ lo->lo_iv_remove = 0;
++ }
++ lo->lo_offs_sec = lo->lo_offset >> 9;
++ lo->lo_sizelimit = info->lo_sizelimit;
++ err = figure_loop_size(lo, bdev);
++ if (err)
++ return err;
++ loop_set_softblksz(lo, bdev);
++
++ if (info->lo_encrypt_type) {
++ unsigned int type = info->lo_encrypt_type;
++
++ if (type >= MAX_LO_CRYPT)
++ return -EINVAL;
++ xfer = xfer_funcs[type];
++ if (xfer == NULL)
++ return -EINVAL;
++ } else if(!(lo->lo_flags & LO_FLAGS_DO_BMAP)) {
++ blk_queue_max_hw_sectors(lo->lo_queue, PAGE_CACHE_SIZE >> 9);
++ }
++ err = loop_init_xfer(lo, xfer, info);
++ if (err)
++ return err;
++
++ if (!xfer)
++ xfer = &none_funcs;
++ lo->transfer = xfer->transfer;
++ lo->ioctl = xfer->ioctl;
++
++ memcpy(lo->lo_file_name, info->lo_file_name, LO_NAME_SIZE);
++ memcpy(lo->lo_crypt_name, info->lo_crypt_name, LO_NAME_SIZE);
++ lo->lo_file_name[LO_NAME_SIZE-1] = 0;
++ lo->lo_crypt_name[LO_NAME_SIZE-1] = 0;
++ lo->lo_encrypt_key_size = info->lo_encrypt_key_size;
++ lo->lo_init[0] = info->lo_init[0];
++ lo->lo_init[1] = info->lo_init[1];
++ if (info->lo_encrypt_key_size) {
++ memcpy(lo->lo_encrypt_key, info->lo_encrypt_key,
++ info->lo_encrypt_key_size);
++ lo->lo_key_owner = uid;
++ }
++
++ lo->lo_queue->make_request_fn = loop_make_request_real;
++ return 0;
++}
++
++static int loop_get_status(struct loop_device *lo, struct loop_info64 *info)
++{
++ struct file *file = lo->lo_backing_file;
++ struct kstat stat;
++ int error;
++
++#if LINUX_VERSION_CODE >= 0x30900
++ error = vfs_getattr(&file->f_path, &stat);
++#else
++ error = vfs_getattr(file->f_vfsmnt, file->f_path.dentry, &stat);
++#endif
++ if (error)
++ return error;
++ memset(info, 0, sizeof(*info));
++ info->lo_number = lo->lo_number;
++ info->lo_device = huge_encode_dev(stat.dev);
++ info->lo_inode = stat.ino;
++ info->lo_rdevice = huge_encode_dev(lo->lo_device ? stat.rdev : stat.dev);
++ info->lo_offset = lo->lo_iv_remove ? -(lo->lo_offset) : lo->lo_offset;
++ info->lo_sizelimit = lo->lo_sizelimit;
++ info->lo_flags = lo->lo_flags;
++ memcpy(info->lo_file_name, lo->lo_file_name, LO_NAME_SIZE);
++ memcpy(info->lo_crypt_name, lo->lo_crypt_name, LO_NAME_SIZE);
++ info->lo_encrypt_type = lo->lo_encryption ? lo->lo_encryption->number : 0;
++ if (lo->lo_encrypt_key_size && capable(CAP_SYS_ADMIN)) {
++ info->lo_encrypt_key_size = lo->lo_encrypt_key_size;
++ memcpy(info->lo_encrypt_key, lo->lo_encrypt_key,
++ lo->lo_encrypt_key_size);
++ info->lo_init[0] = lo->lo_init[0];
++ info->lo_init[1] = lo->lo_init[1];
++ }
++ return 0;
++}
++
++static void
++loop_info64_from_old(const struct loop_info *info, struct loop_info64 *info64)
++{
++ memset(info64, 0, sizeof(*info64));
++ info64->lo_number = info->lo_number;
++ info64->lo_device = info->lo_device;
++ info64->lo_inode = info->lo_inode;
++ info64->lo_rdevice = info->lo_rdevice;
++ info64->lo_offset = info->lo_offset;
++ info64->lo_encrypt_type = info->lo_encrypt_type;
++ info64->lo_encrypt_key_size = info->lo_encrypt_key_size;
++ info64->lo_flags = info->lo_flags;
++ info64->lo_init[0] = info->lo_init[0];
++ info64->lo_init[1] = info->lo_init[1];
++ if (info->lo_encrypt_type == LO_CRYPT_CRYPTOAPI)
++ memcpy(info64->lo_crypt_name, info->lo_name, LO_NAME_SIZE);
++ else
++ memcpy(info64->lo_file_name, info->lo_name, LO_NAME_SIZE);
++ memcpy(info64->lo_encrypt_key, info->lo_encrypt_key, LO_KEY_SIZE);
++}
++
++static int
++loop_info64_to_old(struct loop_info64 *info64, struct loop_info *info)
++{
++ memset(info, 0, sizeof(*info));
++ info->lo_number = info64->lo_number;
++ info->lo_device = info64->lo_device;
++ info->lo_inode = info64->lo_inode;
++ info->lo_rdevice = info64->lo_rdevice;
++ info->lo_offset = info64->lo_offset;
++ info->lo_encrypt_type = info64->lo_encrypt_type;
++ info->lo_encrypt_key_size = info64->lo_encrypt_key_size;
++ info->lo_flags = info64->lo_flags;
++ info->lo_init[0] = info64->lo_init[0];
++ info->lo_init[1] = info64->lo_init[1];
++ if (info->lo_encrypt_type == LO_CRYPT_CRYPTOAPI)
++ memcpy(info->lo_name, info64->lo_crypt_name, LO_NAME_SIZE);
++ else
++ memcpy(info->lo_name, info64->lo_file_name, LO_NAME_SIZE);
++ memcpy(info->lo_encrypt_key, info64->lo_encrypt_key, LO_KEY_SIZE);
++
++ /* error in case values were truncated */
++ if (info->lo_device != info64->lo_device ||
++ info->lo_rdevice != info64->lo_rdevice ||
++ info->lo_inode != info64->lo_inode ||
++ info->lo_offset != info64->lo_offset ||
++ info64->lo_sizelimit)
++ return -EOVERFLOW;
++
++ return 0;
++}
++
++static int
++loop_set_status_old(struct loop_device *lo, struct block_device *bdev, const struct loop_info *arg)
++{
++ struct loop_info info;
++ struct loop_info64 info64;
++
++ if (copy_from_user(&info, arg, sizeof (struct loop_info)))
++ return -EFAULT;
++ loop_info64_from_old(&info, &info64);
++ memset(&info.lo_encrypt_key[0], 0, sizeof(info.lo_encrypt_key));
++ return loop_set_status(lo, bdev, &info64);
++}
++
++static int
++loop_set_status64(struct loop_device *lo, struct block_device *bdev, struct loop_info64 *arg)
++{
++ struct loop_info64 info64;
++
++ if (copy_from_user(&info64, arg, sizeof (struct loop_info64)))
++ return -EFAULT;
++ return loop_set_status(lo, bdev, &info64);
++}
++
++static int
++loop_get_status_old(struct loop_device *lo, struct loop_info *arg) {
++ struct loop_info info;
++ struct loop_info64 info64;
++ int err = 0;
++
++ if (!arg)
++ err = -EINVAL;
++ if (!err)
++ err = loop_get_status(lo, &info64);
++ if (!err)
++ err = loop_info64_to_old(&info64, &info);
++ if (!err && copy_to_user(arg, &info, sizeof(info)))
++ err = -EFAULT;
++
++ return err;
++}
++
++static int
++loop_get_status64(struct loop_device *lo, struct loop_info64 *arg) {
++ struct loop_info64 info64;
++ int err = 0;
++
++ if (!arg)
++ err = -EINVAL;
++ if (!err)
++ err = loop_get_status(lo, &info64);
++ if (!err && copy_to_user(arg, &info64, sizeof(info64)))
++ err = -EFAULT;
++
++ return err;
++}
++
++static int lo_ioctl(struct block_device *bdev, fmode_t ldom, unsigned int cmd, unsigned long arg)
++{
++ struct loop_device *lo = bdev->bd_disk->private_data;
++ int err;
++ wait_queue_t waitq;
++
++ /*
++ * mutual exclusion - lock
++ */
++ init_waitqueue_entry(&waitq, current);
++ add_wait_queue(&lo->lo_ioctl_wait, &waitq);
++ for (;;) {
++ set_current_state(TASK_UNINTERRUPTIBLE);
++ spin_lock(&lo->lo_ioctl_spin);
++ err = lo->lo_ioctl_busy;
++ if(!err) lo->lo_ioctl_busy = 1;
++ spin_unlock(&lo->lo_ioctl_spin);
++ if(!err) break;
++ schedule();
++ }
++ set_current_state(TASK_RUNNING);
++ remove_wait_queue(&lo->lo_ioctl_wait, &waitq);
++
++ /*
++ * LOOP_SET_FD can only be called when no device is attached.
++ * All other ioctls can only be called when a device is attached.
++ */
++ if (bdev->bd_disk->queue->queuedata != NULL) {
++ if (cmd == LOOP_SET_FD) {
++ err = -EBUSY;
++ goto out_err;
++ }
++ } else {
++ if (cmd != LOOP_SET_FD) {
++ err = -ENXIO;
++ goto out_err;
++ }
++ }
++
++ switch (cmd) {
++ case LOOP_SET_FD:
++ err = loop_set_fd(lo, ldom, bdev, arg);
++ break;
++ case LOOP_CHANGE_FD:
++ err = loop_change_fd(lo, arg);
++ break;
++ case LOOP_CLR_FD:
++ err = loop_clr_fd(lo, bdev);
++ break;
++ case LOOP_SET_STATUS:
++ err = loop_set_status_old(lo, bdev, (struct loop_info *) arg);
++ break;
++ case LOOP_GET_STATUS:
++ err = loop_get_status_old(lo, (struct loop_info *) arg);
++ break;
++ case LOOP_SET_STATUS64:
++ err = loop_set_status64(lo, bdev, (struct loop_info64 *) arg);
++ break;
++ case LOOP_GET_STATUS64:
++ err = loop_get_status64(lo, (struct loop_info64 *) arg);
++ break;
++ case LOOP_RECOMPUTE_DEV_SIZE:
++ err = figure_loop_size(lo, bdev);
++ break;
++ default:
++ err = lo->ioctl ? lo->ioctl(lo, cmd, arg) : -EINVAL;
++ }
++out_err:
++ /*
++ * mutual exclusion - unlock
++ */
++ spin_lock(&lo->lo_ioctl_spin);
++ lo->lo_ioctl_busy = 0;
++ spin_unlock(&lo->lo_ioctl_spin);
++ wake_up_all(&lo->lo_ioctl_wait);
++
++ return err;
++}
++
++#if defined(CONFIG_COMPAT) && defined(HAVE_COMPAT_IOCTL)
++struct loop_info32 {
++ compat_int_t lo_number; /* ioctl r/o */
++ compat_dev_t lo_device; /* ioctl r/o */
++ compat_ulong_t lo_inode; /* ioctl r/o */
++ compat_dev_t lo_rdevice; /* ioctl r/o */
++ compat_int_t lo_offset;
++ compat_int_t lo_encrypt_type;
++ compat_int_t lo_encrypt_key_size; /* ioctl w/o */
++ compat_int_t lo_flags; /* ioctl r/o */
++ char lo_name[LO_NAME_SIZE];
++ unsigned char lo_encrypt_key[LO_KEY_SIZE]; /* ioctl w/o */
++ compat_ulong_t lo_init[2];
++ char reserved[4];
++};
++
++static int lo_compat_ioctl(struct block_device *p1, fmode_t p2, unsigned int cmd, unsigned long arg)
++{
++ mm_segment_t old_fs = get_fs();
++ struct loop_info l;
++ struct loop_info32 *ul = (struct loop_info32 *)arg;
++ int err = -ENOIOCTLCMD;
++
++ switch (cmd) {
++ case LOOP_SET_FD:
++ case LOOP_CLR_FD:
++ case LOOP_SET_STATUS64:
++ case LOOP_GET_STATUS64:
++ case LOOP_CHANGE_FD:
++ case LOOP_MULTI_KEY_SETUP:
++ case LOOP_MULTI_KEY_SETUP_V3:
++ case LOOP_RECOMPUTE_DEV_SIZE:
++ err = lo_ioctl(p1, p2, cmd, arg);
++ break;
++ case LOOP_SET_STATUS:
++ memset(&l, 0, sizeof(l));
++ err = get_user(l.lo_number, &ul->lo_number);
++ err |= get_user(l.lo_device, &ul->lo_device);
++ err |= get_user(l.lo_inode, &ul->lo_inode);
++ err |= get_user(l.lo_rdevice, &ul->lo_rdevice);
++ err |= copy_from_user(&l.lo_offset, &ul->lo_offset,
++ 8 + (unsigned long)l.lo_init - (unsigned long)&l.lo_offset);
++ if (err) {
++ err = -EFAULT;
++ } else {
++ set_fs (KERNEL_DS);
++ err = lo_ioctl(p1, p2, cmd, (unsigned long)&l);
++ set_fs (old_fs);
++ }
++ memset(&l, 0, sizeof(l));
++ break;
++ case LOOP_GET_STATUS:
++ set_fs (KERNEL_DS);
++ err = lo_ioctl(p1, p2, cmd, (unsigned long)&l);
++ set_fs (old_fs);
++ if (!err) {
++ err = put_user(l.lo_number, &ul->lo_number);
++ err |= put_user(l.lo_device, &ul->lo_device);
++ err |= put_user(l.lo_inode, &ul->lo_inode);
++ err |= put_user(l.lo_rdevice, &ul->lo_rdevice);
++ err |= copy_to_user(&ul->lo_offset, &l.lo_offset,
++ (unsigned long)l.lo_init - (unsigned long)&l.lo_offset);
++ if (err)
++ err = -EFAULT;
++ }
++ memset(&l, 0, sizeof(l));
++ break;
++
++ }
++ return err;
++}
++#endif
++
++static int lo_open(struct block_device *bdev, fmode_t mode)
++{
++ struct loop_device *lo = bdev->bd_disk->private_data;
++
++ spin_lock(&lo->lo_ioctl_spin);
++ lo->lo_refcnt++;
++ spin_unlock(&lo->lo_ioctl_spin);
++ return 0;
++}
++
++#if LINUX_VERSION_CODE >= 0x30a00
++static void lo_release(struct gendisk *disk, fmode_t mode)
++#else
++static int lo_release(struct gendisk *disk, fmode_t mode)
++#endif
++{
++ struct loop_device *lo = disk->private_data;
++
++ spin_lock(&lo->lo_ioctl_spin);
++ lo->lo_refcnt--;
++ spin_unlock(&lo->lo_ioctl_spin);
++#if LINUX_VERSION_CODE < 0x30a00
++ return 0;
++#endif
++}
++
++static struct block_device_operations lo_fops = {
++ .owner = THIS_MODULE,
++ .open = lo_open,
++ .release = lo_release,
++ .ioctl = lo_ioctl,
++#if defined(CONFIG_COMPAT) && defined(HAVE_COMPAT_IOCTL)
++ .compat_ioctl = lo_compat_ioctl,
++#endif
++};
++
++/*
++ * And now the modules code and kernel interface.
++ */
++MODULE_LICENSE("GPL");
++MODULE_ALIAS_BLOCKDEV_MAJOR(LOOP_MAJOR);
++
++int loop_register_transfer(struct loop_func_table *funcs)
++{
++ unsigned int n = funcs->number;
++
++ if (n >= MAX_LO_CRYPT || xfer_funcs[n])
++ return -EINVAL;
++ xfer_funcs[n] = funcs;
++ return 0;
++}
++
++int loop_unregister_transfer(int number)
++{
++ unsigned int n = number;
++ struct loop_device *lo;
++ struct loop_func_table *xfer;
++ int x;
++
++ if (n == 0 || n >= MAX_LO_CRYPT || (xfer = xfer_funcs[n]) == NULL)
++ return -EINVAL;
++ xfer_funcs[n] = NULL;
++ for (x = 0; x < max_loop; x++) {
++ lo = loop_dev_ptr_arr[x];
++ if (!lo)
++ continue;
++ if (lo->lo_encryption == xfer)
++ loop_release_xfer(lo);
++ }
++ return 0;
++}
++
++EXPORT_SYMBOL(loop_register_transfer);
++EXPORT_SYMBOL(loop_unregister_transfer);
++
++int __init loop_init(void)
++{
++ int i;
++
++#ifdef CONFIG_BLK_DEV_LOOP_AES
++#if defined(CONFIG_BLK_DEV_LOOP_PADLOCK) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++ if((boot_cpu_data.x86 >= 6) && CentaurHauls_ID_and_enabled_ACE()) {
++ xfer_funcs[LO_CRYPT_AES] = &funcs_padlock_aes;
++ printk(KERN_INFO "loop: padlock hardware AES enabled\n");
++ } else
++#endif
++#if defined(CONFIG_BLK_DEV_LOOP_INTELAES) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++ if((boot_cpu_data.x86 >= 6) && ((cpuid_ecx(1) & 0x02000000) == 0x02000000)) {
++ xfer_funcs[LO_CRYPT_AES] = &funcs_intel_aes;
++ printk("loop: Intel hardware AES enabled\n");
++ } else
++#endif
++#endif
++ { } /* needed because of above else statements */
++
++ if ((max_loop < 1) || (max_loop > 256)) {
++ printk(KERN_WARNING "loop: invalid max_loop (must be between"
++ " 1 and 256), using default (8)\n");
++ max_loop = 8;
++ }
++
++ if (register_blkdev(LOOP_MAJOR, "loop"))
++ return -EIO;
++
++ loop_dev_ptr_arr = kmalloc(max_loop * sizeof(struct loop_device *), GFP_KERNEL);
++ if (!loop_dev_ptr_arr)
++ goto out_mem1;
++
++ disks = kmalloc(max_loop * sizeof(struct gendisk *), GFP_KERNEL);
++ if (!disks)
++ goto out_mem2;
++
++ for (i = 0; i < max_loop; i++) {
++ loop_dev_ptr_arr[i] = kmalloc(sizeof(struct loop_device), GFP_KERNEL);
++ if (!loop_dev_ptr_arr[i])
++ goto out_mem3;
++ }
++
++ for (i = 0; i < max_loop; i++) {
++ disks[i] = alloc_disk(1);
++ if (!disks[i])
++ goto out_mem4;
++ }
++
++ for (i = 0; i < max_loop; i++) {
++ disks[i]->queue = blk_alloc_queue(GFP_KERNEL);
++ if (!disks[i]->queue)
++ goto out_mem5;
++ disks[i]->queue->queuedata = NULL;
++ blk_queue_make_request(disks[i]->queue, loop_make_request_err);
++ }
++
++ for (i = 0; i < (sizeof(lo_prealloc) / sizeof(int)); i += 2) {
++ if (!lo_prealloc[i])
++ continue;
++ if (lo_prealloc[i] < LO_PREALLOC_MIN)
++ lo_prealloc[i] = LO_PREALLOC_MIN;
++ if (lo_prealloc[i] > LO_PREALLOC_MAX)
++ lo_prealloc[i] = LO_PREALLOC_MAX;
++ }
++ for (i = 0; i < (sizeof(lo_threads) / sizeof(int)); i += 2) {
++ if (!lo_threads[i])
++ continue;
++ if (lo_threads[i] < LO_THREADS_MIN)
++ lo_threads[i] = LO_THREADS_MIN;
++ if (lo_threads[i] > LO_THREADS_MAX)
++ lo_threads[i] = LO_THREADS_MAX;
++ }
++
++#if defined(IOCTL32_COMPATIBLE_PTR)
++ register_ioctl32_conversion(LOOP_MULTI_KEY_SETUP, IOCTL32_COMPATIBLE_PTR);
++ register_ioctl32_conversion(LOOP_MULTI_KEY_SETUP_V3, IOCTL32_COMPATIBLE_PTR);
++ register_ioctl32_conversion(LOOP_RECOMPUTE_DEV_SIZE, IOCTL32_COMPATIBLE_PTR);
++#endif
++
++#ifdef CONFIG_DEVFS_FS
++ devfs_mk_dir("loop");
++#endif
++
++ for (i = 0; i < max_loop; i++) {
++ struct loop_device *lo = loop_dev_ptr_arr[i];
++ struct gendisk *disk = disks[i];
++ memset(lo, 0, sizeof(struct loop_device));
++ lo->lo_number = i;
++ lo->lo_queue = disk->queue;
++ spin_lock_init(&lo->lo_ioctl_spin);
++ init_waitqueue_head(&lo->lo_ioctl_wait);
++ disk->major = LOOP_MAJOR;
++ disk->first_minor = i;
++ disk->fops = &lo_fops;
++ sprintf(disk->disk_name, "loop%d", i);
++#ifdef CONFIG_DEVFS_FS
++ sprintf(disk->devfs_name, "loop/%d", i);
++#endif
++ disk->private_data = lo;
++ add_disk(disk);
++ }
++
++#ifdef CONFIG_BLK_DEV_LOOP_AES
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ printk(KERN_INFO "loop: AES key scrubbing enabled\n");
++#endif
++#endif
++ printk(KERN_INFO "loop: loaded (max %d devices)\n", max_loop);
++ return 0;
++
++out_mem5:
++ while (i--)
++ blk_cleanup_queue(disks[i]->queue);
++ i = max_loop;
++out_mem4:
++ while (i--)
++ put_disk(disks[i]);
++ i = max_loop;
++out_mem3:
++ while (i--)
++ kfree(loop_dev_ptr_arr[i]);
++ kfree(disks);
++out_mem2:
++ kfree(loop_dev_ptr_arr);
++out_mem1:
++ unregister_blkdev(LOOP_MAJOR, "loop");
++ printk(KERN_ERR "loop: ran out of memory\n");
++ return -ENOMEM;
++}
++
++void loop_exit(void)
++{
++ int i;
++
++ for (i = 0; i < max_loop; i++) {
++ del_gendisk(disks[i]);
++ put_disk(disks[i]);
++ blk_cleanup_queue(loop_dev_ptr_arr[i]->lo_queue);
++ kfree(loop_dev_ptr_arr[i]);
++ }
++#ifdef CONFIG_DEVFS_FS
++ devfs_remove("loop");
++#endif
++ unregister_blkdev(LOOP_MAJOR, "loop");
++ kfree(disks);
++ kfree(loop_dev_ptr_arr);
++
++#if defined(IOCTL32_COMPATIBLE_PTR)
++ unregister_ioctl32_conversion(LOOP_MULTI_KEY_SETUP);
++ unregister_ioctl32_conversion(LOOP_MULTI_KEY_SETUP_V3);
++ unregister_ioctl32_conversion(LOOP_RECOMPUTE_DEV_SIZE);
++#endif
++}
++
++module_init(loop_init);
++module_exit(loop_exit);
++
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++void loop_add_keyscrub_fn(struct loop_device *lo, void (*fn)(void *), void *ptr)
++{
++ lo->lo_keyscrub_ptr = ptr;
++ wmb();
++ lo->lo_keyscrub_fn = fn;
++ wake_up_interruptible(&lo->lo_bio_wait);
++}
++EXPORT_SYMBOL(loop_add_keyscrub_fn);
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/Makefile linux-3.14-AES/drivers/misc/Makefile
+--- linux-3.14-noloop/drivers/misc/Makefile 2014-03-31 06:40:15.000000000 +0300
++++ linux-3.14-AES/drivers/misc/Makefile 2014-03-31 22:20:36.000000000 +0300
+@@ -2,6 +2,33 @@
+ # Makefile for misc devices that really don't fit anywhere else.
+ #
+
++ifeq ($(CONFIG_BLK_DEV_LOOP_AES),y)
++AES_X86_ASM=n
++ifeq ($(CONFIG_X86),y)
++ifneq ($(CONFIG_X86_64),y)
++ AES_X86_ASM=y
++endif
++endif
++ifeq ($(AES_X86_ASM),y)
++ obj-y += aes-x86.o md5-x86.o crypto-ksym.o
++ AFLAGS_aes-x86.o := -DUSE_UNDERLINE=1
++ifeq ($(CONFIG_BLK_DEV_LOOP_INTELAES),y)
++ obj-y += aes-intel32.o
++endif
++else
++ifeq ($(CONFIG_X86_64),y)
++ obj-y += aes-amd64.o md5-amd64.o md5-2x-amd64.o crypto-ksym.o
++ AFLAGS_aes-amd64.o := -DUSE_UNDERLINE=1
++ifeq ($(CONFIG_BLK_DEV_LOOP_INTELAES),y)
++ obj-y += aes-intel64.o
++endif
++else
++ obj-y += aes.o md5.o crypto-ksym.o
++ CFLAGS_aes.o := -DDATA_ALWAYS_ALIGNED=1
++endif
++endif
++endif
++
+ obj-$(CONFIG_IBM_ASM) += ibmasm/
+ obj-$(CONFIG_AD525X_DPOT) += ad525x_dpot.o
+ obj-$(CONFIG_AD525X_DPOT_I2C) += ad525x_dpot-i2c.o
+diff -urN linux-3.14-noloop/drivers/misc/aes-amd64.S linux-3.14-AES/drivers/misc/aes-amd64.S
+--- linux-3.14-noloop/drivers/misc/aes-amd64.S 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/aes-amd64.S 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,897 @@
++//
++// Copyright (c) 2001, Dr Brian Gladman <brg@gladman.uk.net>, Worcester, UK.
++// All rights reserved.
++//
++// TERMS
++//
++// Redistribution and use in source and binary forms, with or without
++// modification, are permitted subject to the following conditions:
++//
++// 1. Redistributions of source code must retain the above copyright
++// notice, this list of conditions and the following disclaimer.
++//
++// 2. Redistributions in binary form must reproduce the above copyright
++// notice, this list of conditions and the following disclaimer in the
++// documentation and/or other materials provided with the distribution.
++//
++// 3. The copyright holder's name must not be used to endorse or promote
++// any products derived from this software without his specific prior
++// written permission.
++//
++// This software is provided 'as is' with no express or implied warranties
++// of correctness or fitness for purpose.
++
++// Modified by Jari Ruusu, December 24 2001
++// - Converted syntax to GNU CPP/assembler syntax
++// - C programming interface converted back to "old" API
++// - Minor portability cleanups and speed optimizations
++
++// Modified by Jari Ruusu, April 11 2002
++// - Added above copyright and terms to resulting object code so that
++// binary distributions can avoid legal trouble
++
++// Modified by Jari Ruusu, June 12 2004
++// - Converted 32 bit x86 code to 64 bit AMD64 code
++// - Re-wrote encrypt and decrypt code from scratch
++
++// An AES (Rijndael) implementation for the AMD64. This version only
++// implements the standard AES block length (128 bits, 16 bytes). This code
++// does not preserve the rax, rcx, rdx, rsi, rdi or r8-r11 registers or the
++// artihmetic status flags. However, the rbx, rbp and r12-r15 registers are
++// preserved across calls.
++
++// void aes_set_key(aes_context *cx, const unsigned char key[], const int key_len, const int f)
++// void aes_encrypt(const aes_context *cx, const unsigned char in_blk[], unsigned char out_blk[])
++// void aes_decrypt(const aes_context *cx, const unsigned char in_blk[], unsigned char out_blk[])
++
++#if defined(USE_UNDERLINE)
++# define aes_set_key _aes_set_key
++# define aes_encrypt _aes_encrypt
++# define aes_decrypt _aes_decrypt
++#endif
++#if !defined(ALIGN64BYTES)
++# define ALIGN64BYTES 64
++#endif
++
++ .file "aes-amd64.S"
++ .globl aes_set_key
++ .globl aes_encrypt
++ .globl aes_decrypt
++
++ .section .rodata
++copyright:
++ .ascii " \000"
++ .ascii "Copyright (c) 2001, Dr Brian Gladman <brg@gladman.uk.net>, Worcester, UK.\000"
++ .ascii "All rights reserved.\000"
++ .ascii " \000"
++ .ascii "TERMS\000"
++ .ascii " \000"
++ .ascii " Redistribution and use in source and binary forms, with or without\000"
++ .ascii " modification, are permitted subject to the following conditions:\000"
++ .ascii " \000"
++ .ascii " 1. Redistributions of source code must retain the above copyright\000"
++ .ascii " notice, this list of conditions and the following disclaimer.\000"
++ .ascii " \000"
++ .ascii " 2. Redistributions in binary form must reproduce the above copyright\000"
++ .ascii " notice, this list of conditions and the following disclaimer in the\000"
++ .ascii " documentation and/or other materials provided with the distribution.\000"
++ .ascii " \000"
++ .ascii " 3. The copyright holder's name must not be used to endorse or promote\000"
++ .ascii " any products derived from this software without his specific prior\000"
++ .ascii " written permission.\000"
++ .ascii " \000"
++ .ascii " This software is provided 'as is' with no express or implied warranties\000"
++ .ascii " of correctness or fitness for purpose.\000"
++ .ascii " \000"
++
++#define tlen 1024 // length of each of 4 'xor' arrays (256 32-bit words)
++
++// offsets in context structure
++
++#define nkey 0 // key length, size 4
++#define nrnd 4 // number of rounds, size 4
++#define ekey 8 // encryption key schedule base address, size 256
++#define dkey 264 // decryption key schedule base address, size 256
++
++// This macro performs a forward encryption cycle. It is entered with
++// the first previous round column values in I1E, I2E, I3E and I4E and
++// exits with the final values OU1, OU2, OU3 and OU4 registers.
++
++#define fwd_rnd(p1,p2,I1E,I1B,I1H,I2E,I2B,I2H,I3E,I3B,I3R,I4E,I4B,I4R,OU1,OU2,OU3,OU4) \
++ movl p2(%rbp),OU1 ;\
++ movl p2+4(%rbp),OU2 ;\
++ movl p2+8(%rbp),OU3 ;\
++ movl p2+12(%rbp),OU4 ;\
++ movzbl I1B,%edi ;\
++ movzbl I2B,%esi ;\
++ movzbl I3B,%r8d ;\
++ movzbl I4B,%r13d ;\
++ shrl $8,I3E ;\
++ shrl $8,I4E ;\
++ xorl p1(,%rdi,4),OU1 ;\
++ xorl p1(,%rsi,4),OU2 ;\
++ xorl p1(,%r8,4),OU3 ;\
++ xorl p1(,%r13,4),OU4 ;\
++ movzbl I2H,%esi ;\
++ movzbl I3B,%r8d ;\
++ movzbl I4B,%r13d ;\
++ movzbl I1H,%edi ;\
++ shrl $8,I3E ;\
++ shrl $8,I4E ;\
++ xorl p1+tlen(,%rsi,4),OU1 ;\
++ xorl p1+tlen(,%r8,4),OU2 ;\
++ xorl p1+tlen(,%r13,4),OU3 ;\
++ xorl p1+tlen(,%rdi,4),OU4 ;\
++ shrl $16,I1E ;\
++ shrl $16,I2E ;\
++ movzbl I3B,%r8d ;\
++ movzbl I4B,%r13d ;\
++ movzbl I1B,%edi ;\
++ movzbl I2B,%esi ;\
++ xorl p1+2*tlen(,%r8,4),OU1 ;\
++ xorl p1+2*tlen(,%r13,4),OU2 ;\
++ xorl p1+2*tlen(,%rdi,4),OU3 ;\
++ xorl p1+2*tlen(,%rsi,4),OU4 ;\
++ shrl $8,I4E ;\
++ movzbl I1H,%edi ;\
++ movzbl I2H,%esi ;\
++ shrl $8,I3E ;\
++ xorl p1+3*tlen(,I4R,4),OU1 ;\
++ xorl p1+3*tlen(,%rdi,4),OU2 ;\
++ xorl p1+3*tlen(,%rsi,4),OU3 ;\
++ xorl p1+3*tlen(,I3R,4),OU4
++
++// This macro performs an inverse encryption cycle. It is entered with
++// the first previous round column values in I1E, I2E, I3E and I4E and
++// exits with the final values OU1, OU2, OU3 and OU4 registers.
++
++#define inv_rnd(p1,p2,I1E,I1B,I1R,I2E,I2B,I2R,I3E,I3B,I3H,I4E,I4B,I4H,OU1,OU2,OU3,OU4) \
++ movl p2+12(%rbp),OU4 ;\
++ movl p2+8(%rbp),OU3 ;\
++ movl p2+4(%rbp),OU2 ;\
++ movl p2(%rbp),OU1 ;\
++ movzbl I4B,%edi ;\
++ movzbl I3B,%esi ;\
++ movzbl I2B,%r8d ;\
++ movzbl I1B,%r13d ;\
++ shrl $8,I2E ;\
++ shrl $8,I1E ;\
++ xorl p1(,%rdi,4),OU4 ;\
++ xorl p1(,%rsi,4),OU3 ;\
++ xorl p1(,%r8,4),OU2 ;\
++ xorl p1(,%r13,4),OU1 ;\
++ movzbl I3H,%esi ;\
++ movzbl I2B,%r8d ;\
++ movzbl I1B,%r13d ;\
++ movzbl I4H,%edi ;\
++ shrl $8,I2E ;\
++ shrl $8,I1E ;\
++ xorl p1+tlen(,%rsi,4),OU4 ;\
++ xorl p1+tlen(,%r8,4),OU3 ;\
++ xorl p1+tlen(,%r13,4),OU2 ;\
++ xorl p1+tlen(,%rdi,4),OU1 ;\
++ shrl $16,I4E ;\
++ shrl $16,I3E ;\
++ movzbl I2B,%r8d ;\
++ movzbl I1B,%r13d ;\
++ movzbl I4B,%edi ;\
++ movzbl I3B,%esi ;\
++ xorl p1+2*tlen(,%r8,4),OU4 ;\
++ xorl p1+2*tlen(,%r13,4),OU3 ;\
++ xorl p1+2*tlen(,%rdi,4),OU2 ;\
++ xorl p1+2*tlen(,%rsi,4),OU1 ;\
++ shrl $8,I1E ;\
++ movzbl I4H,%edi ;\
++ movzbl I3H,%esi ;\
++ shrl $8,I2E ;\
++ xorl p1+3*tlen(,I1R,4),OU4 ;\
++ xorl p1+3*tlen(,%rdi,4),OU3 ;\
++ xorl p1+3*tlen(,%rsi,4),OU2 ;\
++ xorl p1+3*tlen(,I2R,4),OU1
++
++// AES (Rijndael) Encryption Subroutine
++
++// rdi = pointer to AES context
++// rsi = pointer to input plaintext bytes
++// rdx = pointer to output ciphertext bytes
++
++ .text
++ .align ALIGN64BYTES
++aes_encrypt:
++ movl (%rsi),%eax // read in plaintext
++ movl 4(%rsi),%ecx
++ movl 8(%rsi),%r10d
++ movl 12(%rsi),%r11d
++
++ pushq %rbp
++ leaq ekey+16(%rdi),%rbp // encryption key pointer
++ movq %rdx,%r9 // pointer to out block
++ movl nrnd(%rdi),%edx // number of rounds
++ pushq %rbx
++ pushq %r13
++ pushq %r14
++ pushq %r15
++
++ xorl -16(%rbp),%eax // xor in first round key
++ xorl -12(%rbp),%ecx
++ xorl -8(%rbp),%r10d
++ xorl -4(%rbp),%r11d
++
++ subl $10,%edx
++ je aes_15
++ addq $32,%rbp
++ subl $2,%edx
++ je aes_13
++ addq $32,%rbp
++
++ fwd_rnd(aes_ft_tab,-64,%eax,%al,%ah,%ecx,%cl,%ch,%r10d,%r10b,%r10,%r11d,%r11b,%r11,%ebx,%edx,%r14d,%r15d)
++ fwd_rnd(aes_ft_tab,-48,%ebx,%bl,%bh,%edx,%dl,%dh,%r14d,%r14b,%r14,%r15d,%r15b,%r15,%eax,%ecx,%r10d,%r11d)
++ jmp aes_13
++ .align ALIGN64BYTES
++aes_13: fwd_rnd(aes_ft_tab,-32,%eax,%al,%ah,%ecx,%cl,%ch,%r10d,%r10b,%r10,%r11d,%r11b,%r11,%ebx,%edx,%r14d,%r15d)
++ fwd_rnd(aes_ft_tab,-16,%ebx,%bl,%bh,%edx,%dl,%dh,%r14d,%r14b,%r14,%r15d,%r15b,%r15,%eax,%ecx,%r10d,%r11d)
++ jmp aes_15
++ .align ALIGN64BYTES
++aes_15: fwd_rnd(aes_ft_tab,0, %eax,%al,%ah,%ecx,%cl,%ch,%r10d,%r10b,%r10,%r11d,%r11b,%r11,%ebx,%edx,%r14d,%r15d)
++ fwd_rnd(aes_ft_tab,16, %ebx,%bl,%bh,%edx,%dl,%dh,%r14d,%r14b,%r14,%r15d,%r15b,%r15,%eax,%ecx,%r10d,%r11d)
++ fwd_rnd(aes_ft_tab,32, %eax,%al,%ah,%ecx,%cl,%ch,%r10d,%r10b,%r10,%r11d,%r11b,%r11,%ebx,%edx,%r14d,%r15d)
++ fwd_rnd(aes_ft_tab,48, %ebx,%bl,%bh,%edx,%dl,%dh,%r14d,%r14b,%r14,%r15d,%r15b,%r15,%eax,%ecx,%r10d,%r11d)
++ fwd_rnd(aes_ft_tab,64, %eax,%al,%ah,%ecx,%cl,%ch,%r10d,%r10b,%r10,%r11d,%r11b,%r11,%ebx,%edx,%r14d,%r15d)
++ fwd_rnd(aes_ft_tab,80, %ebx,%bl,%bh,%edx,%dl,%dh,%r14d,%r14b,%r14,%r15d,%r15b,%r15,%eax,%ecx,%r10d,%r11d)
++ fwd_rnd(aes_ft_tab,96, %eax,%al,%ah,%ecx,%cl,%ch,%r10d,%r10b,%r10,%r11d,%r11b,%r11,%ebx,%edx,%r14d,%r15d)
++ fwd_rnd(aes_ft_tab,112,%ebx,%bl,%bh,%edx,%dl,%dh,%r14d,%r14b,%r14,%r15d,%r15b,%r15,%eax,%ecx,%r10d,%r11d)
++ fwd_rnd(aes_ft_tab,128,%eax,%al,%ah,%ecx,%cl,%ch,%r10d,%r10b,%r10,%r11d,%r11b,%r11,%ebx,%edx,%r14d,%r15d)
++ fwd_rnd(aes_fl_tab,144,%ebx,%bl,%bh,%edx,%dl,%dh,%r14d,%r14b,%r14,%r15d,%r15b,%r15,%eax,%ecx,%r10d,%r11d)
++
++ popq %r15
++ popq %r14
++ popq %r13
++ popq %rbx
++ popq %rbp
++
++ movl %eax,(%r9) // move final values to the output array.
++ movl %ecx,4(%r9)
++ movl %r10d,8(%r9)
++ movl %r11d,12(%r9)
++ ret
++
++// AES (Rijndael) Decryption Subroutine
++
++// rdi = pointer to AES context
++// rsi = pointer to input ciphertext bytes
++// rdx = pointer to output plaintext bytes
++
++ .align ALIGN64BYTES
++aes_decrypt:
++ movl 12(%rsi),%eax // read in ciphertext
++ movl 8(%rsi),%ecx
++ movl 4(%rsi),%r10d
++ movl (%rsi),%r11d
++
++ pushq %rbp
++ leaq dkey+16(%rdi),%rbp // decryption key pointer
++ movq %rdx,%r9 // pointer to out block
++ movl nrnd(%rdi),%edx // number of rounds
++ pushq %rbx
++ pushq %r13
++ pushq %r14
++ pushq %r15
++
++ xorl -4(%rbp),%eax // xor in first round key
++ xorl -8(%rbp),%ecx
++ xorl -12(%rbp),%r10d
++ xorl -16(%rbp),%r11d
++
++ subl $10,%edx
++ je aes_25
++ addq $32,%rbp
++ subl $2,%edx
++ je aes_23
++ addq $32,%rbp
++
++ inv_rnd(aes_it_tab,-64,%r11d,%r11b,%r11,%r10d,%r10b,%r10,%ecx,%cl,%ch,%eax,%al,%ah,%r15d,%r14d,%edx,%ebx)
++ inv_rnd(aes_it_tab,-48,%r15d,%r15b,%r15,%r14d,%r14b,%r14,%edx,%dl,%dh,%ebx,%bl,%bh,%r11d,%r10d,%ecx,%eax)
++ jmp aes_23
++ .align ALIGN64BYTES
++aes_23: inv_rnd(aes_it_tab,-32,%r11d,%r11b,%r11,%r10d,%r10b,%r10,%ecx,%cl,%ch,%eax,%al,%ah,%r15d,%r14d,%edx,%ebx)
++ inv_rnd(aes_it_tab,-16,%r15d,%r15b,%r15,%r14d,%r14b,%r14,%edx,%dl,%dh,%ebx,%bl,%bh,%r11d,%r10d,%ecx,%eax)
++ jmp aes_25
++ .align ALIGN64BYTES
++aes_25: inv_rnd(aes_it_tab,0, %r11d,%r11b,%r11,%r10d,%r10b,%r10,%ecx,%cl,%ch,%eax,%al,%ah,%r15d,%r14d,%edx,%ebx)
++ inv_rnd(aes_it_tab,16, %r15d,%r15b,%r15,%r14d,%r14b,%r14,%edx,%dl,%dh,%ebx,%bl,%bh,%r11d,%r10d,%ecx,%eax)
++ inv_rnd(aes_it_tab,32, %r11d,%r11b,%r11,%r10d,%r10b,%r10,%ecx,%cl,%ch,%eax,%al,%ah,%r15d,%r14d,%edx,%ebx)
++ inv_rnd(aes_it_tab,48, %r15d,%r15b,%r15,%r14d,%r14b,%r14,%edx,%dl,%dh,%ebx,%bl,%bh,%r11d,%r10d,%ecx,%eax)
++ inv_rnd(aes_it_tab,64, %r11d,%r11b,%r11,%r10d,%r10b,%r10,%ecx,%cl,%ch,%eax,%al,%ah,%r15d,%r14d,%edx,%ebx)
++ inv_rnd(aes_it_tab,80, %r15d,%r15b,%r15,%r14d,%r14b,%r14,%edx,%dl,%dh,%ebx,%bl,%bh,%r11d,%r10d,%ecx,%eax)
++ inv_rnd(aes_it_tab,96, %r11d,%r11b,%r11,%r10d,%r10b,%r10,%ecx,%cl,%ch,%eax,%al,%ah,%r15d,%r14d,%edx,%ebx)
++ inv_rnd(aes_it_tab,112,%r15d,%r15b,%r15,%r14d,%r14b,%r14,%edx,%dl,%dh,%ebx,%bl,%bh,%r11d,%r10d,%ecx,%eax)
++ inv_rnd(aes_it_tab,128,%r11d,%r11b,%r11,%r10d,%r10b,%r10,%ecx,%cl,%ch,%eax,%al,%ah,%r15d,%r14d,%edx,%ebx)
++ inv_rnd(aes_il_tab,144,%r15d,%r15b,%r15,%r14d,%r14b,%r14,%edx,%dl,%dh,%ebx,%bl,%bh,%r11d,%r10d,%ecx,%eax)
++
++ popq %r15
++ popq %r14
++ popq %r13
++ popq %rbx
++ popq %rbp
++
++ movl %eax,12(%r9) // move final values to the output array.
++ movl %ecx,8(%r9)
++ movl %r10d,4(%r9)
++ movl %r11d,(%r9)
++ ret
++
++// AES (Rijndael) Key Schedule Subroutine
++
++// This macro performs a column mixing operation on an input 32-bit
++// word to give a 32-bit result. It uses each of the 4 bytes in the
++// the input column to index 4 different tables of 256 32-bit words
++// that are xored together to form the output value.
++
++#define mix_col(p1) \
++ movzbl %bl,%ecx ;\
++ movl p1(,%rcx,4),%eax ;\
++ movzbl %bh,%ecx ;\
++ ror $16,%ebx ;\
++ xorl p1+tlen(,%rcx,4),%eax ;\
++ movzbl %bl,%ecx ;\
++ xorl p1+2*tlen(,%rcx,4),%eax ;\
++ movzbl %bh,%ecx ;\
++ xorl p1+3*tlen(,%rcx,4),%eax
++
++// Key Schedule Macros
++
++#define ksc4(p1) \
++ rol $24,%ebx ;\
++ mix_col(aes_fl_tab) ;\
++ ror $8,%ebx ;\
++ xorl 4*p1+aes_rcon_tab,%eax ;\
++ xorl %eax,%esi ;\
++ xorl %esi,%ebp ;\
++ movl %esi,16*p1(%rdi) ;\
++ movl %ebp,16*p1+4(%rdi) ;\
++ xorl %ebp,%edx ;\
++ xorl %edx,%ebx ;\
++ movl %edx,16*p1+8(%rdi) ;\
++ movl %ebx,16*p1+12(%rdi)
++
++#define ksc6(p1) \
++ rol $24,%ebx ;\
++ mix_col(aes_fl_tab) ;\
++ ror $8,%ebx ;\
++ xorl 4*p1+aes_rcon_tab,%eax ;\
++ xorl 24*p1-24(%rdi),%eax ;\
++ movl %eax,24*p1(%rdi) ;\
++ xorl 24*p1-20(%rdi),%eax ;\
++ movl %eax,24*p1+4(%rdi) ;\
++ xorl %eax,%esi ;\
++ xorl %esi,%ebp ;\
++ movl %esi,24*p1+8(%rdi) ;\
++ movl %ebp,24*p1+12(%rdi) ;\
++ xorl %ebp,%edx ;\
++ xorl %edx,%ebx ;\
++ movl %edx,24*p1+16(%rdi) ;\
++ movl %ebx,24*p1+20(%rdi)
++
++#define ksc8(p1) \
++ rol $24,%ebx ;\
++ mix_col(aes_fl_tab) ;\
++ ror $8,%ebx ;\
++ xorl 4*p1+aes_rcon_tab,%eax ;\
++ xorl 32*p1-32(%rdi),%eax ;\
++ movl %eax,32*p1(%rdi) ;\
++ xorl 32*p1-28(%rdi),%eax ;\
++ movl %eax,32*p1+4(%rdi) ;\
++ xorl 32*p1-24(%rdi),%eax ;\
++ movl %eax,32*p1+8(%rdi) ;\
++ xorl 32*p1-20(%rdi),%eax ;\
++ movl %eax,32*p1+12(%rdi) ;\
++ pushq %rbx ;\
++ movl %eax,%ebx ;\
++ mix_col(aes_fl_tab) ;\
++ popq %rbx ;\
++ xorl %eax,%esi ;\
++ xorl %esi,%ebp ;\
++ movl %esi,32*p1+16(%rdi) ;\
++ movl %ebp,32*p1+20(%rdi) ;\
++ xorl %ebp,%edx ;\
++ xorl %edx,%ebx ;\
++ movl %edx,32*p1+24(%rdi) ;\
++ movl %ebx,32*p1+28(%rdi)
++
++// rdi = pointer to AES context
++// rsi = pointer to key bytes
++// rdx = key length, bytes or bits
++// rcx = ed_flag, 1=encrypt only, 0=both encrypt and decrypt
++
++ .align ALIGN64BYTES
++aes_set_key:
++ pushfq
++ pushq %rbp
++ pushq %rbx
++
++ movq %rcx,%r11 // ed_flg
++ movq %rdx,%rcx // key length
++ movq %rdi,%r10 // AES context
++
++ cmpl $128,%ecx
++ jb aes_30
++ shrl $3,%ecx
++aes_30: cmpl $32,%ecx
++ je aes_32
++ cmpl $24,%ecx
++ je aes_32
++ movl $16,%ecx
++aes_32: shrl $2,%ecx
++ movl %ecx,nkey(%r10)
++ leaq 6(%rcx),%rax // 10/12/14 for 4/6/8 32-bit key length
++ movl %eax,nrnd(%r10)
++ leaq ekey(%r10),%rdi // key position in AES context
++ cld
++ movl %ecx,%eax // save key length in eax
++ rep ; movsl // words in the key schedule
++ movl -4(%rsi),%ebx // put some values in registers
++ movl -8(%rsi),%edx // to allow faster code
++ movl -12(%rsi),%ebp
++ movl -16(%rsi),%esi
++
++ cmpl $4,%eax // jump on key size
++ je aes_36
++ cmpl $6,%eax
++ je aes_35
++
++ ksc8(0)
++ ksc8(1)
++ ksc8(2)
++ ksc8(3)
++ ksc8(4)
++ ksc8(5)
++ ksc8(6)
++ jmp aes_37
++aes_35: ksc6(0)
++ ksc6(1)
++ ksc6(2)
++ ksc6(3)
++ ksc6(4)
++ ksc6(5)
++ ksc6(6)
++ ksc6(7)
++ jmp aes_37
++aes_36: ksc4(0)
++ ksc4(1)
++ ksc4(2)
++ ksc4(3)
++ ksc4(4)
++ ksc4(5)
++ ksc4(6)
++ ksc4(7)
++ ksc4(8)
++ ksc4(9)
++aes_37: cmpl $0,%r11d // ed_flg
++ jne aes_39
++
++// compile decryption key schedule from encryption schedule - reverse
++// order and do mix_column operation on round keys except first and last
++
++ movl nrnd(%r10),%eax // kt = cx->d_key + nc * cx->Nrnd
++ shl $2,%rax
++ leaq dkey(%r10,%rax,4),%rdi
++ leaq ekey(%r10),%rsi // kf = cx->e_key
++
++ movsq // copy first round key (unmodified)
++ movsq
++ subq $32,%rdi
++ movl $1,%r9d
++aes_38: // do mix column on each column of
++ lodsl // each round key
++ movl %eax,%ebx
++ mix_col(aes_im_tab)
++ stosl
++ lodsl
++ movl %eax,%ebx
++ mix_col(aes_im_tab)
++ stosl
++ lodsl
++ movl %eax,%ebx
++ mix_col(aes_im_tab)
++ stosl
++ lodsl
++ movl %eax,%ebx
++ mix_col(aes_im_tab)
++ stosl
++ subq $32,%rdi
++
++ incl %r9d
++ cmpl nrnd(%r10),%r9d
++ jb aes_38
++
++ movsq // copy last round key (unmodified)
++ movsq
++aes_39: popq %rbx
++ popq %rbp
++ popfq
++ ret
++
++
++// finite field multiplies by {02}, {04} and {08}
++
++#define f2(x) ((x<<1)^(((x>>7)&1)*0x11b))
++#define f4(x) ((x<<2)^(((x>>6)&1)*0x11b)^(((x>>6)&2)*0x11b))
++#define f8(x) ((x<<3)^(((x>>5)&1)*0x11b)^(((x>>5)&2)*0x11b)^(((x>>5)&4)*0x11b))
++
++// finite field multiplies required in table generation
++
++#define f3(x) (f2(x) ^ x)
++#define f9(x) (f8(x) ^ x)
++#define fb(x) (f8(x) ^ f2(x) ^ x)
++#define fd(x) (f8(x) ^ f4(x) ^ x)
++#define fe(x) (f8(x) ^ f4(x) ^ f2(x))
++
++// These defines generate the forward table entries
++
++#define u0(x) ((f3(x) << 24) | (x << 16) | (x << 8) | f2(x))
++#define u1(x) ((x << 24) | (x << 16) | (f2(x) << 8) | f3(x))
++#define u2(x) ((x << 24) | (f2(x) << 16) | (f3(x) << 8) | x)
++#define u3(x) ((f2(x) << 24) | (f3(x) << 16) | (x << 8) | x)
++
++// These defines generate the inverse table entries
++
++#define v0(x) ((fb(x) << 24) | (fd(x) << 16) | (f9(x) << 8) | fe(x))
++#define v1(x) ((fd(x) << 24) | (f9(x) << 16) | (fe(x) << 8) | fb(x))
++#define v2(x) ((f9(x) << 24) | (fe(x) << 16) | (fb(x) << 8) | fd(x))
++#define v3(x) ((fe(x) << 24) | (fb(x) << 16) | (fd(x) << 8) | f9(x))
++
++// These defines generate entries for the last round tables
++
++#define w0(x) (x)
++#define w1(x) (x << 8)
++#define w2(x) (x << 16)
++#define w3(x) (x << 24)
++
++// macro to generate inverse mix column tables (needed for the key schedule)
++
++#define im_data0(p1) \
++ .long p1(0x00),p1(0x01),p1(0x02),p1(0x03),p1(0x04),p1(0x05),p1(0x06),p1(0x07) ;\
++ .long p1(0x08),p1(0x09),p1(0x0a),p1(0x0b),p1(0x0c),p1(0x0d),p1(0x0e),p1(0x0f) ;\
++ .long p1(0x10),p1(0x11),p1(0x12),p1(0x13),p1(0x14),p1(0x15),p1(0x16),p1(0x17) ;\
++ .long p1(0x18),p1(0x19),p1(0x1a),p1(0x1b),p1(0x1c),p1(0x1d),p1(0x1e),p1(0x1f)
++#define im_data1(p1) \
++ .long p1(0x20),p1(0x21),p1(0x22),p1(0x23),p1(0x24),p1(0x25),p1(0x26),p1(0x27) ;\
++ .long p1(0x28),p1(0x29),p1(0x2a),p1(0x2b),p1(0x2c),p1(0x2d),p1(0x2e),p1(0x2f) ;\
++ .long p1(0x30),p1(0x31),p1(0x32),p1(0x33),p1(0x34),p1(0x35),p1(0x36),p1(0x37) ;\
++ .long p1(0x38),p1(0x39),p1(0x3a),p1(0x3b),p1(0x3c),p1(0x3d),p1(0x3e),p1(0x3f)
++#define im_data2(p1) \
++ .long p1(0x40),p1(0x41),p1(0x42),p1(0x43),p1(0x44),p1(0x45),p1(0x46),p1(0x47) ;\
++ .long p1(0x48),p1(0x49),p1(0x4a),p1(0x4b),p1(0x4c),p1(0x4d),p1(0x4e),p1(0x4f) ;\
++ .long p1(0x50),p1(0x51),p1(0x52),p1(0x53),p1(0x54),p1(0x55),p1(0x56),p1(0x57) ;\
++ .long p1(0x58),p1(0x59),p1(0x5a),p1(0x5b),p1(0x5c),p1(0x5d),p1(0x5e),p1(0x5f)
++#define im_data3(p1) \
++ .long p1(0x60),p1(0x61),p1(0x62),p1(0x63),p1(0x64),p1(0x65),p1(0x66),p1(0x67) ;\
++ .long p1(0x68),p1(0x69),p1(0x6a),p1(0x6b),p1(0x6c),p1(0x6d),p1(0x6e),p1(0x6f) ;\
++ .long p1(0x70),p1(0x71),p1(0x72),p1(0x73),p1(0x74),p1(0x75),p1(0x76),p1(0x77) ;\
++ .long p1(0x78),p1(0x79),p1(0x7a),p1(0x7b),p1(0x7c),p1(0x7d),p1(0x7e),p1(0x7f)
++#define im_data4(p1) \
++ .long p1(0x80),p1(0x81),p1(0x82),p1(0x83),p1(0x84),p1(0x85),p1(0x86),p1(0x87) ;\
++ .long p1(0x88),p1(0x89),p1(0x8a),p1(0x8b),p1(0x8c),p1(0x8d),p1(0x8e),p1(0x8f) ;\
++ .long p1(0x90),p1(0x91),p1(0x92),p1(0x93),p1(0x94),p1(0x95),p1(0x96),p1(0x97) ;\
++ .long p1(0x98),p1(0x99),p1(0x9a),p1(0x9b),p1(0x9c),p1(0x9d),p1(0x9e),p1(0x9f)
++#define im_data5(p1) \
++ .long p1(0xa0),p1(0xa1),p1(0xa2),p1(0xa3),p1(0xa4),p1(0xa5),p1(0xa6),p1(0xa7) ;\
++ .long p1(0xa8),p1(0xa9),p1(0xaa),p1(0xab),p1(0xac),p1(0xad),p1(0xae),p1(0xaf) ;\
++ .long p1(0xb0),p1(0xb1),p1(0xb2),p1(0xb3),p1(0xb4),p1(0xb5),p1(0xb6),p1(0xb7) ;\
++ .long p1(0xb8),p1(0xb9),p1(0xba),p1(0xbb),p1(0xbc),p1(0xbd),p1(0xbe),p1(0xbf)
++#define im_data6(p1) \
++ .long p1(0xc0),p1(0xc1),p1(0xc2),p1(0xc3),p1(0xc4),p1(0xc5),p1(0xc6),p1(0xc7) ;\
++ .long p1(0xc8),p1(0xc9),p1(0xca),p1(0xcb),p1(0xcc),p1(0xcd),p1(0xce),p1(0xcf) ;\
++ .long p1(0xd0),p1(0xd1),p1(0xd2),p1(0xd3),p1(0xd4),p1(0xd5),p1(0xd6),p1(0xd7) ;\
++ .long p1(0xd8),p1(0xd9),p1(0xda),p1(0xdb),p1(0xdc),p1(0xdd),p1(0xde),p1(0xdf)
++#define im_data7(p1) \
++ .long p1(0xe0),p1(0xe1),p1(0xe2),p1(0xe3),p1(0xe4),p1(0xe5),p1(0xe6),p1(0xe7) ;\
++ .long p1(0xe8),p1(0xe9),p1(0xea),p1(0xeb),p1(0xec),p1(0xed),p1(0xee),p1(0xef) ;\
++ .long p1(0xf0),p1(0xf1),p1(0xf2),p1(0xf3),p1(0xf4),p1(0xf5),p1(0xf6),p1(0xf7) ;\
++ .long p1(0xf8),p1(0xf9),p1(0xfa),p1(0xfb),p1(0xfc),p1(0xfd),p1(0xfe),p1(0xff)
++
++// S-box data - 256 entries
++
++#define sb_data0(p1) \
++ .long p1(0x63),p1(0x7c),p1(0x77),p1(0x7b),p1(0xf2),p1(0x6b),p1(0x6f),p1(0xc5) ;\
++ .long p1(0x30),p1(0x01),p1(0x67),p1(0x2b),p1(0xfe),p1(0xd7),p1(0xab),p1(0x76) ;\
++ .long p1(0xca),p1(0x82),p1(0xc9),p1(0x7d),p1(0xfa),p1(0x59),p1(0x47),p1(0xf0) ;\
++ .long p1(0xad),p1(0xd4),p1(0xa2),p1(0xaf),p1(0x9c),p1(0xa4),p1(0x72),p1(0xc0)
++#define sb_data1(p1) \
++ .long p1(0xb7),p1(0xfd),p1(0x93),p1(0x26),p1(0x36),p1(0x3f),p1(0xf7),p1(0xcc) ;\
++ .long p1(0x34),p1(0xa5),p1(0xe5),p1(0xf1),p1(0x71),p1(0xd8),p1(0x31),p1(0x15) ;\
++ .long p1(0x04),p1(0xc7),p1(0x23),p1(0xc3),p1(0x18),p1(0x96),p1(0x05),p1(0x9a) ;\
++ .long p1(0x07),p1(0x12),p1(0x80),p1(0xe2),p1(0xeb),p1(0x27),p1(0xb2),p1(0x75)
++#define sb_data2(p1) \
++ .long p1(0x09),p1(0x83),p1(0x2c),p1(0x1a),p1(0x1b),p1(0x6e),p1(0x5a),p1(0xa0) ;\
++ .long p1(0x52),p1(0x3b),p1(0xd6),p1(0xb3),p1(0x29),p1(0xe3),p1(0x2f),p1(0x84) ;\
++ .long p1(0x53),p1(0xd1),p1(0x00),p1(0xed),p1(0x20),p1(0xfc),p1(0xb1),p1(0x5b) ;\
++ .long p1(0x6a),p1(0xcb),p1(0xbe),p1(0x39),p1(0x4a),p1(0x4c),p1(0x58),p1(0xcf)
++#define sb_data3(p1) \
++ .long p1(0xd0),p1(0xef),p1(0xaa),p1(0xfb),p1(0x43),p1(0x4d),p1(0x33),p1(0x85) ;\
++ .long p1(0x45),p1(0xf9),p1(0x02),p1(0x7f),p1(0x50),p1(0x3c),p1(0x9f),p1(0xa8) ;\
++ .long p1(0x51),p1(0xa3),p1(0x40),p1(0x8f),p1(0x92),p1(0x9d),p1(0x38),p1(0xf5) ;\
++ .long p1(0xbc),p1(0xb6),p1(0xda),p1(0x21),p1(0x10),p1(0xff),p1(0xf3),p1(0xd2)
++#define sb_data4(p1) \
++ .long p1(0xcd),p1(0x0c),p1(0x13),p1(0xec),p1(0x5f),p1(0x97),p1(0x44),p1(0x17) ;\
++ .long p1(0xc4),p1(0xa7),p1(0x7e),p1(0x3d),p1(0x64),p1(0x5d),p1(0x19),p1(0x73) ;\
++ .long p1(0x60),p1(0x81),p1(0x4f),p1(0xdc),p1(0x22),p1(0x2a),p1(0x90),p1(0x88) ;\
++ .long p1(0x46),p1(0xee),p1(0xb8),p1(0x14),p1(0xde),p1(0x5e),p1(0x0b),p1(0xdb)
++#define sb_data5(p1) \
++ .long p1(0xe0),p1(0x32),p1(0x3a),p1(0x0a),p1(0x49),p1(0x06),p1(0x24),p1(0x5c) ;\
++ .long p1(0xc2),p1(0xd3),p1(0xac),p1(0x62),p1(0x91),p1(0x95),p1(0xe4),p1(0x79) ;\
++ .long p1(0xe7),p1(0xc8),p1(0x37),p1(0x6d),p1(0x8d),p1(0xd5),p1(0x4e),p1(0xa9) ;\
++ .long p1(0x6c),p1(0x56),p1(0xf4),p1(0xea),p1(0x65),p1(0x7a),p1(0xae),p1(0x08)
++#define sb_data6(p1) \
++ .long p1(0xba),p1(0x78),p1(0x25),p1(0x2e),p1(0x1c),p1(0xa6),p1(0xb4),p1(0xc6) ;\
++ .long p1(0xe8),p1(0xdd),p1(0x74),p1(0x1f),p1(0x4b),p1(0xbd),p1(0x8b),p1(0x8a) ;\
++ .long p1(0x70),p1(0x3e),p1(0xb5),p1(0x66),p1(0x48),p1(0x03),p1(0xf6),p1(0x0e) ;\
++ .long p1(0x61),p1(0x35),p1(0x57),p1(0xb9),p1(0x86),p1(0xc1),p1(0x1d),p1(0x9e)
++#define sb_data7(p1) \
++ .long p1(0xe1),p1(0xf8),p1(0x98),p1(0x11),p1(0x69),p1(0xd9),p1(0x8e),p1(0x94) ;\
++ .long p1(0x9b),p1(0x1e),p1(0x87),p1(0xe9),p1(0xce),p1(0x55),p1(0x28),p1(0xdf) ;\
++ .long p1(0x8c),p1(0xa1),p1(0x89),p1(0x0d),p1(0xbf),p1(0xe6),p1(0x42),p1(0x68) ;\
++ .long p1(0x41),p1(0x99),p1(0x2d),p1(0x0f),p1(0xb0),p1(0x54),p1(0xbb),p1(0x16)
++
++// Inverse S-box data - 256 entries
++
++#define ib_data0(p1) \
++ .long p1(0x52),p1(0x09),p1(0x6a),p1(0xd5),p1(0x30),p1(0x36),p1(0xa5),p1(0x38) ;\
++ .long p1(0xbf),p1(0x40),p1(0xa3),p1(0x9e),p1(0x81),p1(0xf3),p1(0xd7),p1(0xfb) ;\
++ .long p1(0x7c),p1(0xe3),p1(0x39),p1(0x82),p1(0x9b),p1(0x2f),p1(0xff),p1(0x87) ;\
++ .long p1(0x34),p1(0x8e),p1(0x43),p1(0x44),p1(0xc4),p1(0xde),p1(0xe9),p1(0xcb)
++#define ib_data1(p1) \
++ .long p1(0x54),p1(0x7b),p1(0x94),p1(0x32),p1(0xa6),p1(0xc2),p1(0x23),p1(0x3d) ;\
++ .long p1(0xee),p1(0x4c),p1(0x95),p1(0x0b),p1(0x42),p1(0xfa),p1(0xc3),p1(0x4e) ;\
++ .long p1(0x08),p1(0x2e),p1(0xa1),p1(0x66),p1(0x28),p1(0xd9),p1(0x24),p1(0xb2) ;\
++ .long p1(0x76),p1(0x5b),p1(0xa2),p1(0x49),p1(0x6d),p1(0x8b),p1(0xd1),p1(0x25)
++#define ib_data2(p1) \
++ .long p1(0x72),p1(0xf8),p1(0xf6),p1(0x64),p1(0x86),p1(0x68),p1(0x98),p1(0x16) ;\
++ .long p1(0xd4),p1(0xa4),p1(0x5c),p1(0xcc),p1(0x5d),p1(0x65),p1(0xb6),p1(0x92) ;\
++ .long p1(0x6c),p1(0x70),p1(0x48),p1(0x50),p1(0xfd),p1(0xed),p1(0xb9),p1(0xda) ;\
++ .long p1(0x5e),p1(0x15),p1(0x46),p1(0x57),p1(0xa7),p1(0x8d),p1(0x9d),p1(0x84)
++#define ib_data3(p1) \
++ .long p1(0x90),p1(0xd8),p1(0xab),p1(0x00),p1(0x8c),p1(0xbc),p1(0xd3),p1(0x0a) ;\
++ .long p1(0xf7),p1(0xe4),p1(0x58),p1(0x05),p1(0xb8),p1(0xb3),p1(0x45),p1(0x06) ;\
++ .long p1(0xd0),p1(0x2c),p1(0x1e),p1(0x8f),p1(0xca),p1(0x3f),p1(0x0f),p1(0x02) ;\
++ .long p1(0xc1),p1(0xaf),p1(0xbd),p1(0x03),p1(0x01),p1(0x13),p1(0x8a),p1(0x6b)
++#define ib_data4(p1) \
++ .long p1(0x3a),p1(0x91),p1(0x11),p1(0x41),p1(0x4f),p1(0x67),p1(0xdc),p1(0xea) ;\
++ .long p1(0x97),p1(0xf2),p1(0xcf),p1(0xce),p1(0xf0),p1(0xb4),p1(0xe6),p1(0x73) ;\
++ .long p1(0x96),p1(0xac),p1(0x74),p1(0x22),p1(0xe7),p1(0xad),p1(0x35),p1(0x85) ;\
++ .long p1(0xe2),p1(0xf9),p1(0x37),p1(0xe8),p1(0x1c),p1(0x75),p1(0xdf),p1(0x6e)
++#define ib_data5(p1) \
++ .long p1(0x47),p1(0xf1),p1(0x1a),p1(0x71),p1(0x1d),p1(0x29),p1(0xc5),p1(0x89) ;\
++ .long p1(0x6f),p1(0xb7),p1(0x62),p1(0x0e),p1(0xaa),p1(0x18),p1(0xbe),p1(0x1b) ;\
++ .long p1(0xfc),p1(0x56),p1(0x3e),p1(0x4b),p1(0xc6),p1(0xd2),p1(0x79),p1(0x20) ;\
++ .long p1(0x9a),p1(0xdb),p1(0xc0),p1(0xfe),p1(0x78),p1(0xcd),p1(0x5a),p1(0xf4)
++#define ib_data6(p1) \
++ .long p1(0x1f),p1(0xdd),p1(0xa8),p1(0x33),p1(0x88),p1(0x07),p1(0xc7),p1(0x31) ;\
++ .long p1(0xb1),p1(0x12),p1(0x10),p1(0x59),p1(0x27),p1(0x80),p1(0xec),p1(0x5f) ;\
++ .long p1(0x60),p1(0x51),p1(0x7f),p1(0xa9),p1(0x19),p1(0xb5),p1(0x4a),p1(0x0d) ;\
++ .long p1(0x2d),p1(0xe5),p1(0x7a),p1(0x9f),p1(0x93),p1(0xc9),p1(0x9c),p1(0xef)
++#define ib_data7(p1) \
++ .long p1(0xa0),p1(0xe0),p1(0x3b),p1(0x4d),p1(0xae),p1(0x2a),p1(0xf5),p1(0xb0) ;\
++ .long p1(0xc8),p1(0xeb),p1(0xbb),p1(0x3c),p1(0x83),p1(0x53),p1(0x99),p1(0x61) ;\
++ .long p1(0x17),p1(0x2b),p1(0x04),p1(0x7e),p1(0xba),p1(0x77),p1(0xd6),p1(0x26) ;\
++ .long p1(0xe1),p1(0x69),p1(0x14),p1(0x63),p1(0x55),p1(0x21),p1(0x0c),p1(0x7d)
++
++// The rcon_table (needed for the key schedule)
++//
++// Here is original Dr Brian Gladman's source code:
++// _rcon_tab:
++// %assign x 1
++// %rep 29
++// dd x
++// %assign x f2(x)
++// %endrep
++//
++// Here is precomputed output (it's more portable this way):
++
++ .section .rodata
++ .align ALIGN64BYTES
++aes_rcon_tab:
++ .long 0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80
++ .long 0x1b,0x36,0x6c,0xd8,0xab,0x4d,0x9a,0x2f
++ .long 0x5e,0xbc,0x63,0xc6,0x97,0x35,0x6a,0xd4
++ .long 0xb3,0x7d,0xfa,0xef,0xc5
++
++// The forward xor tables
++
++ .align ALIGN64BYTES
++aes_ft_tab:
++ sb_data0(u0)
++ sb_data1(u0)
++ sb_data2(u0)
++ sb_data3(u0)
++ sb_data4(u0)
++ sb_data5(u0)
++ sb_data6(u0)
++ sb_data7(u0)
++
++ sb_data0(u1)
++ sb_data1(u1)
++ sb_data2(u1)
++ sb_data3(u1)
++ sb_data4(u1)
++ sb_data5(u1)
++ sb_data6(u1)
++ sb_data7(u1)
++
++ sb_data0(u2)
++ sb_data1(u2)
++ sb_data2(u2)
++ sb_data3(u2)
++ sb_data4(u2)
++ sb_data5(u2)
++ sb_data6(u2)
++ sb_data7(u2)
++
++ sb_data0(u3)
++ sb_data1(u3)
++ sb_data2(u3)
++ sb_data3(u3)
++ sb_data4(u3)
++ sb_data5(u3)
++ sb_data6(u3)
++ sb_data7(u3)
++
++ .align ALIGN64BYTES
++aes_fl_tab:
++ sb_data0(w0)
++ sb_data1(w0)
++ sb_data2(w0)
++ sb_data3(w0)
++ sb_data4(w0)
++ sb_data5(w0)
++ sb_data6(w0)
++ sb_data7(w0)
++
++ sb_data0(w1)
++ sb_data1(w1)
++ sb_data2(w1)
++ sb_data3(w1)
++ sb_data4(w1)
++ sb_data5(w1)
++ sb_data6(w1)
++ sb_data7(w1)
++
++ sb_data0(w2)
++ sb_data1(w2)
++ sb_data2(w2)
++ sb_data3(w2)
++ sb_data4(w2)
++ sb_data5(w2)
++ sb_data6(w2)
++ sb_data7(w2)
++
++ sb_data0(w3)
++ sb_data1(w3)
++ sb_data2(w3)
++ sb_data3(w3)
++ sb_data4(w3)
++ sb_data5(w3)
++ sb_data6(w3)
++ sb_data7(w3)
++
++// The inverse xor tables
++
++ .align ALIGN64BYTES
++aes_it_tab:
++ ib_data0(v0)
++ ib_data1(v0)
++ ib_data2(v0)
++ ib_data3(v0)
++ ib_data4(v0)
++ ib_data5(v0)
++ ib_data6(v0)
++ ib_data7(v0)
++
++ ib_data0(v1)
++ ib_data1(v1)
++ ib_data2(v1)
++ ib_data3(v1)
++ ib_data4(v1)
++ ib_data5(v1)
++ ib_data6(v1)
++ ib_data7(v1)
++
++ ib_data0(v2)
++ ib_data1(v2)
++ ib_data2(v2)
++ ib_data3(v2)
++ ib_data4(v2)
++ ib_data5(v2)
++ ib_data6(v2)
++ ib_data7(v2)
++
++ ib_data0(v3)
++ ib_data1(v3)
++ ib_data2(v3)
++ ib_data3(v3)
++ ib_data4(v3)
++ ib_data5(v3)
++ ib_data6(v3)
++ ib_data7(v3)
++
++ .align ALIGN64BYTES
++aes_il_tab:
++ ib_data0(w0)
++ ib_data1(w0)
++ ib_data2(w0)
++ ib_data3(w0)
++ ib_data4(w0)
++ ib_data5(w0)
++ ib_data6(w0)
++ ib_data7(w0)
++
++ ib_data0(w1)
++ ib_data1(w1)
++ ib_data2(w1)
++ ib_data3(w1)
++ ib_data4(w1)
++ ib_data5(w1)
++ ib_data6(w1)
++ ib_data7(w1)
++
++ ib_data0(w2)
++ ib_data1(w2)
++ ib_data2(w2)
++ ib_data3(w2)
++ ib_data4(w2)
++ ib_data5(w2)
++ ib_data6(w2)
++ ib_data7(w2)
++
++ ib_data0(w3)
++ ib_data1(w3)
++ ib_data2(w3)
++ ib_data3(w3)
++ ib_data4(w3)
++ ib_data5(w3)
++ ib_data6(w3)
++ ib_data7(w3)
++
++// The inverse mix column tables
++
++ .align ALIGN64BYTES
++aes_im_tab:
++ im_data0(v0)
++ im_data1(v0)
++ im_data2(v0)
++ im_data3(v0)
++ im_data4(v0)
++ im_data5(v0)
++ im_data6(v0)
++ im_data7(v0)
++
++ im_data0(v1)
++ im_data1(v1)
++ im_data2(v1)
++ im_data3(v1)
++ im_data4(v1)
++ im_data5(v1)
++ im_data6(v1)
++ im_data7(v1)
++
++ im_data0(v2)
++ im_data1(v2)
++ im_data2(v2)
++ im_data3(v2)
++ im_data4(v2)
++ im_data5(v2)
++ im_data6(v2)
++ im_data7(v2)
++
++ im_data0(v3)
++ im_data1(v3)
++ im_data2(v3)
++ im_data3(v3)
++ im_data4(v3)
++ im_data5(v3)
++ im_data6(v3)
++ im_data7(v3)
++
++#if defined(__ELF__) && defined(SECTION_NOTE_GNU_STACK)
++ .section .note.GNU-stack,"",@progbits
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/aes-intel32.S linux-3.14-AES/drivers/misc/aes-intel32.S
+--- linux-3.14-noloop/drivers/misc/aes-intel32.S 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/aes-intel32.S 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,655 @@
++/*
++ * Implement AES algorithm in Intel AES-NI instructions.
++ *
++ * The white paper of AES-NI instructions can be downloaded from:
++ * http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf
++ *
++ * Copyright (C) 2008, Intel Corp.
++ * Author: Huang Ying <ying.huang@intel.com>
++ * Vinodh Gopal <vinodh.gopal@intel.com>
++ * Kahraman Akdemir
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++/*
++ * Modified by Jari Ruusu, October 2009
++ * - Adapted for loop-AES
++ */
++
++/*
++ * Modified by Jari Ruusu, March 2010
++ * - Added parallelized 4x512 CBC encrypt
++ */
++
++#if !defined(ALIGN64BYTES)
++# define ALIGN64BYTES 64
++#endif
++
++ .file "aes-intel32.S"
++ .globl intel_aes_cbc_encrypt
++ .globl intel_aes_cbc_decrypt
++ .globl intel_aes_cbc_enc_4x512
++ .text
++
++#define STATE1 %xmm0
++#define STATE2 %xmm4
++#define STATE3 %xmm5
++#define STATE STATE1
++#define IN1 %xmm1
++#define IN2 %xmm7
++#define IN3 %xmm6
++#define IN IN1
++#define KEY %xmm2
++#define IV %xmm3
++
++#define KEYP %edi
++#define INP %esi
++#define OUTP %edx
++#define LEN %ecx
++#define IVP %ebx
++#define NRND %eax
++#define TKEYP %ebp
++
++/*
++ * void intel_aes_cbc_encrypt(const aes_context *, void *src, void *dst, size_t len, void *iv)
++ *
++ * Stack after reg saves: 36(%esp) = void *iv
++ * 32(%esp) = size_t len
++ * 28(%esp) = void *dst
++ * 24(%esp) = void *src
++ * 20(%esp) = aes_context *
++ */
++ .align ALIGN64BYTES
++intel_aes_cbc_encrypt:
++ push %edi
++ push %esi
++ push %ebx
++ push %ebp
++ mov 20(%esp),KEYP
++ mov 24(%esp),INP
++ mov 28(%esp),OUTP
++ mov 32(%esp),LEN
++ mov 36(%esp),IVP
++ mov 4(KEYP), NRND
++ add $8, KEYP
++ movups (IVP), STATE # load iv as initial state
++.align 4
++.Lcbc_enc_loop:
++ movups (INP), IN # load input
++ pxor IN, STATE
++
++ movaps (KEYP), KEY # key
++ mov KEYP, TKEYP
++ pxor KEY, STATE # round 0
++ add $0x30, TKEYP
++ cmp $12, NRND
++ jb .Lenc128
++ lea 0x20(TKEYP), TKEYP
++ je .Lenc192
++ add $0x20, TKEYP
++ movaps -0x60(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps -0x50(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++.align 4
++.Lenc192:
++ movaps -0x40(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps -0x30(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++.align 4
++.Lenc128:
++ movaps -0x20(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps -0x10(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps (TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x10(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x20(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x30(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x40(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x50(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x60(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x70(TKEYP), KEY
++ # aesenclast KEY, STATE # last round
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xc2
++
++ movups STATE, (OUTP) # store output
++ sub $16, LEN
++ add $16, INP
++ add $16, OUTP
++ cmp $16, LEN
++ jge .Lcbc_enc_loop
++ emms
++ pop %ebp
++ pop %ebx
++ pop %esi
++ pop %edi
++ ret
++
++/*
++ * void intel_aes_cbc_decrypt(const aes_context *, void *src, void *dst, size_t len, void *iv)
++ *
++ * Stack after reg saves: 36(%esp) = void *iv
++ * 32(%esp) = size_t len
++ * 28(%esp) = void *dst
++ * 24(%esp) = void *src
++ * 20(%esp) = aes_context *
++ */
++ .align ALIGN64BYTES
++intel_aes_cbc_decrypt:
++ push %edi
++ push %esi
++ push %ebx
++ push %ebp
++ mov 20(%esp),KEYP
++ mov 24(%esp),INP
++ mov 28(%esp),OUTP
++ mov 32(%esp),LEN
++ mov 36(%esp),IVP
++ mov 4(KEYP), NRND
++ add $264, KEYP
++ movups (IVP), IV
++ cmp $48, LEN
++ jb .Lcbc_dec_loop1
++.align 4
++.Lcbc_dec_loop3:
++ movups (INP), IN1
++ movaps IN1, STATE1
++ movups 0x10(INP), IN2
++ movaps IN2, STATE2
++ movups 0x20(INP), IN3
++ movaps IN3, STATE3
++
++ movaps (KEYP), KEY # key
++ mov KEYP, TKEYP
++ pxor KEY, STATE1 # round 0
++ pxor KEY, STATE2
++ pxor KEY, STATE3
++ add $0x30, TKEYP
++ cmp $12, NRND
++ jb .L4dec128
++ lea 0x20(TKEYP), TKEYP
++ je .L4dec192
++ add $0x20, TKEYP
++ movaps -0x60(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps -0x50(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++.align 4
++.L4dec192:
++ movaps -0x40(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps -0x30(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++.align 4
++.L4dec128:
++ movaps -0x20(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps -0x10(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps (TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps 0x10(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps 0x20(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps 0x30(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps 0x40(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps 0x50(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps 0x60(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ movaps 0x70(TKEYP), KEY
++ # aesdeclast KEY, STATE1 # last round
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
++ # aesdeclast KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xe2
++ # aesdeclast KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xea
++
++ pxor IV, STATE1
++ pxor IN1, STATE2
++ pxor IN2, STATE3
++ movaps IN3, IV
++ movups STATE1, (OUTP)
++ movups STATE2, 0x10(OUTP)
++ movups STATE3, 0x20(OUTP)
++ sub $48, LEN
++ add $48, INP
++ add $48, OUTP
++ cmp $48, LEN
++ jge .Lcbc_dec_loop3
++ cmp $16, LEN
++ jb .Lcbc_dec_ret
++.align 4
++.Lcbc_dec_loop1:
++ movups (INP), IN
++ movaps IN, STATE
++
++ movaps (KEYP), KEY # key
++ mov KEYP, TKEYP
++ pxor KEY, STATE # round 0
++ add $0x30, TKEYP
++ cmp $12, NRND
++ jb .Ldec128
++ lea 0x20(TKEYP), TKEYP
++ je .Ldec192
++ add $0x20, TKEYP
++ movaps -0x60(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps -0x50(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++.align 4
++.Ldec192:
++ movaps -0x40(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps -0x30(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++.align 4
++.Ldec128:
++ movaps -0x20(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps -0x10(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps (TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x10(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x20(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x30(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x40(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x50(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x60(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x70(TKEYP), KEY
++ # aesdeclast KEY, STATE # last round
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
++
++ pxor IV, STATE
++ movups STATE, (OUTP)
++ movaps IN, IV
++ sub $16, LEN
++ add $16, INP
++ add $16, OUTP
++ cmp $16, LEN
++ jge .Lcbc_dec_loop1
++.Lcbc_dec_ret:
++ emms
++ pop %ebp
++ pop %ebx
++ pop %esi
++ pop %edi
++ ret
++
++/*
++ * void intel_aes_cbc_enc_4x512(aes_context **, void *src, void *dst, void *iv)
++ *
++ * Stack after reg saves: 32(%esp) = void *iv
++ * 28(%esp) = void *dst
++ * 24(%esp) = void *src
++ * 20(%esp) = aes_context **
++ */
++ .align ALIGN64BYTES
++intel_aes_cbc_enc_4x512:
++ push %edi
++ push %esi
++ push %ebx
++ push %ebp
++ mov 20(%esp),%edi
++ mov 32(%esp),%esi
++ mov 24(%esp),%ebp
++ mov (%edi),%eax # pointer to context struct 1
++ mov 4(%edi),%ebx # pointer to context struct 2
++ mov 8(%edi),%ecx # pointer to context struct 3
++ mov 12(%edi),%edx # pointer to context struct 4
++ mov 4(%eax),%edi # number of rounds (10/12/14)
++ movups (%esi),%xmm0 # load IV as initial state
++ movups 0x10(%esi),%xmm1
++ movups 0x20(%esi),%xmm2
++ movups 0x30(%esi),%xmm3
++ sub $10,%edi
++ mov $0x200,%esi # 512 byte CBC chain
++ shl $4,%edi
++ add $0x38,%edi # 0x38 / 0x58 / 0x78
++.align 4
++.Lcbc_enc_loop4:
++ movups (%ebp),%xmm4 # load input
++ movups 0x200(%ebp),%xmm5
++ movups 0x400(%ebp),%xmm6
++ movups 0x600(%ebp),%xmm7
++ add $16,%ebp
++ mov %ebp,24(%esp)
++ mov 28(%esp),%ebp
++ pxor %xmm4,%xmm0 # CBC-mode XOR
++ pxor %xmm5,%xmm1
++ pxor %xmm6,%xmm2
++ pxor %xmm7,%xmm3
++
++ movaps 0x08(%eax),%xmm4 # round 0 key
++ movaps 0x08(%ebx),%xmm5
++ movaps 0x08(%ecx),%xmm6
++ movaps 0x08(%edx),%xmm7
++ pxor %xmm4,%xmm0 # round 0 XOR
++ pxor %xmm5,%xmm1
++ pxor %xmm6,%xmm2
++ pxor %xmm7,%xmm3
++
++ cmp $0x58,%edi
++ jb .L4enc128
++ je .L4enc192
++
++ movaps -0x60(%eax,%edi,1),%xmm4
++ movaps -0x60(%ebx,%edi,1),%xmm5
++ movaps -0x60(%ecx,%edi,1),%xmm6
++ movaps -0x60(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps -0x50(%eax,%edi,1),%xmm4
++ movaps -0x50(%ebx,%edi,1),%xmm5
++ movaps -0x50(%ecx,%edi,1),%xmm6
++ movaps -0x50(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++.align 4
++.L4enc192:
++ movaps -0x40(%eax,%edi,1),%xmm4
++ movaps -0x40(%ebx,%edi,1),%xmm5
++ movaps -0x40(%ecx,%edi,1),%xmm6
++ movaps -0x40(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps -0x30(%eax,%edi,1),%xmm4
++ movaps -0x30(%ebx,%edi,1),%xmm5
++ movaps -0x30(%ecx,%edi,1),%xmm6
++ movaps -0x30(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++.align 4
++.L4enc128:
++ movaps -0x20(%eax,%edi,1),%xmm4
++ movaps -0x20(%ebx,%edi,1),%xmm5
++ movaps -0x20(%ecx,%edi,1),%xmm6
++ movaps -0x20(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps -0x10(%eax,%edi,1),%xmm4
++ movaps -0x10(%ebx,%edi,1),%xmm5
++ movaps -0x10(%ecx,%edi,1),%xmm6
++ movaps -0x10(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps (%eax,%edi,1),%xmm4
++ movaps (%ebx,%edi,1),%xmm5
++ movaps (%ecx,%edi,1),%xmm6
++ movaps (%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x10(%eax,%edi,1),%xmm4
++ movaps 0x10(%ebx,%edi,1),%xmm5
++ movaps 0x10(%ecx,%edi,1),%xmm6
++ movaps 0x10(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x20(%eax,%edi,1),%xmm4
++ movaps 0x20(%ebx,%edi,1),%xmm5
++ movaps 0x20(%ecx,%edi,1),%xmm6
++ movaps 0x20(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x30(%eax,%edi,1),%xmm4
++ movaps 0x30(%ebx,%edi,1),%xmm5
++ movaps 0x30(%ecx,%edi,1),%xmm6
++ movaps 0x30(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x40(%eax,%edi,1),%xmm4
++ movaps 0x40(%ebx,%edi,1),%xmm5
++ movaps 0x40(%ecx,%edi,1),%xmm6
++ movaps 0x40(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x50(%eax,%edi,1),%xmm4
++ movaps 0x50(%ebx,%edi,1),%xmm5
++ movaps 0x50(%ecx,%edi,1),%xmm6
++ movaps 0x50(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x60(%eax,%edi,1),%xmm4
++ movaps 0x60(%ebx,%edi,1),%xmm5
++ movaps 0x60(%ecx,%edi,1),%xmm6
++ movaps 0x60(%edx,%edi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x70(%eax,%edi,1),%xmm4
++ movaps 0x70(%ebx,%edi,1),%xmm5
++ movaps 0x70(%ecx,%edi,1),%xmm6
++ movaps 0x70(%edx,%edi,1),%xmm7
++ # aesenclast %xmm4,%xmm0 # last round
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xc4
++ # aesenclast %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xcd
++ # aesenclast %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xd6
++ # aesenclast %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xdf
++
++ sub $16,%esi
++ movups %xmm0,(%ebp) # store output
++ movups %xmm1,0x200(%ebp)
++ movups %xmm2,0x400(%ebp)
++ movups %xmm3,0x600(%ebp)
++ add $16,%ebp
++ mov %ebp,28(%esp)
++ mov 24(%esp),%ebp
++ cmp $16,%esi
++ jge .Lcbc_enc_loop4
++ emms
++ pop %ebp
++ pop %ebx
++ pop %esi
++ pop %edi
++ ret
++
++#if defined(__ELF__) && defined(SECTION_NOTE_GNU_STACK)
++ .section .note.GNU-stack,"",@progbits
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/aes-intel64.S linux-3.14-AES/drivers/misc/aes-intel64.S
+--- linux-3.14-noloop/drivers/misc/aes-intel64.S 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/aes-intel64.S 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,649 @@
++/*
++ * Implement AES algorithm in Intel AES-NI instructions.
++ *
++ * The white paper of AES-NI instructions can be downloaded from:
++ * http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf
++ *
++ * Copyright (C) 2008, Intel Corp.
++ * Author: Huang Ying <ying.huang@intel.com>
++ * Vinodh Gopal <vinodh.gopal@intel.com>
++ * Kahraman Akdemir
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++/*
++ * Modified by Jari Ruusu, October 2009
++ * - Adapted for loop-AES
++ */
++
++/*
++ * Modified by Jari Ruusu, March 2010
++ * - Added parallelized 4x512 CBC encrypt
++ */
++
++#if !defined(ALIGN64BYTES)
++# define ALIGN64BYTES 64
++#endif
++
++ .file "aes-intel64.S"
++ .globl intel_aes_cbc_encrypt
++ .globl intel_aes_cbc_decrypt
++ .globl intel_aes_cbc_enc_4x512
++ .text
++
++#define STATE1 %xmm0
++#define STATE2 %xmm4
++#define STATE3 %xmm5
++#define STATE4 %xmm6
++#define STATE STATE1
++#define IN1 %xmm1
++#define IN2 %xmm7
++#define IN3 %xmm8
++#define IN4 %xmm9
++#define IN IN1
++#define KEY %xmm2
++#define IV %xmm3
++
++#define KEYP %rdi
++#define INP %rsi
++#define OUTP %rdx
++#define LEN %rcx
++#define IVP %r8
++#define NRND %r9d
++#define TKEYP %r10
++
++/*
++ * void intel_aes_cbc_encrypt(const aes_context *, void *src, void *dst, size_t len, void *iv)
++ *
++ * Parameters: %rdi = aes_context *
++ * %rsi = void *src
++ * %rdx = void *dst
++ * %rcx = size_t len
++ * %r8 = void *iv
++ */
++ .align ALIGN64BYTES
++intel_aes_cbc_encrypt:
++ mov 4(KEYP), NRND
++ add $8, KEYP
++ movups (IVP), STATE # load iv as initial state
++.align 4
++.Lcbc_enc_loop:
++ movups (INP), IN # load input
++ pxor IN, STATE
++
++ movaps (KEYP), KEY # key
++ mov KEYP, TKEYP
++ pxor KEY, STATE # round 0
++ add $0x30, TKEYP
++ cmp $12, NRND
++ jb .Lenc128
++ lea 0x20(TKEYP), TKEYP
++ je .Lenc192
++ add $0x20, TKEYP
++ movaps -0x60(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps -0x50(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++.align 4
++.Lenc192:
++ movaps -0x40(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps -0x30(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++.align 4
++.Lenc128:
++ movaps -0x20(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps -0x10(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps (TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x10(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x20(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x30(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x40(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x50(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x60(TKEYP), KEY
++ # aesenc KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
++ movaps 0x70(TKEYP), KEY
++ # aesenclast KEY, STATE # last round
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xc2
++
++ movups STATE, (OUTP) # store output
++ sub $16, LEN
++ add $16, INP
++ add $16, OUTP
++ cmp $16, LEN
++ jge .Lcbc_enc_loop
++ emms
++ ret
++
++/*
++ * void intel_aes_cbc_decrypt(const aes_context *, void *src, void *dst, size_t len, void *iv)
++ *
++ * Parameters: %rdi = aes_context *
++ * %rsi = void *src
++ * %rdx = void *dst
++ * %rcx = size_t len
++ * %r8 = void *iv
++ */
++ .align ALIGN64BYTES
++intel_aes_cbc_decrypt:
++ mov 4(KEYP), NRND
++ add $264, KEYP
++ movups (IVP), IV
++ cmp $64, LEN
++ jb .Lcbc_dec_loop1
++.align 4
++.Lcbc_dec_loop4:
++ movups (INP), IN1
++ movaps IN1, STATE1
++ movups 0x10(INP), IN2
++ movaps IN2, STATE2
++ movups 0x20(INP), IN3
++ movaps IN3, STATE3
++ movups 0x30(INP), IN4
++ movaps IN4, STATE4
++
++ movaps (KEYP), KEY # key
++ mov KEYP, TKEYP
++ pxor KEY, STATE1 # round 0
++ pxor KEY, STATE2
++ pxor KEY, STATE3
++ pxor KEY, STATE4
++ add $0x30, TKEYP
++ cmp $12, NRND
++ jb .L4dec128
++ lea 0x20(TKEYP), TKEYP
++ je .L4dec192
++ add $0x20, TKEYP
++ movaps -0x60(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps -0x50(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++.align 4
++.L4dec192:
++ movaps -0x40(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps -0x30(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++.align 4
++.L4dec128:
++ movaps -0x20(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps -0x10(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps (TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps 0x10(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps 0x20(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps 0x30(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps 0x40(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps 0x50(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps 0x60(TKEYP), KEY
++ # aesdec KEY, STATE1
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ # aesdec KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
++ # aesdec KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xea
++ # aesdec KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
++ movaps 0x70(TKEYP), KEY
++ # aesdeclast KEY, STATE1 # last round
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
++ # aesdeclast KEY, STATE2
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xe2
++ # aesdeclast KEY, STATE3
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xea
++ # aesdeclast KEY, STATE4
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xf2
++
++ pxor IV, STATE1
++ pxor IN1, STATE2
++ pxor IN2, STATE3
++ pxor IN3, STATE4
++ movaps IN4, IV
++ movups STATE1, (OUTP)
++ movups STATE2, 0x10(OUTP)
++ movups STATE3, 0x20(OUTP)
++ movups STATE4, 0x30(OUTP)
++ sub $64, LEN
++ add $64, INP
++ add $64, OUTP
++ cmp $64, LEN
++ jge .Lcbc_dec_loop4
++ cmp $16, LEN
++ jb .Lcbc_dec_ret
++.align 4
++.Lcbc_dec_loop1:
++ movups (INP), IN
++ movaps IN, STATE
++
++ movaps (KEYP), KEY # key
++ mov KEYP, TKEYP
++ pxor KEY, STATE # round 0
++ add $0x30, TKEYP
++ cmp $12, NRND
++ jb .Ldec128
++ lea 0x20(TKEYP), TKEYP
++ je .Ldec192
++ add $0x20, TKEYP
++ movaps -0x60(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps -0x50(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++.align 4
++.Ldec192:
++ movaps -0x40(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps -0x30(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++.align 4
++.Ldec128:
++ movaps -0x20(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps -0x10(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps (TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x10(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x20(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x30(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x40(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x50(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x60(TKEYP), KEY
++ # aesdec KEY, STATE
++ .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
++ movaps 0x70(TKEYP), KEY
++ # aesdeclast KEY, STATE # last round
++ .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
++
++ pxor IV, STATE
++ movups STATE, (OUTP)
++ movaps IN, IV
++ sub $16, LEN
++ add $16, INP
++ add $16, OUTP
++ cmp $16, LEN
++ jge .Lcbc_dec_loop1
++.Lcbc_dec_ret:
++ emms
++ ret
++
++/*
++ * void intel_aes_cbc_enc_4x512(aes_context **, void *src, void *dst, void *iv)
++ *
++ * Parameters: %rdi = aes_context **
++ * %rsi = void *src
++ * %rdx = void *dst
++ * %rcx = void *iv
++ */
++ .align ALIGN64BYTES
++intel_aes_cbc_enc_4x512:
++ mov (%rdi),%rax # pointer to context struct 1
++ mov 8(%rdi),%r8 # pointer to context struct 2
++ mov 16(%rdi),%r9 # pointer to context struct 3
++ mov 24(%rdi),%r10 # pointer to context struct 4
++ mov 4(%rax),%edi # number of rounds (10/12/14)
++ movups (%rcx),%xmm0 # load IV as initial state
++ movups 0x10(%rcx),%xmm1
++ movups 0x20(%rcx),%xmm2
++ movups 0x30(%rcx),%xmm3
++ sub $10,%edi
++ mov $0x200,%ecx # 512 byte CBC chain
++ shl $4,%edi
++ add $0x38,%edi # 0x38 / 0x58 / 0x78
++.align 4
++.Lcbc_enc_loop4:
++ movups (%rsi),%xmm4 # load input
++ movups 0x200(%rsi),%xmm5
++ movups 0x400(%rsi),%xmm6
++ movups 0x600(%rsi),%xmm7
++ add $16,%rsi
++ pxor %xmm4,%xmm0 # CBC-mode XOR
++ pxor %xmm5,%xmm1
++ pxor %xmm6,%xmm2
++ pxor %xmm7,%xmm3
++
++ movaps 0x08(%rax),%xmm4 # round 0 key
++ movaps 0x08(%r8),%xmm5
++ movaps 0x08(%r9),%xmm6
++ movaps 0x08(%r10),%xmm7
++ pxor %xmm4,%xmm0 # round 0 XOR
++ pxor %xmm5,%xmm1
++ pxor %xmm6,%xmm2
++ pxor %xmm7,%xmm3
++
++ cmp $0x58,%edi
++ jb .L4enc128
++ je .L4enc192
++
++ movaps -0x60(%rax,%rdi,1),%xmm4
++ movaps -0x60(%r8,%rdi,1),%xmm5
++ movaps -0x60(%r9,%rdi,1),%xmm6
++ movaps -0x60(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps -0x50(%rax,%rdi,1),%xmm4
++ movaps -0x50(%r8,%rdi,1),%xmm5
++ movaps -0x50(%r9,%rdi,1),%xmm6
++ movaps -0x50(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++.align 4
++.L4enc192:
++ movaps -0x40(%rax,%rdi,1),%xmm4
++ movaps -0x40(%r8,%rdi,1),%xmm5
++ movaps -0x40(%r9,%rdi,1),%xmm6
++ movaps -0x40(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps -0x30(%rax,%rdi,1),%xmm4
++ movaps -0x30(%r8,%rdi,1),%xmm5
++ movaps -0x30(%r9,%rdi,1),%xmm6
++ movaps -0x30(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++.align 4
++.L4enc128:
++ movaps -0x20(%rax,%rdi,1),%xmm4
++ movaps -0x20(%r8,%rdi,1),%xmm5
++ movaps -0x20(%r9,%rdi,1),%xmm6
++ movaps -0x20(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps -0x10(%rax,%rdi,1),%xmm4
++ movaps -0x10(%r8,%rdi,1),%xmm5
++ movaps -0x10(%r9,%rdi,1),%xmm6
++ movaps -0x10(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps (%rax,%rdi,1),%xmm4
++ movaps (%r8,%rdi,1),%xmm5
++ movaps (%r9,%rdi,1),%xmm6
++ movaps (%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x10(%rax,%rdi,1),%xmm4
++ movaps 0x10(%r8,%rdi,1),%xmm5
++ movaps 0x10(%r9,%rdi,1),%xmm6
++ movaps 0x10(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x20(%rax,%rdi,1),%xmm4
++ movaps 0x20(%r8,%rdi,1),%xmm5
++ movaps 0x20(%r9,%rdi,1),%xmm6
++ movaps 0x20(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x30(%rax,%rdi,1),%xmm4
++ movaps 0x30(%r8,%rdi,1),%xmm5
++ movaps 0x30(%r9,%rdi,1),%xmm6
++ movaps 0x30(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x40(%rax,%rdi,1),%xmm4
++ movaps 0x40(%r8,%rdi,1),%xmm5
++ movaps 0x40(%r9,%rdi,1),%xmm6
++ movaps 0x40(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x50(%rax,%rdi,1),%xmm4
++ movaps 0x50(%r8,%rdi,1),%xmm5
++ movaps 0x50(%r9,%rdi,1),%xmm6
++ movaps 0x50(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x60(%rax,%rdi,1),%xmm4
++ movaps 0x60(%r8,%rdi,1),%xmm5
++ movaps 0x60(%r9,%rdi,1),%xmm6
++ movaps 0x60(%r10,%rdi,1),%xmm7
++ # aesenc %xmm4,%xmm0
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xc4
++ # aesenc %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xcd
++ # aesenc %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xd6
++ # aesenc %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdc, 0xdf
++
++ movaps 0x70(%rax,%rdi,1),%xmm4
++ movaps 0x70(%r8,%rdi,1),%xmm5
++ movaps 0x70(%r9,%rdi,1),%xmm6
++ movaps 0x70(%r10,%rdi,1),%xmm7
++ # aesenclast %xmm4,%xmm0 # last round
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xc4
++ # aesenclast %xmm5,%xmm1
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xcd
++ # aesenclast %xmm6,%xmm2
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xd6
++ # aesenclast %xmm7,%xmm3
++ .byte 0x66, 0x0f, 0x38, 0xdd, 0xdf
++
++ sub $16,%ecx
++ movups %xmm0,(%rdx) # store output
++ movups %xmm1,0x200(%rdx)
++ movups %xmm2,0x400(%rdx)
++ movups %xmm3,0x600(%rdx)
++ add $16,%rdx
++ cmp $16,%ecx
++ jge .Lcbc_enc_loop4
++ emms
++ ret
++
++#if defined(__ELF__) && defined(SECTION_NOTE_GNU_STACK)
++ .section .note.GNU-stack,"",@progbits
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/aes-x86.S linux-3.14-AES/drivers/misc/aes-x86.S
+--- linux-3.14-noloop/drivers/misc/aes-x86.S 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/aes-x86.S 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,927 @@
++//
++// Copyright (c) 2001, Dr Brian Gladman <brg@gladman.uk.net>, Worcester, UK.
++// All rights reserved.
++//
++// TERMS
++//
++// Redistribution and use in source and binary forms, with or without
++// modification, are permitted subject to the following conditions:
++//
++// 1. Redistributions of source code must retain the above copyright
++// notice, this list of conditions and the following disclaimer.
++//
++// 2. Redistributions in binary form must reproduce the above copyright
++// notice, this list of conditions and the following disclaimer in the
++// documentation and/or other materials provided with the distribution.
++//
++// 3. The copyright holder's name must not be used to endorse or promote
++// any products derived from this software without his specific prior
++// written permission.
++//
++// This software is provided 'as is' with no express or implied warranties
++// of correctness or fitness for purpose.
++
++// Modified by Jari Ruusu, December 24 2001
++// - Converted syntax to GNU CPP/assembler syntax
++// - C programming interface converted back to "old" API
++// - Minor portability cleanups and speed optimizations
++
++// Modified by Jari Ruusu, April 11 2002
++// - Added above copyright and terms to resulting object code so that
++// binary distributions can avoid legal trouble
++
++// An AES (Rijndael) implementation for x86 compatible processors. This
++// version uses i386 instruction set but instruction scheduling is optimized
++// for Pentium-2. This version only implements the standard AES block length
++// (128 bits, 16 bytes). This code does not preserve the eax, ecx or edx
++// registers or the artihmetic status flags. However, the ebx, esi, edi, and
++// ebp registers are preserved across calls.
++
++// void aes_set_key(aes_context *cx, const unsigned char key[], const int key_len, const int f)
++// void aes_encrypt(const aes_context *cx, const unsigned char in_blk[], unsigned char out_blk[])
++// void aes_decrypt(const aes_context *cx, const unsigned char in_blk[], unsigned char out_blk[])
++
++#if defined(USE_UNDERLINE)
++# define aes_set_key _aes_set_key
++# define aes_encrypt _aes_encrypt
++# define aes_decrypt _aes_decrypt
++#endif
++#if !defined(ALIGN32BYTES)
++# define ALIGN32BYTES 32
++#endif
++
++ .file "aes-x86.S"
++ .globl aes_set_key
++ .globl aes_encrypt
++ .globl aes_decrypt
++
++ .text
++copyright:
++ .ascii " \000"
++ .ascii "Copyright (c) 2001, Dr Brian Gladman <brg@gladman.uk.net>, Worcester, UK.\000"
++ .ascii "All rights reserved.\000"
++ .ascii " \000"
++ .ascii "TERMS\000"
++ .ascii " \000"
++ .ascii " Redistribution and use in source and binary forms, with or without\000"
++ .ascii " modification, are permitted subject to the following conditions:\000"
++ .ascii " \000"
++ .ascii " 1. Redistributions of source code must retain the above copyright\000"
++ .ascii " notice, this list of conditions and the following disclaimer.\000"
++ .ascii " \000"
++ .ascii " 2. Redistributions in binary form must reproduce the above copyright\000"
++ .ascii " notice, this list of conditions and the following disclaimer in the\000"
++ .ascii " documentation and/or other materials provided with the distribution.\000"
++ .ascii " \000"
++ .ascii " 3. The copyright holder's name must not be used to endorse or promote\000"
++ .ascii " any products derived from this software without his specific prior\000"
++ .ascii " written permission.\000"
++ .ascii " \000"
++ .ascii " This software is provided 'as is' with no express or implied warranties\000"
++ .ascii " of correctness or fitness for purpose.\000"
++ .ascii " \000"
++
++#define tlen 1024 // length of each of 4 'xor' arrays (256 32-bit words)
++
++// offsets to parameters with one register pushed onto stack
++
++#define ctx 8 // AES context structure
++#define in_blk 12 // input byte array address parameter
++#define out_blk 16 // output byte array address parameter
++
++// offsets in context structure
++
++#define nkey 0 // key length, size 4
++#define nrnd 4 // number of rounds, size 4
++#define ekey 8 // encryption key schedule base address, size 256
++#define dkey 264 // decryption key schedule base address, size 256
++
++// This macro performs a forward encryption cycle. It is entered with
++// the first previous round column values in %eax, %ebx, %esi and %edi and
++// exits with the final values in the same registers.
++
++#define fwd_rnd(p1,p2) \
++ mov %ebx,(%esp) ;\
++ movzbl %al,%edx ;\
++ mov %eax,%ecx ;\
++ mov p2(%ebp),%eax ;\
++ mov %edi,4(%esp) ;\
++ mov p2+12(%ebp),%edi ;\
++ xor p1(,%edx,4),%eax ;\
++ movzbl %ch,%edx ;\
++ shr $16,%ecx ;\
++ mov p2+4(%ebp),%ebx ;\
++ xor p1+tlen(,%edx,4),%edi ;\
++ movzbl %cl,%edx ;\
++ movzbl %ch,%ecx ;\
++ xor p1+3*tlen(,%ecx,4),%ebx ;\
++ mov %esi,%ecx ;\
++ mov p1+2*tlen(,%edx,4),%esi ;\
++ movzbl %cl,%edx ;\
++ xor p1(,%edx,4),%esi ;\
++ movzbl %ch,%edx ;\
++ shr $16,%ecx ;\
++ xor p1+tlen(,%edx,4),%ebx ;\
++ movzbl %cl,%edx ;\
++ movzbl %ch,%ecx ;\
++ xor p1+2*tlen(,%edx,4),%eax ;\
++ mov (%esp),%edx ;\
++ xor p1+3*tlen(,%ecx,4),%edi ;\
++ movzbl %dl,%ecx ;\
++ xor p2+8(%ebp),%esi ;\
++ xor p1(,%ecx,4),%ebx ;\
++ movzbl %dh,%ecx ;\
++ shr $16,%edx ;\
++ xor p1+tlen(,%ecx,4),%eax ;\
++ movzbl %dl,%ecx ;\
++ movzbl %dh,%edx ;\
++ xor p1+2*tlen(,%ecx,4),%edi ;\
++ mov 4(%esp),%ecx ;\
++ xor p1+3*tlen(,%edx,4),%esi ;\
++ movzbl %cl,%edx ;\
++ xor p1(,%edx,4),%edi ;\
++ movzbl %ch,%edx ;\
++ shr $16,%ecx ;\
++ xor p1+tlen(,%edx,4),%esi ;\
++ movzbl %cl,%edx ;\
++ movzbl %ch,%ecx ;\
++ xor p1+2*tlen(,%edx,4),%ebx ;\
++ xor p1+3*tlen(,%ecx,4),%eax
++
++// This macro performs an inverse encryption cycle. It is entered with
++// the first previous round column values in %eax, %ebx, %esi and %edi and
++// exits with the final values in the same registers.
++
++#define inv_rnd(p1,p2) \
++ movzbl %al,%edx ;\
++ mov %ebx,(%esp) ;\
++ mov %eax,%ecx ;\
++ mov p2(%ebp),%eax ;\
++ mov %edi,4(%esp) ;\
++ mov p2+4(%ebp),%ebx ;\
++ xor p1(,%edx,4),%eax ;\
++ movzbl %ch,%edx ;\
++ shr $16,%ecx ;\
++ mov p2+12(%ebp),%edi ;\
++ xor p1+tlen(,%edx,4),%ebx ;\
++ movzbl %cl,%edx ;\
++ movzbl %ch,%ecx ;\
++ xor p1+3*tlen(,%ecx,4),%edi ;\
++ mov %esi,%ecx ;\
++ mov p1+2*tlen(,%edx,4),%esi ;\
++ movzbl %cl,%edx ;\
++ xor p1(,%edx,4),%esi ;\
++ movzbl %ch,%edx ;\
++ shr $16,%ecx ;\
++ xor p1+tlen(,%edx,4),%edi ;\
++ movzbl %cl,%edx ;\
++ movzbl %ch,%ecx ;\
++ xor p1+2*tlen(,%edx,4),%eax ;\
++ mov (%esp),%edx ;\
++ xor p1+3*tlen(,%ecx,4),%ebx ;\
++ movzbl %dl,%ecx ;\
++ xor p2+8(%ebp),%esi ;\
++ xor p1(,%ecx,4),%ebx ;\
++ movzbl %dh,%ecx ;\
++ shr $16,%edx ;\
++ xor p1+tlen(,%ecx,4),%esi ;\
++ movzbl %dl,%ecx ;\
++ movzbl %dh,%edx ;\
++ xor p1+2*tlen(,%ecx,4),%edi ;\
++ mov 4(%esp),%ecx ;\
++ xor p1+3*tlen(,%edx,4),%eax ;\
++ movzbl %cl,%edx ;\
++ xor p1(,%edx,4),%edi ;\
++ movzbl %ch,%edx ;\
++ shr $16,%ecx ;\
++ xor p1+tlen(,%edx,4),%eax ;\
++ movzbl %cl,%edx ;\
++ movzbl %ch,%ecx ;\
++ xor p1+2*tlen(,%edx,4),%ebx ;\
++ xor p1+3*tlen(,%ecx,4),%esi
++
++// AES (Rijndael) Encryption Subroutine
++
++ .text
++ .align ALIGN32BYTES
++aes_encrypt:
++ push %ebp
++ mov ctx(%esp),%ebp // pointer to context
++ mov in_blk(%esp),%ecx
++ push %ebx
++ push %esi
++ push %edi
++ mov nrnd(%ebp),%edx // number of rounds
++ lea ekey+16(%ebp),%ebp // key pointer
++
++// input four columns and xor in first round key
++
++ mov (%ecx),%eax
++ mov 4(%ecx),%ebx
++ mov 8(%ecx),%esi
++ mov 12(%ecx),%edi
++ xor -16(%ebp),%eax
++ xor -12(%ebp),%ebx
++ xor -8(%ebp),%esi
++ xor -4(%ebp),%edi
++
++ sub $8,%esp // space for register saves on stack
++
++ sub $10,%edx
++ je aes_15
++ add $32,%ebp
++ sub $2,%edx
++ je aes_13
++ add $32,%ebp
++
++ fwd_rnd(aes_ft_tab,-64) // 14 rounds for 256-bit key
++ fwd_rnd(aes_ft_tab,-48)
++aes_13: fwd_rnd(aes_ft_tab,-32) // 12 rounds for 192-bit key
++ fwd_rnd(aes_ft_tab,-16)
++aes_15: fwd_rnd(aes_ft_tab,0) // 10 rounds for 128-bit key
++ fwd_rnd(aes_ft_tab,16)
++ fwd_rnd(aes_ft_tab,32)
++ fwd_rnd(aes_ft_tab,48)
++ fwd_rnd(aes_ft_tab,64)
++ fwd_rnd(aes_ft_tab,80)
++ fwd_rnd(aes_ft_tab,96)
++ fwd_rnd(aes_ft_tab,112)
++ fwd_rnd(aes_ft_tab,128)
++ fwd_rnd(aes_fl_tab,144) // last round uses a different table
++
++// move final values to the output array.
++
++ mov out_blk+20(%esp),%ebp
++ add $8,%esp
++ mov %eax,(%ebp)
++ mov %ebx,4(%ebp)
++ mov %esi,8(%ebp)
++ mov %edi,12(%ebp)
++ pop %edi
++ pop %esi
++ pop %ebx
++ pop %ebp
++ ret
++
++
++// AES (Rijndael) Decryption Subroutine
++
++ .align ALIGN32BYTES
++aes_decrypt:
++ push %ebp
++ mov ctx(%esp),%ebp // pointer to context
++ mov in_blk(%esp),%ecx
++ push %ebx
++ push %esi
++ push %edi
++ mov nrnd(%ebp),%edx // number of rounds
++ lea dkey+16(%ebp),%ebp // key pointer
++
++// input four columns and xor in first round key
++
++ mov (%ecx),%eax
++ mov 4(%ecx),%ebx
++ mov 8(%ecx),%esi
++ mov 12(%ecx),%edi
++ xor -16(%ebp),%eax
++ xor -12(%ebp),%ebx
++ xor -8(%ebp),%esi
++ xor -4(%ebp),%edi
++
++ sub $8,%esp // space for register saves on stack
++
++ sub $10,%edx
++ je aes_25
++ add $32,%ebp
++ sub $2,%edx
++ je aes_23
++ add $32,%ebp
++
++ inv_rnd(aes_it_tab,-64) // 14 rounds for 256-bit key
++ inv_rnd(aes_it_tab,-48)
++aes_23: inv_rnd(aes_it_tab,-32) // 12 rounds for 192-bit key
++ inv_rnd(aes_it_tab,-16)
++aes_25: inv_rnd(aes_it_tab,0) // 10 rounds for 128-bit key
++ inv_rnd(aes_it_tab,16)
++ inv_rnd(aes_it_tab,32)
++ inv_rnd(aes_it_tab,48)
++ inv_rnd(aes_it_tab,64)
++ inv_rnd(aes_it_tab,80)
++ inv_rnd(aes_it_tab,96)
++ inv_rnd(aes_it_tab,112)
++ inv_rnd(aes_it_tab,128)
++ inv_rnd(aes_il_tab,144) // last round uses a different table
++
++// move final values to the output array.
++
++ mov out_blk+20(%esp),%ebp
++ add $8,%esp
++ mov %eax,(%ebp)
++ mov %ebx,4(%ebp)
++ mov %esi,8(%ebp)
++ mov %edi,12(%ebp)
++ pop %edi
++ pop %esi
++ pop %ebx
++ pop %ebp
++ ret
++
++// AES (Rijndael) Key Schedule Subroutine
++
++// input/output parameters
++
++#define aes_cx 12 // AES context
++#define in_key 16 // key input array address
++#define key_ln 20 // key length, bytes (16,24,32) or bits (128,192,256)
++#define ed_flg 24 // 0=create both encr/decr keys, 1=create encr key only
++
++// offsets for locals
++
++#define cnt -4
++#define slen 8
++
++// This macro performs a column mixing operation on an input 32-bit
++// word to give a 32-bit result. It uses each of the 4 bytes in the
++// the input column to index 4 different tables of 256 32-bit words
++// that are xored together to form the output value.
++
++#define mix_col(p1) \
++ movzbl %bl,%ecx ;\
++ mov p1(,%ecx,4),%eax ;\
++ movzbl %bh,%ecx ;\
++ ror $16,%ebx ;\
++ xor p1+tlen(,%ecx,4),%eax ;\
++ movzbl %bl,%ecx ;\
++ xor p1+2*tlen(,%ecx,4),%eax ;\
++ movzbl %bh,%ecx ;\
++ xor p1+3*tlen(,%ecx,4),%eax
++
++// Key Schedule Macros
++
++#define ksc4(p1) \
++ rol $24,%ebx ;\
++ mix_col(aes_fl_tab) ;\
++ ror $8,%ebx ;\
++ xor 4*p1+aes_rcon_tab,%eax ;\
++ xor %eax,%esi ;\
++ xor %esi,%ebp ;\
++ mov %esi,16*p1(%edi) ;\
++ mov %ebp,16*p1+4(%edi) ;\
++ xor %ebp,%edx ;\
++ xor %edx,%ebx ;\
++ mov %edx,16*p1+8(%edi) ;\
++ mov %ebx,16*p1+12(%edi)
++
++#define ksc6(p1) \
++ rol $24,%ebx ;\
++ mix_col(aes_fl_tab) ;\
++ ror $8,%ebx ;\
++ xor 4*p1+aes_rcon_tab,%eax ;\
++ xor 24*p1-24(%edi),%eax ;\
++ mov %eax,24*p1(%edi) ;\
++ xor 24*p1-20(%edi),%eax ;\
++ mov %eax,24*p1+4(%edi) ;\
++ xor %eax,%esi ;\
++ xor %esi,%ebp ;\
++ mov %esi,24*p1+8(%edi) ;\
++ mov %ebp,24*p1+12(%edi) ;\
++ xor %ebp,%edx ;\
++ xor %edx,%ebx ;\
++ mov %edx,24*p1+16(%edi) ;\
++ mov %ebx,24*p1+20(%edi)
++
++#define ksc8(p1) \
++ rol $24,%ebx ;\
++ mix_col(aes_fl_tab) ;\
++ ror $8,%ebx ;\
++ xor 4*p1+aes_rcon_tab,%eax ;\
++ xor 32*p1-32(%edi),%eax ;\
++ mov %eax,32*p1(%edi) ;\
++ xor 32*p1-28(%edi),%eax ;\
++ mov %eax,32*p1+4(%edi) ;\
++ xor 32*p1-24(%edi),%eax ;\
++ mov %eax,32*p1+8(%edi) ;\
++ xor 32*p1-20(%edi),%eax ;\
++ mov %eax,32*p1+12(%edi) ;\
++ push %ebx ;\
++ mov %eax,%ebx ;\
++ mix_col(aes_fl_tab) ;\
++ pop %ebx ;\
++ xor %eax,%esi ;\
++ xor %esi,%ebp ;\
++ mov %esi,32*p1+16(%edi) ;\
++ mov %ebp,32*p1+20(%edi) ;\
++ xor %ebp,%edx ;\
++ xor %edx,%ebx ;\
++ mov %edx,32*p1+24(%edi) ;\
++ mov %ebx,32*p1+28(%edi)
++
++ .align ALIGN32BYTES
++aes_set_key:
++ pushfl
++ push %ebp
++ mov %esp,%ebp
++ sub $slen,%esp
++ push %ebx
++ push %esi
++ push %edi
++
++ mov aes_cx(%ebp),%edx // edx -> AES context
++
++ mov key_ln(%ebp),%ecx // key length
++ cmpl $128,%ecx
++ jb aes_30
++ shr $3,%ecx
++aes_30: cmpl $32,%ecx
++ je aes_32
++ cmpl $24,%ecx
++ je aes_32
++ mov $16,%ecx
++aes_32: shr $2,%ecx
++ mov %ecx,nkey(%edx)
++
++ lea 6(%ecx),%eax // 10/12/14 for 4/6/8 32-bit key length
++ mov %eax,nrnd(%edx)
++
++ mov in_key(%ebp),%esi // key input array
++ lea ekey(%edx),%edi // key position in AES context
++ cld
++ push %ebp
++ mov %ecx,%eax // save key length in eax
++ rep ; movsl // words in the key schedule
++ mov -4(%esi),%ebx // put some values in registers
++ mov -8(%esi),%edx // to allow faster code
++ mov -12(%esi),%ebp
++ mov -16(%esi),%esi
++
++ cmpl $4,%eax // jump on key size
++ je aes_36
++ cmpl $6,%eax
++ je aes_35
++
++ ksc8(0)
++ ksc8(1)
++ ksc8(2)
++ ksc8(3)
++ ksc8(4)
++ ksc8(5)
++ ksc8(6)
++ jmp aes_37
++aes_35: ksc6(0)
++ ksc6(1)
++ ksc6(2)
++ ksc6(3)
++ ksc6(4)
++ ksc6(5)
++ ksc6(6)
++ ksc6(7)
++ jmp aes_37
++aes_36: ksc4(0)
++ ksc4(1)
++ ksc4(2)
++ ksc4(3)
++ ksc4(4)
++ ksc4(5)
++ ksc4(6)
++ ksc4(7)
++ ksc4(8)
++ ksc4(9)
++aes_37: pop %ebp
++ mov aes_cx(%ebp),%edx // edx -> AES context
++ cmpl $0,ed_flg(%ebp)
++ jne aes_39
++
++// compile decryption key schedule from encryption schedule - reverse
++// order and do mix_column operation on round keys except first and last
++
++ mov nrnd(%edx),%eax // kt = cx->d_key + nc * cx->Nrnd
++ shl $2,%eax
++ lea dkey(%edx,%eax,4),%edi
++ lea ekey(%edx),%esi // kf = cx->e_key
++
++ movsl // copy first round key (unmodified)
++ movsl
++ movsl
++ movsl
++ sub $32,%edi
++ movl $1,cnt(%ebp)
++aes_38: // do mix column on each column of
++ lodsl // each round key
++ mov %eax,%ebx
++ mix_col(aes_im_tab)
++ stosl
++ lodsl
++ mov %eax,%ebx
++ mix_col(aes_im_tab)
++ stosl
++ lodsl
++ mov %eax,%ebx
++ mix_col(aes_im_tab)
++ stosl
++ lodsl
++ mov %eax,%ebx
++ mix_col(aes_im_tab)
++ stosl
++ sub $32,%edi
++
++ incl cnt(%ebp)
++ mov cnt(%ebp),%eax
++ cmp nrnd(%edx),%eax
++ jb aes_38
++
++ movsl // copy last round key (unmodified)
++ movsl
++ movsl
++ movsl
++aes_39: pop %edi
++ pop %esi
++ pop %ebx
++ mov %ebp,%esp
++ pop %ebp
++ popfl
++ ret
++
++
++// finite field multiplies by {02}, {04} and {08}
++
++#define f2(x) ((x<<1)^(((x>>7)&1)*0x11b))
++#define f4(x) ((x<<2)^(((x>>6)&1)*0x11b)^(((x>>6)&2)*0x11b))
++#define f8(x) ((x<<3)^(((x>>5)&1)*0x11b)^(((x>>5)&2)*0x11b)^(((x>>5)&4)*0x11b))
++
++// finite field multiplies required in table generation
++
++#define f3(x) (f2(x) ^ x)
++#define f9(x) (f8(x) ^ x)
++#define fb(x) (f8(x) ^ f2(x) ^ x)
++#define fd(x) (f8(x) ^ f4(x) ^ x)
++#define fe(x) (f8(x) ^ f4(x) ^ f2(x))
++
++// These defines generate the forward table entries
++
++#define u0(x) ((f3(x) << 24) | (x << 16) | (x << 8) | f2(x))
++#define u1(x) ((x << 24) | (x << 16) | (f2(x) << 8) | f3(x))
++#define u2(x) ((x << 24) | (f2(x) << 16) | (f3(x) << 8) | x)
++#define u3(x) ((f2(x) << 24) | (f3(x) << 16) | (x << 8) | x)
++
++// These defines generate the inverse table entries
++
++#define v0(x) ((fb(x) << 24) | (fd(x) << 16) | (f9(x) << 8) | fe(x))
++#define v1(x) ((fd(x) << 24) | (f9(x) << 16) | (fe(x) << 8) | fb(x))
++#define v2(x) ((f9(x) << 24) | (fe(x) << 16) | (fb(x) << 8) | fd(x))
++#define v3(x) ((fe(x) << 24) | (fb(x) << 16) | (fd(x) << 8) | f9(x))
++
++// These defines generate entries for the last round tables
++
++#define w0(x) (x)
++#define w1(x) (x << 8)
++#define w2(x) (x << 16)
++#define w3(x) (x << 24)
++
++// macro to generate inverse mix column tables (needed for the key schedule)
++
++#define im_data0(p1) \
++ .long p1(0x00),p1(0x01),p1(0x02),p1(0x03),p1(0x04),p1(0x05),p1(0x06),p1(0x07) ;\
++ .long p1(0x08),p1(0x09),p1(0x0a),p1(0x0b),p1(0x0c),p1(0x0d),p1(0x0e),p1(0x0f) ;\
++ .long p1(0x10),p1(0x11),p1(0x12),p1(0x13),p1(0x14),p1(0x15),p1(0x16),p1(0x17) ;\
++ .long p1(0x18),p1(0x19),p1(0x1a),p1(0x1b),p1(0x1c),p1(0x1d),p1(0x1e),p1(0x1f)
++#define im_data1(p1) \
++ .long p1(0x20),p1(0x21),p1(0x22),p1(0x23),p1(0x24),p1(0x25),p1(0x26),p1(0x27) ;\
++ .long p1(0x28),p1(0x29),p1(0x2a),p1(0x2b),p1(0x2c),p1(0x2d),p1(0x2e),p1(0x2f) ;\
++ .long p1(0x30),p1(0x31),p1(0x32),p1(0x33),p1(0x34),p1(0x35),p1(0x36),p1(0x37) ;\
++ .long p1(0x38),p1(0x39),p1(0x3a),p1(0x3b),p1(0x3c),p1(0x3d),p1(0x3e),p1(0x3f)
++#define im_data2(p1) \
++ .long p1(0x40),p1(0x41),p1(0x42),p1(0x43),p1(0x44),p1(0x45),p1(0x46),p1(0x47) ;\
++ .long p1(0x48),p1(0x49),p1(0x4a),p1(0x4b),p1(0x4c),p1(0x4d),p1(0x4e),p1(0x4f) ;\
++ .long p1(0x50),p1(0x51),p1(0x52),p1(0x53),p1(0x54),p1(0x55),p1(0x56),p1(0x57) ;\
++ .long p1(0x58),p1(0x59),p1(0x5a),p1(0x5b),p1(0x5c),p1(0x5d),p1(0x5e),p1(0x5f)
++#define im_data3(p1) \
++ .long p1(0x60),p1(0x61),p1(0x62),p1(0x63),p1(0x64),p1(0x65),p1(0x66),p1(0x67) ;\
++ .long p1(0x68),p1(0x69),p1(0x6a),p1(0x6b),p1(0x6c),p1(0x6d),p1(0x6e),p1(0x6f) ;\
++ .long p1(0x70),p1(0x71),p1(0x72),p1(0x73),p1(0x74),p1(0x75),p1(0x76),p1(0x77) ;\
++ .long p1(0x78),p1(0x79),p1(0x7a),p1(0x7b),p1(0x7c),p1(0x7d),p1(0x7e),p1(0x7f)
++#define im_data4(p1) \
++ .long p1(0x80),p1(0x81),p1(0x82),p1(0x83),p1(0x84),p1(0x85),p1(0x86),p1(0x87) ;\
++ .long p1(0x88),p1(0x89),p1(0x8a),p1(0x8b),p1(0x8c),p1(0x8d),p1(0x8e),p1(0x8f) ;\
++ .long p1(0x90),p1(0x91),p1(0x92),p1(0x93),p1(0x94),p1(0x95),p1(0x96),p1(0x97) ;\
++ .long p1(0x98),p1(0x99),p1(0x9a),p1(0x9b),p1(0x9c),p1(0x9d),p1(0x9e),p1(0x9f)
++#define im_data5(p1) \
++ .long p1(0xa0),p1(0xa1),p1(0xa2),p1(0xa3),p1(0xa4),p1(0xa5),p1(0xa6),p1(0xa7) ;\
++ .long p1(0xa8),p1(0xa9),p1(0xaa),p1(0xab),p1(0xac),p1(0xad),p1(0xae),p1(0xaf) ;\
++ .long p1(0xb0),p1(0xb1),p1(0xb2),p1(0xb3),p1(0xb4),p1(0xb5),p1(0xb6),p1(0xb7) ;\
++ .long p1(0xb8),p1(0xb9),p1(0xba),p1(0xbb),p1(0xbc),p1(0xbd),p1(0xbe),p1(0xbf)
++#define im_data6(p1) \
++ .long p1(0xc0),p1(0xc1),p1(0xc2),p1(0xc3),p1(0xc4),p1(0xc5),p1(0xc6),p1(0xc7) ;\
++ .long p1(0xc8),p1(0xc9),p1(0xca),p1(0xcb),p1(0xcc),p1(0xcd),p1(0xce),p1(0xcf) ;\
++ .long p1(0xd0),p1(0xd1),p1(0xd2),p1(0xd3),p1(0xd4),p1(0xd5),p1(0xd6),p1(0xd7) ;\
++ .long p1(0xd8),p1(0xd9),p1(0xda),p1(0xdb),p1(0xdc),p1(0xdd),p1(0xde),p1(0xdf)
++#define im_data7(p1) \
++ .long p1(0xe0),p1(0xe1),p1(0xe2),p1(0xe3),p1(0xe4),p1(0xe5),p1(0xe6),p1(0xe7) ;\
++ .long p1(0xe8),p1(0xe9),p1(0xea),p1(0xeb),p1(0xec),p1(0xed),p1(0xee),p1(0xef) ;\
++ .long p1(0xf0),p1(0xf1),p1(0xf2),p1(0xf3),p1(0xf4),p1(0xf5),p1(0xf6),p1(0xf7) ;\
++ .long p1(0xf8),p1(0xf9),p1(0xfa),p1(0xfb),p1(0xfc),p1(0xfd),p1(0xfe),p1(0xff)
++
++// S-box data - 256 entries
++
++#define sb_data0(p1) \
++ .long p1(0x63),p1(0x7c),p1(0x77),p1(0x7b),p1(0xf2),p1(0x6b),p1(0x6f),p1(0xc5) ;\
++ .long p1(0x30),p1(0x01),p1(0x67),p1(0x2b),p1(0xfe),p1(0xd7),p1(0xab),p1(0x76) ;\
++ .long p1(0xca),p1(0x82),p1(0xc9),p1(0x7d),p1(0xfa),p1(0x59),p1(0x47),p1(0xf0) ;\
++ .long p1(0xad),p1(0xd4),p1(0xa2),p1(0xaf),p1(0x9c),p1(0xa4),p1(0x72),p1(0xc0)
++#define sb_data1(p1) \
++ .long p1(0xb7),p1(0xfd),p1(0x93),p1(0x26),p1(0x36),p1(0x3f),p1(0xf7),p1(0xcc) ;\
++ .long p1(0x34),p1(0xa5),p1(0xe5),p1(0xf1),p1(0x71),p1(0xd8),p1(0x31),p1(0x15) ;\
++ .long p1(0x04),p1(0xc7),p1(0x23),p1(0xc3),p1(0x18),p1(0x96),p1(0x05),p1(0x9a) ;\
++ .long p1(0x07),p1(0x12),p1(0x80),p1(0xe2),p1(0xeb),p1(0x27),p1(0xb2),p1(0x75)
++#define sb_data2(p1) \
++ .long p1(0x09),p1(0x83),p1(0x2c),p1(0x1a),p1(0x1b),p1(0x6e),p1(0x5a),p1(0xa0) ;\
++ .long p1(0x52),p1(0x3b),p1(0xd6),p1(0xb3),p1(0x29),p1(0xe3),p1(0x2f),p1(0x84) ;\
++ .long p1(0x53),p1(0xd1),p1(0x00),p1(0xed),p1(0x20),p1(0xfc),p1(0xb1),p1(0x5b) ;\
++ .long p1(0x6a),p1(0xcb),p1(0xbe),p1(0x39),p1(0x4a),p1(0x4c),p1(0x58),p1(0xcf)
++#define sb_data3(p1) \
++ .long p1(0xd0),p1(0xef),p1(0xaa),p1(0xfb),p1(0x43),p1(0x4d),p1(0x33),p1(0x85) ;\
++ .long p1(0x45),p1(0xf9),p1(0x02),p1(0x7f),p1(0x50),p1(0x3c),p1(0x9f),p1(0xa8) ;\
++ .long p1(0x51),p1(0xa3),p1(0x40),p1(0x8f),p1(0x92),p1(0x9d),p1(0x38),p1(0xf5) ;\
++ .long p1(0xbc),p1(0xb6),p1(0xda),p1(0x21),p1(0x10),p1(0xff),p1(0xf3),p1(0xd2)
++#define sb_data4(p1) \
++ .long p1(0xcd),p1(0x0c),p1(0x13),p1(0xec),p1(0x5f),p1(0x97),p1(0x44),p1(0x17) ;\
++ .long p1(0xc4),p1(0xa7),p1(0x7e),p1(0x3d),p1(0x64),p1(0x5d),p1(0x19),p1(0x73) ;\
++ .long p1(0x60),p1(0x81),p1(0x4f),p1(0xdc),p1(0x22),p1(0x2a),p1(0x90),p1(0x88) ;\
++ .long p1(0x46),p1(0xee),p1(0xb8),p1(0x14),p1(0xde),p1(0x5e),p1(0x0b),p1(0xdb)
++#define sb_data5(p1) \
++ .long p1(0xe0),p1(0x32),p1(0x3a),p1(0x0a),p1(0x49),p1(0x06),p1(0x24),p1(0x5c) ;\
++ .long p1(0xc2),p1(0xd3),p1(0xac),p1(0x62),p1(0x91),p1(0x95),p1(0xe4),p1(0x79) ;\
++ .long p1(0xe7),p1(0xc8),p1(0x37),p1(0x6d),p1(0x8d),p1(0xd5),p1(0x4e),p1(0xa9) ;\
++ .long p1(0x6c),p1(0x56),p1(0xf4),p1(0xea),p1(0x65),p1(0x7a),p1(0xae),p1(0x08)
++#define sb_data6(p1) \
++ .long p1(0xba),p1(0x78),p1(0x25),p1(0x2e),p1(0x1c),p1(0xa6),p1(0xb4),p1(0xc6) ;\
++ .long p1(0xe8),p1(0xdd),p1(0x74),p1(0x1f),p1(0x4b),p1(0xbd),p1(0x8b),p1(0x8a) ;\
++ .long p1(0x70),p1(0x3e),p1(0xb5),p1(0x66),p1(0x48),p1(0x03),p1(0xf6),p1(0x0e) ;\
++ .long p1(0x61),p1(0x35),p1(0x57),p1(0xb9),p1(0x86),p1(0xc1),p1(0x1d),p1(0x9e)
++#define sb_data7(p1) \
++ .long p1(0xe1),p1(0xf8),p1(0x98),p1(0x11),p1(0x69),p1(0xd9),p1(0x8e),p1(0x94) ;\
++ .long p1(0x9b),p1(0x1e),p1(0x87),p1(0xe9),p1(0xce),p1(0x55),p1(0x28),p1(0xdf) ;\
++ .long p1(0x8c),p1(0xa1),p1(0x89),p1(0x0d),p1(0xbf),p1(0xe6),p1(0x42),p1(0x68) ;\
++ .long p1(0x41),p1(0x99),p1(0x2d),p1(0x0f),p1(0xb0),p1(0x54),p1(0xbb),p1(0x16)
++
++// Inverse S-box data - 256 entries
++
++#define ib_data0(p1) \
++ .long p1(0x52),p1(0x09),p1(0x6a),p1(0xd5),p1(0x30),p1(0x36),p1(0xa5),p1(0x38) ;\
++ .long p1(0xbf),p1(0x40),p1(0xa3),p1(0x9e),p1(0x81),p1(0xf3),p1(0xd7),p1(0xfb) ;\
++ .long p1(0x7c),p1(0xe3),p1(0x39),p1(0x82),p1(0x9b),p1(0x2f),p1(0xff),p1(0x87) ;\
++ .long p1(0x34),p1(0x8e),p1(0x43),p1(0x44),p1(0xc4),p1(0xde),p1(0xe9),p1(0xcb)
++#define ib_data1(p1) \
++ .long p1(0x54),p1(0x7b),p1(0x94),p1(0x32),p1(0xa6),p1(0xc2),p1(0x23),p1(0x3d) ;\
++ .long p1(0xee),p1(0x4c),p1(0x95),p1(0x0b),p1(0x42),p1(0xfa),p1(0xc3),p1(0x4e) ;\
++ .long p1(0x08),p1(0x2e),p1(0xa1),p1(0x66),p1(0x28),p1(0xd9),p1(0x24),p1(0xb2) ;\
++ .long p1(0x76),p1(0x5b),p1(0xa2),p1(0x49),p1(0x6d),p1(0x8b),p1(0xd1),p1(0x25)
++#define ib_data2(p1) \
++ .long p1(0x72),p1(0xf8),p1(0xf6),p1(0x64),p1(0x86),p1(0x68),p1(0x98),p1(0x16) ;\
++ .long p1(0xd4),p1(0xa4),p1(0x5c),p1(0xcc),p1(0x5d),p1(0x65),p1(0xb6),p1(0x92) ;\
++ .long p1(0x6c),p1(0x70),p1(0x48),p1(0x50),p1(0xfd),p1(0xed),p1(0xb9),p1(0xda) ;\
++ .long p1(0x5e),p1(0x15),p1(0x46),p1(0x57),p1(0xa7),p1(0x8d),p1(0x9d),p1(0x84)
++#define ib_data3(p1) \
++ .long p1(0x90),p1(0xd8),p1(0xab),p1(0x00),p1(0x8c),p1(0xbc),p1(0xd3),p1(0x0a) ;\
++ .long p1(0xf7),p1(0xe4),p1(0x58),p1(0x05),p1(0xb8),p1(0xb3),p1(0x45),p1(0x06) ;\
++ .long p1(0xd0),p1(0x2c),p1(0x1e),p1(0x8f),p1(0xca),p1(0x3f),p1(0x0f),p1(0x02) ;\
++ .long p1(0xc1),p1(0xaf),p1(0xbd),p1(0x03),p1(0x01),p1(0x13),p1(0x8a),p1(0x6b)
++#define ib_data4(p1) \
++ .long p1(0x3a),p1(0x91),p1(0x11),p1(0x41),p1(0x4f),p1(0x67),p1(0xdc),p1(0xea) ;\
++ .long p1(0x97),p1(0xf2),p1(0xcf),p1(0xce),p1(0xf0),p1(0xb4),p1(0xe6),p1(0x73) ;\
++ .long p1(0x96),p1(0xac),p1(0x74),p1(0x22),p1(0xe7),p1(0xad),p1(0x35),p1(0x85) ;\
++ .long p1(0xe2),p1(0xf9),p1(0x37),p1(0xe8),p1(0x1c),p1(0x75),p1(0xdf),p1(0x6e)
++#define ib_data5(p1) \
++ .long p1(0x47),p1(0xf1),p1(0x1a),p1(0x71),p1(0x1d),p1(0x29),p1(0xc5),p1(0x89) ;\
++ .long p1(0x6f),p1(0xb7),p1(0x62),p1(0x0e),p1(0xaa),p1(0x18),p1(0xbe),p1(0x1b) ;\
++ .long p1(0xfc),p1(0x56),p1(0x3e),p1(0x4b),p1(0xc6),p1(0xd2),p1(0x79),p1(0x20) ;\
++ .long p1(0x9a),p1(0xdb),p1(0xc0),p1(0xfe),p1(0x78),p1(0xcd),p1(0x5a),p1(0xf4)
++#define ib_data6(p1) \
++ .long p1(0x1f),p1(0xdd),p1(0xa8),p1(0x33),p1(0x88),p1(0x07),p1(0xc7),p1(0x31) ;\
++ .long p1(0xb1),p1(0x12),p1(0x10),p1(0x59),p1(0x27),p1(0x80),p1(0xec),p1(0x5f) ;\
++ .long p1(0x60),p1(0x51),p1(0x7f),p1(0xa9),p1(0x19),p1(0xb5),p1(0x4a),p1(0x0d) ;\
++ .long p1(0x2d),p1(0xe5),p1(0x7a),p1(0x9f),p1(0x93),p1(0xc9),p1(0x9c),p1(0xef)
++#define ib_data7(p1) \
++ .long p1(0xa0),p1(0xe0),p1(0x3b),p1(0x4d),p1(0xae),p1(0x2a),p1(0xf5),p1(0xb0) ;\
++ .long p1(0xc8),p1(0xeb),p1(0xbb),p1(0x3c),p1(0x83),p1(0x53),p1(0x99),p1(0x61) ;\
++ .long p1(0x17),p1(0x2b),p1(0x04),p1(0x7e),p1(0xba),p1(0x77),p1(0xd6),p1(0x26) ;\
++ .long p1(0xe1),p1(0x69),p1(0x14),p1(0x63),p1(0x55),p1(0x21),p1(0x0c),p1(0x7d)
++
++// The rcon_table (needed for the key schedule)
++//
++// Here is original Dr Brian Gladman's source code:
++// _rcon_tab:
++// %assign x 1
++// %rep 29
++// dd x
++// %assign x f2(x)
++// %endrep
++//
++// Here is precomputed output (it's more portable this way):
++
++ .section .rodata
++ .align ALIGN32BYTES
++aes_rcon_tab:
++ .long 0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80
++ .long 0x1b,0x36,0x6c,0xd8,0xab,0x4d,0x9a,0x2f
++ .long 0x5e,0xbc,0x63,0xc6,0x97,0x35,0x6a,0xd4
++ .long 0xb3,0x7d,0xfa,0xef,0xc5
++
++// The forward xor tables
++
++ .align ALIGN32BYTES
++aes_ft_tab:
++ sb_data0(u0)
++ sb_data1(u0)
++ sb_data2(u0)
++ sb_data3(u0)
++ sb_data4(u0)
++ sb_data5(u0)
++ sb_data6(u0)
++ sb_data7(u0)
++
++ sb_data0(u1)
++ sb_data1(u1)
++ sb_data2(u1)
++ sb_data3(u1)
++ sb_data4(u1)
++ sb_data5(u1)
++ sb_data6(u1)
++ sb_data7(u1)
++
++ sb_data0(u2)
++ sb_data1(u2)
++ sb_data2(u2)
++ sb_data3(u2)
++ sb_data4(u2)
++ sb_data5(u2)
++ sb_data6(u2)
++ sb_data7(u2)
++
++ sb_data0(u3)
++ sb_data1(u3)
++ sb_data2(u3)
++ sb_data3(u3)
++ sb_data4(u3)
++ sb_data5(u3)
++ sb_data6(u3)
++ sb_data7(u3)
++
++ .align ALIGN32BYTES
++aes_fl_tab:
++ sb_data0(w0)
++ sb_data1(w0)
++ sb_data2(w0)
++ sb_data3(w0)
++ sb_data4(w0)
++ sb_data5(w0)
++ sb_data6(w0)
++ sb_data7(w0)
++
++ sb_data0(w1)
++ sb_data1(w1)
++ sb_data2(w1)
++ sb_data3(w1)
++ sb_data4(w1)
++ sb_data5(w1)
++ sb_data6(w1)
++ sb_data7(w1)
++
++ sb_data0(w2)
++ sb_data1(w2)
++ sb_data2(w2)
++ sb_data3(w2)
++ sb_data4(w2)
++ sb_data5(w2)
++ sb_data6(w2)
++ sb_data7(w2)
++
++ sb_data0(w3)
++ sb_data1(w3)
++ sb_data2(w3)
++ sb_data3(w3)
++ sb_data4(w3)
++ sb_data5(w3)
++ sb_data6(w3)
++ sb_data7(w3)
++
++// The inverse xor tables
++
++ .align ALIGN32BYTES
++aes_it_tab:
++ ib_data0(v0)
++ ib_data1(v0)
++ ib_data2(v0)
++ ib_data3(v0)
++ ib_data4(v0)
++ ib_data5(v0)
++ ib_data6(v0)
++ ib_data7(v0)
++
++ ib_data0(v1)
++ ib_data1(v1)
++ ib_data2(v1)
++ ib_data3(v1)
++ ib_data4(v1)
++ ib_data5(v1)
++ ib_data6(v1)
++ ib_data7(v1)
++
++ ib_data0(v2)
++ ib_data1(v2)
++ ib_data2(v2)
++ ib_data3(v2)
++ ib_data4(v2)
++ ib_data5(v2)
++ ib_data6(v2)
++ ib_data7(v2)
++
++ ib_data0(v3)
++ ib_data1(v3)
++ ib_data2(v3)
++ ib_data3(v3)
++ ib_data4(v3)
++ ib_data5(v3)
++ ib_data6(v3)
++ ib_data7(v3)
++
++ .align ALIGN32BYTES
++aes_il_tab:
++ ib_data0(w0)
++ ib_data1(w0)
++ ib_data2(w0)
++ ib_data3(w0)
++ ib_data4(w0)
++ ib_data5(w0)
++ ib_data6(w0)
++ ib_data7(w0)
++
++ ib_data0(w1)
++ ib_data1(w1)
++ ib_data2(w1)
++ ib_data3(w1)
++ ib_data4(w1)
++ ib_data5(w1)
++ ib_data6(w1)
++ ib_data7(w1)
++
++ ib_data0(w2)
++ ib_data1(w2)
++ ib_data2(w2)
++ ib_data3(w2)
++ ib_data4(w2)
++ ib_data5(w2)
++ ib_data6(w2)
++ ib_data7(w2)
++
++ ib_data0(w3)
++ ib_data1(w3)
++ ib_data2(w3)
++ ib_data3(w3)
++ ib_data4(w3)
++ ib_data5(w3)
++ ib_data6(w3)
++ ib_data7(w3)
++
++// The inverse mix column tables
++
++ .align ALIGN32BYTES
++aes_im_tab:
++ im_data0(v0)
++ im_data1(v0)
++ im_data2(v0)
++ im_data3(v0)
++ im_data4(v0)
++ im_data5(v0)
++ im_data6(v0)
++ im_data7(v0)
++
++ im_data0(v1)
++ im_data1(v1)
++ im_data2(v1)
++ im_data3(v1)
++ im_data4(v1)
++ im_data5(v1)
++ im_data6(v1)
++ im_data7(v1)
++
++ im_data0(v2)
++ im_data1(v2)
++ im_data2(v2)
++ im_data3(v2)
++ im_data4(v2)
++ im_data5(v2)
++ im_data6(v2)
++ im_data7(v2)
++
++ im_data0(v3)
++ im_data1(v3)
++ im_data2(v3)
++ im_data3(v3)
++ im_data4(v3)
++ im_data5(v3)
++ im_data6(v3)
++ im_data7(v3)
++
++#if defined(__ELF__) && defined(SECTION_NOTE_GNU_STACK)
++ .section .note.GNU-stack,"",@progbits
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/aes.c linux-3.14-AES/drivers/misc/aes.c
+--- linux-3.14-noloop/drivers/misc/aes.c 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/aes.c 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,1479 @@
++// I retain copyright in this code but I encourage its free use provided
++// that I don't carry any responsibility for the results. I am especially
++// happy to see it used in free and open source software. If you do use
++// it I would appreciate an acknowledgement of its origin in the code or
++// the product that results and I would also appreciate knowing a little
++// about the use to which it is being put. I am grateful to Frank Yellin
++// for some ideas that are used in this implementation.
++//
++// Dr B. R. Gladman <brg@gladman.uk.net> 6th April 2001.
++//
++// This is an implementation of the AES encryption algorithm (Rijndael)
++// designed by Joan Daemen and Vincent Rijmen. This version is designed
++// to provide both fixed and dynamic block and key lengths and can also
++// run with either big or little endian internal byte order (see aes.h).
++// It inputs block and key lengths in bytes with the legal values being
++// 16, 24 and 32.
++
++/*
++ * Modified by Jari Ruusu, May 1 2001
++ * - Fixed some compile warnings, code was ok but gcc warned anyway.
++ * - Changed basic types: byte -> unsigned char, word -> u_int32_t
++ * - Major name space cleanup: Names visible to outside now begin
++ * with "aes_" or "AES_". A lot of stuff moved from aes.h to aes.c
++ * - Removed C++ and DLL support as part of name space cleanup.
++ * - Eliminated unnecessary recomputation of tables. (actual bug fix)
++ * - Merged precomputed constant tables to aes.c file.
++ * - Removed data alignment restrictions for portability reasons.
++ * - Made block and key lengths accept bit count (128/192/256)
++ * as well byte count (16/24/32).
++ * - Removed all error checks. This change also eliminated the need
++ * to preinitialize the context struct to zero.
++ * - Removed some totally unused constants.
++ */
++/*
++ * Modified by Jari Ruusu, April 21 2004
++ * - Added back code that avoids byte swaps on big endian boxes.
++ */
++
++#include "aes.h"
++
++// CONFIGURATION OPTIONS (see also aes.h)
++//
++// 1. Define UNROLL for full loop unrolling in encryption and decryption.
++// 2. Define PARTIAL_UNROLL to unroll two loops in encryption and decryption.
++// 3. Define FIXED_TABLES for compiled rather than dynamic tables.
++// 4. Define FF_TABLES to use tables for field multiplies and inverses.
++// Do not enable this without understanding stack space requirements.
++// 5. Define ARRAYS to use arrays to hold the local state block. If this
++// is not defined, individually declared 32-bit words are used.
++// 6. Define FAST_VARIABLE if a high speed variable block implementation
++// is needed (essentially three separate fixed block size code sequences)
++// 7. Define either ONE_TABLE or FOUR_TABLES for a fast table driven
++// version using 1 table (2 kbytes of table space) or 4 tables (8
++// kbytes of table space) for higher speed.
++// 8. Define either ONE_LR_TABLE or FOUR_LR_TABLES for a further speed
++// increase by using tables for the last rounds but with more table
++// space (2 or 8 kbytes extra).
++// 9. If neither ONE_TABLE nor FOUR_TABLES is defined, a compact but
++// slower version is provided.
++// 10. If fast decryption key scheduling is needed define ONE_IM_TABLE
++// or FOUR_IM_TABLES for higher speed (2 or 8 kbytes extra).
++
++#define UNROLL
++//#define PARTIAL_UNROLL
++
++#define FIXED_TABLES
++//#define FF_TABLES
++//#define ARRAYS
++#define FAST_VARIABLE
++
++//#define ONE_TABLE
++#define FOUR_TABLES
++
++//#define ONE_LR_TABLE
++#define FOUR_LR_TABLES
++
++//#define ONE_IM_TABLE
++#define FOUR_IM_TABLES
++
++#if defined(UNROLL) && defined (PARTIAL_UNROLL)
++#error both UNROLL and PARTIAL_UNROLL are defined
++#endif
++
++#if defined(ONE_TABLE) && defined (FOUR_TABLES)
++#error both ONE_TABLE and FOUR_TABLES are defined
++#endif
++
++#if defined(ONE_LR_TABLE) && defined (FOUR_LR_TABLES)
++#error both ONE_LR_TABLE and FOUR_LR_TABLES are defined
++#endif
++
++#if defined(ONE_IM_TABLE) && defined (FOUR_IM_TABLES)
++#error both ONE_IM_TABLE and FOUR_IM_TABLES are defined
++#endif
++
++#if defined(AES_BLOCK_SIZE) && AES_BLOCK_SIZE != 16 && AES_BLOCK_SIZE != 24 && AES_BLOCK_SIZE != 32
++#error an illegal block size has been specified
++#endif
++
++/* INTERNAL_BYTE_ORDER: 0=unknown, 1=little endian, 2=big endian */
++#if defined(INTERNAL_BYTE_ORDER)
++#elif defined(__i386__)||defined(__i386)||defined(__x86_64__)||defined(__x86_64)||defined(__amd64__)||defined(__amd64)||defined(__AMD64__)||defined(__AMD64)
++# define INTERNAL_BYTE_ORDER 1
++# undef DATA_ALWAYS_ALIGNED
++# define DATA_ALWAYS_ALIGNED 1 /* unaligned access is always ok */
++#elif defined(__ppc__)||defined(__ppc)||defined(__PPC__)||defined(__PPC)||defined(__powerpc__)||defined(__powerpc)||defined(__POWERPC__)||defined(__POWERPC)||defined(__PowerPC__)||defined(__PowerPC)||defined(__ppc64__)||defined(__ppc64)||defined(__PPC64__)||defined(__PPC64)||defined(__powerpc64__)||defined(__powerpc64)||defined(__s390__)||defined(__s390)
++# define INTERNAL_BYTE_ORDER 2
++# undef DATA_ALWAYS_ALIGNED
++# define DATA_ALWAYS_ALIGNED 1 /* unaligned access is always ok */
++#elif defined(__alpha__)||defined(__alpha)||defined(__ia64__)||defined(__ia64)
++# define INTERNAL_BYTE_ORDER 1
++#elif defined(__hppa__)||defined(__hppa)||defined(__HPPA__)||defined(__HPPA)||defined(__parisc__)||defined(__parisc)||defined(__sparc__)||defined(__sparc)||defined(__sparc_v9__)||defined(__sparc_v9)||defined(__sparc64__)||defined(__sparc64)||defined(__mc68000__)||defined(__mc68000)
++# define INTERNAL_BYTE_ORDER 2
++#elif defined(CONFIGURE_DETECTS_BYTE_ORDER)
++# if WORDS_BIGENDIAN
++# define INTERNAL_BYTE_ORDER 2
++# else
++# define INTERNAL_BYTE_ORDER 1
++# endif
++#elif defined(__linux__) && defined(__KERNEL__)
++# include <asm/byteorder.h>
++# if defined(__BIG_ENDIAN)
++# define INTERNAL_BYTE_ORDER 2
++# else
++# define INTERNAL_BYTE_ORDER 1
++# endif
++#else
++# include <sys/param.h>
++# if (defined(BYTE_ORDER) && defined(LITTLE_ENDIAN) && (BYTE_ORDER == LITTLE_ENDIAN)) || (defined(__BYTE_ORDER) && defined(__LITTLE_ENDIAN) && (__BYTE_ORDER == __LITTLE_ENDIAN))
++# define INTERNAL_BYTE_ORDER 1
++# elif WORDS_BIGENDIAN || defined(__BIG_ENDIAN__) || (defined(BYTE_ORDER) && defined(BIG_ENDIAN) && (BYTE_ORDER == BIG_ENDIAN)) || (defined(__BYTE_ORDER) && defined(__BIG_ENDIAN) && (__BYTE_ORDER == __BIG_ENDIAN))
++# define INTERNAL_BYTE_ORDER 2
++# else
++# define INTERNAL_BYTE_ORDER 0
++# endif
++#endif
++
++#if defined(DATA_ALWAYS_ALIGNED) && (INTERNAL_BYTE_ORDER > 0)
++# define word_in(x) *(u_int32_t*)(x)
++# define word_out(x,v) *(u_int32_t*)(x) = (v)
++#elif defined(__linux__) && defined(__KERNEL__)
++# include <asm/unaligned.h>
++# define word_in(x) get_unaligned((u_int32_t*)(x))
++# define word_out(x,v) put_unaligned((v),(u_int32_t*)(x))
++#else
++/* unknown endianness and/or unable to handle unaligned data */
++# undef INTERNAL_BYTE_ORDER
++# define INTERNAL_BYTE_ORDER 1
++# define word_in(x) ((u_int32_t)(((unsigned char *)(x))[0])|((u_int32_t)(((unsigned char *)(x))[1])<<8)|((u_int32_t)(((unsigned char *)(x))[2])<<16)|((u_int32_t)(((unsigned char *)(x))[3])<<24))
++# define word_out(x,v) ((unsigned char *)(x))[0]=(v),((unsigned char *)(x))[1]=((v)>>8),((unsigned char *)(x))[2]=((v)>>16),((unsigned char *)(x))[3]=((v)>>24)
++#endif
++
++// upr(x,n): rotates bytes within words by n positions, moving bytes
++// to higher index positions with wrap around into low positions
++// ups(x,n): moves bytes by n positions to higher index positions in
++// words but without wrap around
++// bval(x,n): extracts a byte from a word
++
++#if (INTERNAL_BYTE_ORDER < 2)
++/* little endian */
++#define upr(x,n) (((x) << 8 * (n)) | ((x) >> (32 - 8 * (n))))
++#define ups(x,n) ((x) << 8 * (n))
++#define bval(x,n) ((unsigned char)((x) >> 8 * (n)))
++#define bytes2word(b0, b1, b2, b3) \
++ ((u_int32_t)(b3) << 24 | (u_int32_t)(b2) << 16 | (u_int32_t)(b1) << 8 | (b0))
++#else
++/* big endian */
++#define upr(x,n) (((x) >> 8 * (n)) | ((x) << (32 - 8 * (n))))
++#define ups(x,n) ((x) >> 8 * (n)))
++#define bval(x,n) ((unsigned char)((x) >> (24 - 8 * (n))))
++#define bytes2word(b0, b1, b2, b3) \
++ ((u_int32_t)(b0) << 24 | (u_int32_t)(b1) << 16 | (u_int32_t)(b2) << 8 | (b3))
++#endif
++
++// Disable at least some poor combinations of options
++
++#if !defined(ONE_TABLE) && !defined(FOUR_TABLES)
++#define FIXED_TABLES
++#undef UNROLL
++#undef ONE_LR_TABLE
++#undef FOUR_LR_TABLES
++#undef ONE_IM_TABLE
++#undef FOUR_IM_TABLES
++#elif !defined(FOUR_TABLES)
++#ifdef FOUR_LR_TABLES
++#undef FOUR_LR_TABLES
++#define ONE_LR_TABLE
++#endif
++#ifdef FOUR_IM_TABLES
++#undef FOUR_IM_TABLES
++#define ONE_IM_TABLE
++#endif
++#elif !defined(AES_BLOCK_SIZE)
++#if defined(UNROLL)
++#define PARTIAL_UNROLL
++#undef UNROLL
++#endif
++#endif
++
++// the finite field modular polynomial and elements
++
++#define ff_poly 0x011b
++#define ff_hi 0x80
++
++// multiply four bytes in GF(2^8) by 'x' {02} in parallel
++
++#define m1 0x80808080
++#define m2 0x7f7f7f7f
++#define m3 0x0000001b
++#define FFmulX(x) ((((x) & m2) << 1) ^ ((((x) & m1) >> 7) * m3))
++
++// The following defines provide alternative definitions of FFmulX that might
++// give improved performance if a fast 32-bit multiply is not available. Note
++// that a temporary variable u needs to be defined where FFmulX is used.
++
++// #define FFmulX(x) (u = (x) & m1, u |= (u >> 1), ((x) & m2) << 1) ^ ((u >> 3) | (u >> 6))
++// #define m4 0x1b1b1b1b
++// #define FFmulX(x) (u = (x) & m1, ((x) & m2) << 1) ^ ((u - (u >> 7)) & m4)
++
++// perform column mix operation on four bytes in parallel
++
++#define fwd_mcol(x) (f2 = FFmulX(x), f2 ^ upr(x ^ f2,3) ^ upr(x,2) ^ upr(x,1))
++
++#if defined(FIXED_TABLES)
++
++// the S-Box table
++
++static const unsigned char s_box[256] =
++{
++ 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5,
++ 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
++ 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,
++ 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
++ 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc,
++ 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
++ 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a,
++ 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
++ 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,
++ 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
++ 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b,
++ 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
++ 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85,
++ 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
++ 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,
++ 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
++ 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17,
++ 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
++ 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88,
++ 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
++ 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,
++ 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
++ 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9,
++ 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
++ 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6,
++ 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
++ 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,
++ 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
++ 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94,
++ 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
++ 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68,
++ 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
++};
++
++// the inverse S-Box table
++
++static const unsigned char inv_s_box[256] =
++{
++ 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38,
++ 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
++ 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87,
++ 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
++ 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d,
++ 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
++ 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2,
++ 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
++ 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16,
++ 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
++ 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda,
++ 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
++ 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a,
++ 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
++ 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02,
++ 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
++ 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea,
++ 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
++ 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85,
++ 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
++ 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89,
++ 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
++ 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20,
++ 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
++ 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31,
++ 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
++ 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d,
++ 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
++ 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0,
++ 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
++ 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26,
++ 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
++};
++
++// used to ensure table is generated in the right format
++// depending on the internal byte order required
++
++#if (INTERNAL_BYTE_ORDER < 2)
++/* little endian */
++#define w0(p) 0x000000##p
++#else
++/* big endian */
++#define w0(p) 0x##p##000000
++#endif
++
++// Number of elements required in this table for different
++// block and key lengths is:
++//
++// Nk = 4 6 8
++// ----------
++// Nb = 4 | 10 8 7
++// 6 | 19 12 11
++// 8 | 29 19 14
++//
++// this table can be a table of bytes if the key schedule
++// code is adjusted accordingly
++
++static const u_int32_t rcon_tab[29] =
++{
++ w0(01), w0(02), w0(04), w0(08),
++ w0(10), w0(20), w0(40), w0(80),
++ w0(1b), w0(36), w0(6c), w0(d8),
++ w0(ab), w0(4d), w0(9a), w0(2f),
++ w0(5e), w0(bc), w0(63), w0(c6),
++ w0(97), w0(35), w0(6a), w0(d4),
++ w0(b3), w0(7d), w0(fa), w0(ef),
++ w0(c5)
++};
++
++#undef w0
++
++// used to ensure table is generated in the right format
++// depending on the internal byte order required
++
++#if (INTERNAL_BYTE_ORDER < 2)
++/* little endian */
++#define r0(p,q,r,s) 0x##p##q##r##s
++#define r1(p,q,r,s) 0x##q##r##s##p
++#define r2(p,q,r,s) 0x##r##s##p##q
++#define r3(p,q,r,s) 0x##s##p##q##r
++#define w0(p) 0x000000##p
++#define w1(p) 0x0000##p##00
++#define w2(p) 0x00##p##0000
++#define w3(p) 0x##p##000000
++#else
++/* big endian */
++#define r0(p,q,r,s) 0x##s##r##q##p
++#define r1(p,q,r,s) 0x##p##s##r##q
++#define r2(p,q,r,s) 0x##q##p##s##r
++#define r3(p,q,r,s) 0x##r##q##p##s
++#define w0(p) 0x##p##000000
++#define w1(p) 0x00##p##0000
++#define w2(p) 0x0000##p##00
++#define w3(p) 0x000000##p
++#endif
++
++#if defined(FIXED_TABLES) && (defined(ONE_TABLE) || defined(FOUR_TABLES))
++
++// data for forward tables (other than last round)
++
++#define f_table \
++ r(a5,63,63,c6), r(84,7c,7c,f8), r(99,77,77,ee), r(8d,7b,7b,f6),\
++ r(0d,f2,f2,ff), r(bd,6b,6b,d6), r(b1,6f,6f,de), r(54,c5,c5,91),\
++ r(50,30,30,60), r(03,01,01,02), r(a9,67,67,ce), r(7d,2b,2b,56),\
++ r(19,fe,fe,e7), r(62,d7,d7,b5), r(e6,ab,ab,4d), r(9a,76,76,ec),\
++ r(45,ca,ca,8f), r(9d,82,82,1f), r(40,c9,c9,89), r(87,7d,7d,fa),\
++ r(15,fa,fa,ef), r(eb,59,59,b2), r(c9,47,47,8e), r(0b,f0,f0,fb),\
++ r(ec,ad,ad,41), r(67,d4,d4,b3), r(fd,a2,a2,5f), r(ea,af,af,45),\
++ r(bf,9c,9c,23), r(f7,a4,a4,53), r(96,72,72,e4), r(5b,c0,c0,9b),\
++ r(c2,b7,b7,75), r(1c,fd,fd,e1), r(ae,93,93,3d), r(6a,26,26,4c),\
++ r(5a,36,36,6c), r(41,3f,3f,7e), r(02,f7,f7,f5), r(4f,cc,cc,83),\
++ r(5c,34,34,68), r(f4,a5,a5,51), r(34,e5,e5,d1), r(08,f1,f1,f9),\
++ r(93,71,71,e2), r(73,d8,d8,ab), r(53,31,31,62), r(3f,15,15,2a),\
++ r(0c,04,04,08), r(52,c7,c7,95), r(65,23,23,46), r(5e,c3,c3,9d),\
++ r(28,18,18,30), r(a1,96,96,37), r(0f,05,05,0a), r(b5,9a,9a,2f),\
++ r(09,07,07,0e), r(36,12,12,24), r(9b,80,80,1b), r(3d,e2,e2,df),\
++ r(26,eb,eb,cd), r(69,27,27,4e), r(cd,b2,b2,7f), r(9f,75,75,ea),\
++ r(1b,09,09,12), r(9e,83,83,1d), r(74,2c,2c,58), r(2e,1a,1a,34),\
++ r(2d,1b,1b,36), r(b2,6e,6e,dc), r(ee,5a,5a,b4), r(fb,a0,a0,5b),\
++ r(f6,52,52,a4), r(4d,3b,3b,76), r(61,d6,d6,b7), r(ce,b3,b3,7d),\
++ r(7b,29,29,52), r(3e,e3,e3,dd), r(71,2f,2f,5e), r(97,84,84,13),\
++ r(f5,53,53,a6), r(68,d1,d1,b9), r(00,00,00,00), r(2c,ed,ed,c1),\
++ r(60,20,20,40), r(1f,fc,fc,e3), r(c8,b1,b1,79), r(ed,5b,5b,b6),\
++ r(be,6a,6a,d4), r(46,cb,cb,8d), r(d9,be,be,67), r(4b,39,39,72),\
++ r(de,4a,4a,94), r(d4,4c,4c,98), r(e8,58,58,b0), r(4a,cf,cf,85),\
++ r(6b,d0,d0,bb), r(2a,ef,ef,c5), r(e5,aa,aa,4f), r(16,fb,fb,ed),\
++ r(c5,43,43,86), r(d7,4d,4d,9a), r(55,33,33,66), r(94,85,85,11),\
++ r(cf,45,45,8a), r(10,f9,f9,e9), r(06,02,02,04), r(81,7f,7f,fe),\
++ r(f0,50,50,a0), r(44,3c,3c,78), r(ba,9f,9f,25), r(e3,a8,a8,4b),\
++ r(f3,51,51,a2), r(fe,a3,a3,5d), r(c0,40,40,80), r(8a,8f,8f,05),\
++ r(ad,92,92,3f), r(bc,9d,9d,21), r(48,38,38,70), r(04,f5,f5,f1),\
++ r(df,bc,bc,63), r(c1,b6,b6,77), r(75,da,da,af), r(63,21,21,42),\
++ r(30,10,10,20), r(1a,ff,ff,e5), r(0e,f3,f3,fd), r(6d,d2,d2,bf),\
++ r(4c,cd,cd,81), r(14,0c,0c,18), r(35,13,13,26), r(2f,ec,ec,c3),\
++ r(e1,5f,5f,be), r(a2,97,97,35), r(cc,44,44,88), r(39,17,17,2e),\
++ r(57,c4,c4,93), r(f2,a7,a7,55), r(82,7e,7e,fc), r(47,3d,3d,7a),\
++ r(ac,64,64,c8), r(e7,5d,5d,ba), r(2b,19,19,32), r(95,73,73,e6),\
++ r(a0,60,60,c0), r(98,81,81,19), r(d1,4f,4f,9e), r(7f,dc,dc,a3),\
++ r(66,22,22,44), r(7e,2a,2a,54), r(ab,90,90,3b), r(83,88,88,0b),\
++ r(ca,46,46,8c), r(29,ee,ee,c7), r(d3,b8,b8,6b), r(3c,14,14,28),\
++ r(79,de,de,a7), r(e2,5e,5e,bc), r(1d,0b,0b,16), r(76,db,db,ad),\
++ r(3b,e0,e0,db), r(56,32,32,64), r(4e,3a,3a,74), r(1e,0a,0a,14),\
++ r(db,49,49,92), r(0a,06,06,0c), r(6c,24,24,48), r(e4,5c,5c,b8),\
++ r(5d,c2,c2,9f), r(6e,d3,d3,bd), r(ef,ac,ac,43), r(a6,62,62,c4),\
++ r(a8,91,91,39), r(a4,95,95,31), r(37,e4,e4,d3), r(8b,79,79,f2),\
++ r(32,e7,e7,d5), r(43,c8,c8,8b), r(59,37,37,6e), r(b7,6d,6d,da),\
++ r(8c,8d,8d,01), r(64,d5,d5,b1), r(d2,4e,4e,9c), r(e0,a9,a9,49),\
++ r(b4,6c,6c,d8), r(fa,56,56,ac), r(07,f4,f4,f3), r(25,ea,ea,cf),\
++ r(af,65,65,ca), r(8e,7a,7a,f4), r(e9,ae,ae,47), r(18,08,08,10),\
++ r(d5,ba,ba,6f), r(88,78,78,f0), r(6f,25,25,4a), r(72,2e,2e,5c),\
++ r(24,1c,1c,38), r(f1,a6,a6,57), r(c7,b4,b4,73), r(51,c6,c6,97),\
++ r(23,e8,e8,cb), r(7c,dd,dd,a1), r(9c,74,74,e8), r(21,1f,1f,3e),\
++ r(dd,4b,4b,96), r(dc,bd,bd,61), r(86,8b,8b,0d), r(85,8a,8a,0f),\
++ r(90,70,70,e0), r(42,3e,3e,7c), r(c4,b5,b5,71), r(aa,66,66,cc),\
++ r(d8,48,48,90), r(05,03,03,06), r(01,f6,f6,f7), r(12,0e,0e,1c),\
++ r(a3,61,61,c2), r(5f,35,35,6a), r(f9,57,57,ae), r(d0,b9,b9,69),\
++ r(91,86,86,17), r(58,c1,c1,99), r(27,1d,1d,3a), r(b9,9e,9e,27),\
++ r(38,e1,e1,d9), r(13,f8,f8,eb), r(b3,98,98,2b), r(33,11,11,22),\
++ r(bb,69,69,d2), r(70,d9,d9,a9), r(89,8e,8e,07), r(a7,94,94,33),\
++ r(b6,9b,9b,2d), r(22,1e,1e,3c), r(92,87,87,15), r(20,e9,e9,c9),\
++ r(49,ce,ce,87), r(ff,55,55,aa), r(78,28,28,50), r(7a,df,df,a5),\
++ r(8f,8c,8c,03), r(f8,a1,a1,59), r(80,89,89,09), r(17,0d,0d,1a),\
++ r(da,bf,bf,65), r(31,e6,e6,d7), r(c6,42,42,84), r(b8,68,68,d0),\
++ r(c3,41,41,82), r(b0,99,99,29), r(77,2d,2d,5a), r(11,0f,0f,1e),\
++ r(cb,b0,b0,7b), r(fc,54,54,a8), r(d6,bb,bb,6d), r(3a,16,16,2c)
++
++// data for inverse tables (other than last round)
++
++#define i_table \
++ r(50,a7,f4,51), r(53,65,41,7e), r(c3,a4,17,1a), r(96,5e,27,3a),\
++ r(cb,6b,ab,3b), r(f1,45,9d,1f), r(ab,58,fa,ac), r(93,03,e3,4b),\
++ r(55,fa,30,20), r(f6,6d,76,ad), r(91,76,cc,88), r(25,4c,02,f5),\
++ r(fc,d7,e5,4f), r(d7,cb,2a,c5), r(80,44,35,26), r(8f,a3,62,b5),\
++ r(49,5a,b1,de), r(67,1b,ba,25), r(98,0e,ea,45), r(e1,c0,fe,5d),\
++ r(02,75,2f,c3), r(12,f0,4c,81), r(a3,97,46,8d), r(c6,f9,d3,6b),\
++ r(e7,5f,8f,03), r(95,9c,92,15), r(eb,7a,6d,bf), r(da,59,52,95),\
++ r(2d,83,be,d4), r(d3,21,74,58), r(29,69,e0,49), r(44,c8,c9,8e),\
++ r(6a,89,c2,75), r(78,79,8e,f4), r(6b,3e,58,99), r(dd,71,b9,27),\
++ r(b6,4f,e1,be), r(17,ad,88,f0), r(66,ac,20,c9), r(b4,3a,ce,7d),\
++ r(18,4a,df,63), r(82,31,1a,e5), r(60,33,51,97), r(45,7f,53,62),\
++ r(e0,77,64,b1), r(84,ae,6b,bb), r(1c,a0,81,fe), r(94,2b,08,f9),\
++ r(58,68,48,70), r(19,fd,45,8f), r(87,6c,de,94), r(b7,f8,7b,52),\
++ r(23,d3,73,ab), r(e2,02,4b,72), r(57,8f,1f,e3), r(2a,ab,55,66),\
++ r(07,28,eb,b2), r(03,c2,b5,2f), r(9a,7b,c5,86), r(a5,08,37,d3),\
++ r(f2,87,28,30), r(b2,a5,bf,23), r(ba,6a,03,02), r(5c,82,16,ed),\
++ r(2b,1c,cf,8a), r(92,b4,79,a7), r(f0,f2,07,f3), r(a1,e2,69,4e),\
++ r(cd,f4,da,65), r(d5,be,05,06), r(1f,62,34,d1), r(8a,fe,a6,c4),\
++ r(9d,53,2e,34), r(a0,55,f3,a2), r(32,e1,8a,05), r(75,eb,f6,a4),\
++ r(39,ec,83,0b), r(aa,ef,60,40), r(06,9f,71,5e), r(51,10,6e,bd),\
++ r(f9,8a,21,3e), r(3d,06,dd,96), r(ae,05,3e,dd), r(46,bd,e6,4d),\
++ r(b5,8d,54,91), r(05,5d,c4,71), r(6f,d4,06,04), r(ff,15,50,60),\
++ r(24,fb,98,19), r(97,e9,bd,d6), r(cc,43,40,89), r(77,9e,d9,67),\
++ r(bd,42,e8,b0), r(88,8b,89,07), r(38,5b,19,e7), r(db,ee,c8,79),\
++ r(47,0a,7c,a1), r(e9,0f,42,7c), r(c9,1e,84,f8), r(00,00,00,00),\
++ r(83,86,80,09), r(48,ed,2b,32), r(ac,70,11,1e), r(4e,72,5a,6c),\
++ r(fb,ff,0e,fd), r(56,38,85,0f), r(1e,d5,ae,3d), r(27,39,2d,36),\
++ r(64,d9,0f,0a), r(21,a6,5c,68), r(d1,54,5b,9b), r(3a,2e,36,24),\
++ r(b1,67,0a,0c), r(0f,e7,57,93), r(d2,96,ee,b4), r(9e,91,9b,1b),\
++ r(4f,c5,c0,80), r(a2,20,dc,61), r(69,4b,77,5a), r(16,1a,12,1c),\
++ r(0a,ba,93,e2), r(e5,2a,a0,c0), r(43,e0,22,3c), r(1d,17,1b,12),\
++ r(0b,0d,09,0e), r(ad,c7,8b,f2), r(b9,a8,b6,2d), r(c8,a9,1e,14),\
++ r(85,19,f1,57), r(4c,07,75,af), r(bb,dd,99,ee), r(fd,60,7f,a3),\
++ r(9f,26,01,f7), r(bc,f5,72,5c), r(c5,3b,66,44), r(34,7e,fb,5b),\
++ r(76,29,43,8b), r(dc,c6,23,cb), r(68,fc,ed,b6), r(63,f1,e4,b8),\
++ r(ca,dc,31,d7), r(10,85,63,42), r(40,22,97,13), r(20,11,c6,84),\
++ r(7d,24,4a,85), r(f8,3d,bb,d2), r(11,32,f9,ae), r(6d,a1,29,c7),\
++ r(4b,2f,9e,1d), r(f3,30,b2,dc), r(ec,52,86,0d), r(d0,e3,c1,77),\
++ r(6c,16,b3,2b), r(99,b9,70,a9), r(fa,48,94,11), r(22,64,e9,47),\
++ r(c4,8c,fc,a8), r(1a,3f,f0,a0), r(d8,2c,7d,56), r(ef,90,33,22),\
++ r(c7,4e,49,87), r(c1,d1,38,d9), r(fe,a2,ca,8c), r(36,0b,d4,98),\
++ r(cf,81,f5,a6), r(28,de,7a,a5), r(26,8e,b7,da), r(a4,bf,ad,3f),\
++ r(e4,9d,3a,2c), r(0d,92,78,50), r(9b,cc,5f,6a), r(62,46,7e,54),\
++ r(c2,13,8d,f6), r(e8,b8,d8,90), r(5e,f7,39,2e), r(f5,af,c3,82),\
++ r(be,80,5d,9f), r(7c,93,d0,69), r(a9,2d,d5,6f), r(b3,12,25,cf),\
++ r(3b,99,ac,c8), r(a7,7d,18,10), r(6e,63,9c,e8), r(7b,bb,3b,db),\
++ r(09,78,26,cd), r(f4,18,59,6e), r(01,b7,9a,ec), r(a8,9a,4f,83),\
++ r(65,6e,95,e6), r(7e,e6,ff,aa), r(08,cf,bc,21), r(e6,e8,15,ef),\
++ r(d9,9b,e7,ba), r(ce,36,6f,4a), r(d4,09,9f,ea), r(d6,7c,b0,29),\
++ r(af,b2,a4,31), r(31,23,3f,2a), r(30,94,a5,c6), r(c0,66,a2,35),\
++ r(37,bc,4e,74), r(a6,ca,82,fc), r(b0,d0,90,e0), r(15,d8,a7,33),\
++ r(4a,98,04,f1), r(f7,da,ec,41), r(0e,50,cd,7f), r(2f,f6,91,17),\
++ r(8d,d6,4d,76), r(4d,b0,ef,43), r(54,4d,aa,cc), r(df,04,96,e4),\
++ r(e3,b5,d1,9e), r(1b,88,6a,4c), r(b8,1f,2c,c1), r(7f,51,65,46),\
++ r(04,ea,5e,9d), r(5d,35,8c,01), r(73,74,87,fa), r(2e,41,0b,fb),\
++ r(5a,1d,67,b3), r(52,d2,db,92), r(33,56,10,e9), r(13,47,d6,6d),\
++ r(8c,61,d7,9a), r(7a,0c,a1,37), r(8e,14,f8,59), r(89,3c,13,eb),\
++ r(ee,27,a9,ce), r(35,c9,61,b7), r(ed,e5,1c,e1), r(3c,b1,47,7a),\
++ r(59,df,d2,9c), r(3f,73,f2,55), r(79,ce,14,18), r(bf,37,c7,73),\
++ r(ea,cd,f7,53), r(5b,aa,fd,5f), r(14,6f,3d,df), r(86,db,44,78),\
++ r(81,f3,af,ca), r(3e,c4,68,b9), r(2c,34,24,38), r(5f,40,a3,c2),\
++ r(72,c3,1d,16), r(0c,25,e2,bc), r(8b,49,3c,28), r(41,95,0d,ff),\
++ r(71,01,a8,39), r(de,b3,0c,08), r(9c,e4,b4,d8), r(90,c1,56,64),\
++ r(61,84,cb,7b), r(70,b6,32,d5), r(74,5c,6c,48), r(42,57,b8,d0)
++
++// generate the required tables in the desired endian format
++
++#undef r
++#define r r0
++
++#if defined(ONE_TABLE)
++static const u_int32_t ft_tab[256] =
++ { f_table };
++#elif defined(FOUR_TABLES)
++static const u_int32_t ft_tab[4][256] =
++{ { f_table },
++#undef r
++#define r r1
++ { f_table },
++#undef r
++#define r r2
++ { f_table },
++#undef r
++#define r r3
++ { f_table }
++};
++#endif
++
++#undef r
++#define r r0
++#if defined(ONE_TABLE)
++static const u_int32_t it_tab[256] =
++ { i_table };
++#elif defined(FOUR_TABLES)
++static const u_int32_t it_tab[4][256] =
++{ { i_table },
++#undef r
++#define r r1
++ { i_table },
++#undef r
++#define r r2
++ { i_table },
++#undef r
++#define r r3
++ { i_table }
++};
++#endif
++
++#endif
++
++#if defined(FIXED_TABLES) && (defined(ONE_LR_TABLE) || defined(FOUR_LR_TABLES))
++
++// data for inverse tables (last round)
++
++#define li_table \
++ w(52), w(09), w(6a), w(d5), w(30), w(36), w(a5), w(38),\
++ w(bf), w(40), w(a3), w(9e), w(81), w(f3), w(d7), w(fb),\
++ w(7c), w(e3), w(39), w(82), w(9b), w(2f), w(ff), w(87),\
++ w(34), w(8e), w(43), w(44), w(c4), w(de), w(e9), w(cb),\
++ w(54), w(7b), w(94), w(32), w(a6), w(c2), w(23), w(3d),\
++ w(ee), w(4c), w(95), w(0b), w(42), w(fa), w(c3), w(4e),\
++ w(08), w(2e), w(a1), w(66), w(28), w(d9), w(24), w(b2),\
++ w(76), w(5b), w(a2), w(49), w(6d), w(8b), w(d1), w(25),\
++ w(72), w(f8), w(f6), w(64), w(86), w(68), w(98), w(16),\
++ w(d4), w(a4), w(5c), w(cc), w(5d), w(65), w(b6), w(92),\
++ w(6c), w(70), w(48), w(50), w(fd), w(ed), w(b9), w(da),\
++ w(5e), w(15), w(46), w(57), w(a7), w(8d), w(9d), w(84),\
++ w(90), w(d8), w(ab), w(00), w(8c), w(bc), w(d3), w(0a),\
++ w(f7), w(e4), w(58), w(05), w(b8), w(b3), w(45), w(06),\
++ w(d0), w(2c), w(1e), w(8f), w(ca), w(3f), w(0f), w(02),\
++ w(c1), w(af), w(bd), w(03), w(01), w(13), w(8a), w(6b),\
++ w(3a), w(91), w(11), w(41), w(4f), w(67), w(dc), w(ea),\
++ w(97), w(f2), w(cf), w(ce), w(f0), w(b4), w(e6), w(73),\
++ w(96), w(ac), w(74), w(22), w(e7), w(ad), w(35), w(85),\
++ w(e2), w(f9), w(37), w(e8), w(1c), w(75), w(df), w(6e),\
++ w(47), w(f1), w(1a), w(71), w(1d), w(29), w(c5), w(89),\
++ w(6f), w(b7), w(62), w(0e), w(aa), w(18), w(be), w(1b),\
++ w(fc), w(56), w(3e), w(4b), w(c6), w(d2), w(79), w(20),\
++ w(9a), w(db), w(c0), w(fe), w(78), w(cd), w(5a), w(f4),\
++ w(1f), w(dd), w(a8), w(33), w(88), w(07), w(c7), w(31),\
++ w(b1), w(12), w(10), w(59), w(27), w(80), w(ec), w(5f),\
++ w(60), w(51), w(7f), w(a9), w(19), w(b5), w(4a), w(0d),\
++ w(2d), w(e5), w(7a), w(9f), w(93), w(c9), w(9c), w(ef),\
++ w(a0), w(e0), w(3b), w(4d), w(ae), w(2a), w(f5), w(b0),\
++ w(c8), w(eb), w(bb), w(3c), w(83), w(53), w(99), w(61),\
++ w(17), w(2b), w(04), w(7e), w(ba), w(77), w(d6), w(26),\
++ w(e1), w(69), w(14), w(63), w(55), w(21), w(0c), w(7d),
++
++// generate the required tables in the desired endian format
++
++#undef r
++#define r(p,q,r,s) w0(q)
++#if defined(ONE_LR_TABLE)
++static const u_int32_t fl_tab[256] =
++ { f_table };
++#elif defined(FOUR_LR_TABLES)
++static const u_int32_t fl_tab[4][256] =
++{ { f_table },
++#undef r
++#define r(p,q,r,s) w1(q)
++ { f_table },
++#undef r
++#define r(p,q,r,s) w2(q)
++ { f_table },
++#undef r
++#define r(p,q,r,s) w3(q)
++ { f_table }
++};
++#endif
++
++#undef w
++#define w w0
++#if defined(ONE_LR_TABLE)
++static const u_int32_t il_tab[256] =
++ { li_table };
++#elif defined(FOUR_LR_TABLES)
++static const u_int32_t il_tab[4][256] =
++{ { li_table },
++#undef w
++#define w w1
++ { li_table },
++#undef w
++#define w w2
++ { li_table },
++#undef w
++#define w w3
++ { li_table }
++};
++#endif
++
++#endif
++
++#if defined(FIXED_TABLES) && (defined(ONE_IM_TABLE) || defined(FOUR_IM_TABLES))
++
++#define m_table \
++ r(00,00,00,00), r(0b,0d,09,0e), r(16,1a,12,1c), r(1d,17,1b,12),\
++ r(2c,34,24,38), r(27,39,2d,36), r(3a,2e,36,24), r(31,23,3f,2a),\
++ r(58,68,48,70), r(53,65,41,7e), r(4e,72,5a,6c), r(45,7f,53,62),\
++ r(74,5c,6c,48), r(7f,51,65,46), r(62,46,7e,54), r(69,4b,77,5a),\
++ r(b0,d0,90,e0), r(bb,dd,99,ee), r(a6,ca,82,fc), r(ad,c7,8b,f2),\
++ r(9c,e4,b4,d8), r(97,e9,bd,d6), r(8a,fe,a6,c4), r(81,f3,af,ca),\
++ r(e8,b8,d8,90), r(e3,b5,d1,9e), r(fe,a2,ca,8c), r(f5,af,c3,82),\
++ r(c4,8c,fc,a8), r(cf,81,f5,a6), r(d2,96,ee,b4), r(d9,9b,e7,ba),\
++ r(7b,bb,3b,db), r(70,b6,32,d5), r(6d,a1,29,c7), r(66,ac,20,c9),\
++ r(57,8f,1f,e3), r(5c,82,16,ed), r(41,95,0d,ff), r(4a,98,04,f1),\
++ r(23,d3,73,ab), r(28,de,7a,a5), r(35,c9,61,b7), r(3e,c4,68,b9),\
++ r(0f,e7,57,93), r(04,ea,5e,9d), r(19,fd,45,8f), r(12,f0,4c,81),\
++ r(cb,6b,ab,3b), r(c0,66,a2,35), r(dd,71,b9,27), r(d6,7c,b0,29),\
++ r(e7,5f,8f,03), r(ec,52,86,0d), r(f1,45,9d,1f), r(fa,48,94,11),\
++ r(93,03,e3,4b), r(98,0e,ea,45), r(85,19,f1,57), r(8e,14,f8,59),\
++ r(bf,37,c7,73), r(b4,3a,ce,7d), r(a9,2d,d5,6f), r(a2,20,dc,61),\
++ r(f6,6d,76,ad), r(fd,60,7f,a3), r(e0,77,64,b1), r(eb,7a,6d,bf),\
++ r(da,59,52,95), r(d1,54,5b,9b), r(cc,43,40,89), r(c7,4e,49,87),\
++ r(ae,05,3e,dd), r(a5,08,37,d3), r(b8,1f,2c,c1), r(b3,12,25,cf),\
++ r(82,31,1a,e5), r(89,3c,13,eb), r(94,2b,08,f9), r(9f,26,01,f7),\
++ r(46,bd,e6,4d), r(4d,b0,ef,43), r(50,a7,f4,51), r(5b,aa,fd,5f),\
++ r(6a,89,c2,75), r(61,84,cb,7b), r(7c,93,d0,69), r(77,9e,d9,67),\
++ r(1e,d5,ae,3d), r(15,d8,a7,33), r(08,cf,bc,21), r(03,c2,b5,2f),\
++ r(32,e1,8a,05), r(39,ec,83,0b), r(24,fb,98,19), r(2f,f6,91,17),\
++ r(8d,d6,4d,76), r(86,db,44,78), r(9b,cc,5f,6a), r(90,c1,56,64),\
++ r(a1,e2,69,4e), r(aa,ef,60,40), r(b7,f8,7b,52), r(bc,f5,72,5c),\
++ r(d5,be,05,06), r(de,b3,0c,08), r(c3,a4,17,1a), r(c8,a9,1e,14),\
++ r(f9,8a,21,3e), r(f2,87,28,30), r(ef,90,33,22), r(e4,9d,3a,2c),\
++ r(3d,06,dd,96), r(36,0b,d4,98), r(2b,1c,cf,8a), r(20,11,c6,84),\
++ r(11,32,f9,ae), r(1a,3f,f0,a0), r(07,28,eb,b2), r(0c,25,e2,bc),\
++ r(65,6e,95,e6), r(6e,63,9c,e8), r(73,74,87,fa), r(78,79,8e,f4),\
++ r(49,5a,b1,de), r(42,57,b8,d0), r(5f,40,a3,c2), r(54,4d,aa,cc),\
++ r(f7,da,ec,41), r(fc,d7,e5,4f), r(e1,c0,fe,5d), r(ea,cd,f7,53),\
++ r(db,ee,c8,79), r(d0,e3,c1,77), r(cd,f4,da,65), r(c6,f9,d3,6b),\
++ r(af,b2,a4,31), r(a4,bf,ad,3f), r(b9,a8,b6,2d), r(b2,a5,bf,23),\
++ r(83,86,80,09), r(88,8b,89,07), r(95,9c,92,15), r(9e,91,9b,1b),\
++ r(47,0a,7c,a1), r(4c,07,75,af), r(51,10,6e,bd), r(5a,1d,67,b3),\
++ r(6b,3e,58,99), r(60,33,51,97), r(7d,24,4a,85), r(76,29,43,8b),\
++ r(1f,62,34,d1), r(14,6f,3d,df), r(09,78,26,cd), r(02,75,2f,c3),\
++ r(33,56,10,e9), r(38,5b,19,e7), r(25,4c,02,f5), r(2e,41,0b,fb),\
++ r(8c,61,d7,9a), r(87,6c,de,94), r(9a,7b,c5,86), r(91,76,cc,88),\
++ r(a0,55,f3,a2), r(ab,58,fa,ac), r(b6,4f,e1,be), r(bd,42,e8,b0),\
++ r(d4,09,9f,ea), r(df,04,96,e4), r(c2,13,8d,f6), r(c9,1e,84,f8),\
++ r(f8,3d,bb,d2), r(f3,30,b2,dc), r(ee,27,a9,ce), r(e5,2a,a0,c0),\
++ r(3c,b1,47,7a), r(37,bc,4e,74), r(2a,ab,55,66), r(21,a6,5c,68),\
++ r(10,85,63,42), r(1b,88,6a,4c), r(06,9f,71,5e), r(0d,92,78,50),\
++ r(64,d9,0f,0a), r(6f,d4,06,04), r(72,c3,1d,16), r(79,ce,14,18),\
++ r(48,ed,2b,32), r(43,e0,22,3c), r(5e,f7,39,2e), r(55,fa,30,20),\
++ r(01,b7,9a,ec), r(0a,ba,93,e2), r(17,ad,88,f0), r(1c,a0,81,fe),\
++ r(2d,83,be,d4), r(26,8e,b7,da), r(3b,99,ac,c8), r(30,94,a5,c6),\
++ r(59,df,d2,9c), r(52,d2,db,92), r(4f,c5,c0,80), r(44,c8,c9,8e),\
++ r(75,eb,f6,a4), r(7e,e6,ff,aa), r(63,f1,e4,b8), r(68,fc,ed,b6),\
++ r(b1,67,0a,0c), r(ba,6a,03,02), r(a7,7d,18,10), r(ac,70,11,1e),\
++ r(9d,53,2e,34), r(96,5e,27,3a), r(8b,49,3c,28), r(80,44,35,26),\
++ r(e9,0f,42,7c), r(e2,02,4b,72), r(ff,15,50,60), r(f4,18,59,6e),\
++ r(c5,3b,66,44), r(ce,36,6f,4a), r(d3,21,74,58), r(d8,2c,7d,56),\
++ r(7a,0c,a1,37), r(71,01,a8,39), r(6c,16,b3,2b), r(67,1b,ba,25),\
++ r(56,38,85,0f), r(5d,35,8c,01), r(40,22,97,13), r(4b,2f,9e,1d),\
++ r(22,64,e9,47), r(29,69,e0,49), r(34,7e,fb,5b), r(3f,73,f2,55),\
++ r(0e,50,cd,7f), r(05,5d,c4,71), r(18,4a,df,63), r(13,47,d6,6d),\
++ r(ca,dc,31,d7), r(c1,d1,38,d9), r(dc,c6,23,cb), r(d7,cb,2a,c5),\
++ r(e6,e8,15,ef), r(ed,e5,1c,e1), r(f0,f2,07,f3), r(fb,ff,0e,fd),\
++ r(92,b4,79,a7), r(99,b9,70,a9), r(84,ae,6b,bb), r(8f,a3,62,b5),\
++ r(be,80,5d,9f), r(b5,8d,54,91), r(a8,9a,4f,83), r(a3,97,46,8d)
++
++#undef r
++#define r r0
++
++#if defined(ONE_IM_TABLE)
++static const u_int32_t im_tab[256] =
++ { m_table };
++#elif defined(FOUR_IM_TABLES)
++static const u_int32_t im_tab[4][256] =
++{ { m_table },
++#undef r
++#define r r1
++ { m_table },
++#undef r
++#define r r2
++ { m_table },
++#undef r
++#define r r3
++ { m_table }
++};
++#endif
++
++#endif
++
++#else
++
++static int tab_gen = 0;
++
++static unsigned char s_box[256]; // the S box
++static unsigned char inv_s_box[256]; // the inverse S box
++static u_int32_t rcon_tab[AES_RC_LENGTH]; // table of round constants
++
++#if defined(ONE_TABLE)
++static u_int32_t ft_tab[256];
++static u_int32_t it_tab[256];
++#elif defined(FOUR_TABLES)
++static u_int32_t ft_tab[4][256];
++static u_int32_t it_tab[4][256];
++#endif
++
++#if defined(ONE_LR_TABLE)
++static u_int32_t fl_tab[256];
++static u_int32_t il_tab[256];
++#elif defined(FOUR_LR_TABLES)
++static u_int32_t fl_tab[4][256];
++static u_int32_t il_tab[4][256];
++#endif
++
++#if defined(ONE_IM_TABLE)
++static u_int32_t im_tab[256];
++#elif defined(FOUR_IM_TABLES)
++static u_int32_t im_tab[4][256];
++#endif
++
++// Generate the tables for the dynamic table option
++
++#if !defined(FF_TABLES)
++
++// It will generally be sensible to use tables to compute finite
++// field multiplies and inverses but where memory is scarse this
++// code might sometimes be better.
++
++// return 2 ^ (n - 1) where n is the bit number of the highest bit
++// set in x with x in the range 1 < x < 0x00000200. This form is
++// used so that locals within FFinv can be bytes rather than words
++
++static unsigned char hibit(const u_int32_t x)
++{ unsigned char r = (unsigned char)((x >> 1) | (x >> 2));
++
++ r |= (r >> 2);
++ r |= (r >> 4);
++ return (r + 1) >> 1;
++}
++
++// return the inverse of the finite field element x
++
++static unsigned char FFinv(const unsigned char x)
++{ unsigned char p1 = x, p2 = 0x1b, n1 = hibit(x), n2 = 0x80, v1 = 1, v2 = 0;
++
++ if(x < 2) return x;
++
++ for(;;)
++ {
++ if(!n1) return v1;
++
++ while(n2 >= n1)
++ {
++ n2 /= n1; p2 ^= p1 * n2; v2 ^= v1 * n2; n2 = hibit(p2);
++ }
++
++ if(!n2) return v2;
++
++ while(n1 >= n2)
++ {
++ n1 /= n2; p1 ^= p2 * n1; v1 ^= v2 * n1; n1 = hibit(p1);
++ }
++ }
++}
++
++// define the finite field multiplies required for Rijndael
++
++#define FFmul02(x) ((((x) & 0x7f) << 1) ^ ((x) & 0x80 ? 0x1b : 0))
++#define FFmul03(x) ((x) ^ FFmul02(x))
++#define FFmul09(x) ((x) ^ FFmul02(FFmul02(FFmul02(x))))
++#define FFmul0b(x) ((x) ^ FFmul02((x) ^ FFmul02(FFmul02(x))))
++#define FFmul0d(x) ((x) ^ FFmul02(FFmul02((x) ^ FFmul02(x))))
++#define FFmul0e(x) FFmul02((x) ^ FFmul02((x) ^ FFmul02(x)))
++
++#else
++
++#define FFinv(x) ((x) ? pow[255 - log[x]]: 0)
++
++#define FFmul02(x) (x ? pow[log[x] + 0x19] : 0)
++#define FFmul03(x) (x ? pow[log[x] + 0x01] : 0)
++#define FFmul09(x) (x ? pow[log[x] + 0xc7] : 0)
++#define FFmul0b(x) (x ? pow[log[x] + 0x68] : 0)
++#define FFmul0d(x) (x ? pow[log[x] + 0xee] : 0)
++#define FFmul0e(x) (x ? pow[log[x] + 0xdf] : 0)
++
++#endif
++
++// The forward and inverse affine transformations used in the S-box
++
++#define fwd_affine(x) \
++ (w = (u_int32_t)x, w ^= (w<<1)^(w<<2)^(w<<3)^(w<<4), 0x63^(unsigned char)(w^(w>>8)))
++
++#define inv_affine(x) \
++ (w = (u_int32_t)x, w = (w<<1)^(w<<3)^(w<<6), 0x05^(unsigned char)(w^(w>>8)))
++
++static void gen_tabs(void)
++{ u_int32_t i, w;
++
++#if defined(FF_TABLES)
++
++ unsigned char pow[512], log[256];
++
++ // log and power tables for GF(2^8) finite field with
++ // 0x011b as modular polynomial - the simplest primitive
++ // root is 0x03, used here to generate the tables
++
++ i = 0; w = 1;
++ do
++ {
++ pow[i] = (unsigned char)w;
++ pow[i + 255] = (unsigned char)w;
++ log[w] = (unsigned char)i++;
++ w ^= (w << 1) ^ (w & ff_hi ? ff_poly : 0);
++ }
++ while (w != 1);
++
++#endif
++
++ for(i = 0, w = 1; i < AES_RC_LENGTH; ++i)
++ {
++ rcon_tab[i] = bytes2word(w, 0, 0, 0);
++ w = (w << 1) ^ (w & ff_hi ? ff_poly : 0);
++ }
++
++ for(i = 0; i < 256; ++i)
++ { unsigned char b;
++
++ s_box[i] = b = fwd_affine(FFinv((unsigned char)i));
++
++ w = bytes2word(b, 0, 0, 0);
++#if defined(ONE_LR_TABLE)
++ fl_tab[i] = w;
++#elif defined(FOUR_LR_TABLES)
++ fl_tab[0][i] = w;
++ fl_tab[1][i] = upr(w,1);
++ fl_tab[2][i] = upr(w,2);
++ fl_tab[3][i] = upr(w,3);
++#endif
++ w = bytes2word(FFmul02(b), b, b, FFmul03(b));
++#if defined(ONE_TABLE)
++ ft_tab[i] = w;
++#elif defined(FOUR_TABLES)
++ ft_tab[0][i] = w;
++ ft_tab[1][i] = upr(w,1);
++ ft_tab[2][i] = upr(w,2);
++ ft_tab[3][i] = upr(w,3);
++#endif
++ inv_s_box[i] = b = FFinv(inv_affine((unsigned char)i));
++
++ w = bytes2word(b, 0, 0, 0);
++#if defined(ONE_LR_TABLE)
++ il_tab[i] = w;
++#elif defined(FOUR_LR_TABLES)
++ il_tab[0][i] = w;
++ il_tab[1][i] = upr(w,1);
++ il_tab[2][i] = upr(w,2);
++ il_tab[3][i] = upr(w,3);
++#endif
++ w = bytes2word(FFmul0e(b), FFmul09(b), FFmul0d(b), FFmul0b(b));
++#if defined(ONE_TABLE)
++ it_tab[i] = w;
++#elif defined(FOUR_TABLES)
++ it_tab[0][i] = w;
++ it_tab[1][i] = upr(w,1);
++ it_tab[2][i] = upr(w,2);
++ it_tab[3][i] = upr(w,3);
++#endif
++#if defined(ONE_IM_TABLE)
++ im_tab[b] = w;
++#elif defined(FOUR_IM_TABLES)
++ im_tab[0][b] = w;
++ im_tab[1][b] = upr(w,1);
++ im_tab[2][b] = upr(w,2);
++ im_tab[3][b] = upr(w,3);
++#endif
++
++ }
++}
++
++#endif
++
++#define no_table(x,box,vf,rf,c) bytes2word( \
++ box[bval(vf(x,0,c),rf(0,c))], \
++ box[bval(vf(x,1,c),rf(1,c))], \
++ box[bval(vf(x,2,c),rf(2,c))], \
++ box[bval(vf(x,3,c),rf(3,c))])
++
++#define one_table(x,op,tab,vf,rf,c) \
++ ( tab[bval(vf(x,0,c),rf(0,c))] \
++ ^ op(tab[bval(vf(x,1,c),rf(1,c))],1) \
++ ^ op(tab[bval(vf(x,2,c),rf(2,c))],2) \
++ ^ op(tab[bval(vf(x,3,c),rf(3,c))],3))
++
++#define four_tables(x,tab,vf,rf,c) \
++ ( tab[0][bval(vf(x,0,c),rf(0,c))] \
++ ^ tab[1][bval(vf(x,1,c),rf(1,c))] \
++ ^ tab[2][bval(vf(x,2,c),rf(2,c))] \
++ ^ tab[3][bval(vf(x,3,c),rf(3,c))])
++
++#define vf1(x,r,c) (x)
++#define rf1(r,c) (r)
++#define rf2(r,c) ((r-c)&3)
++
++#if defined(FOUR_LR_TABLES)
++#define ls_box(x,c) four_tables(x,fl_tab,vf1,rf2,c)
++#elif defined(ONE_LR_TABLE)
++#define ls_box(x,c) one_table(x,upr,fl_tab,vf1,rf2,c)
++#else
++#define ls_box(x,c) no_table(x,s_box,vf1,rf2,c)
++#endif
++
++#if defined(FOUR_IM_TABLES)
++#define inv_mcol(x) four_tables(x,im_tab,vf1,rf1,0)
++#elif defined(ONE_IM_TABLE)
++#define inv_mcol(x) one_table(x,upr,im_tab,vf1,rf1,0)
++#else
++#define inv_mcol(x) \
++ (f9 = (x),f2 = FFmulX(f9), f4 = FFmulX(f2), f8 = FFmulX(f4), f9 ^= f8, \
++ f2 ^= f4 ^ f8 ^ upr(f2 ^ f9,3) ^ upr(f4 ^ f9,2) ^ upr(f9,1))
++#endif
++
++// Subroutine to set the block size (if variable) in bytes, legal
++// values being 16, 24 and 32.
++
++#if defined(AES_BLOCK_SIZE)
++#define nc (AES_BLOCK_SIZE / 4)
++#else
++#define nc (cx->aes_Ncol)
++
++void aes_set_blk(aes_context *cx, int n_bytes)
++{
++#if !defined(FIXED_TABLES)
++ if(!tab_gen) { gen_tabs(); tab_gen = 1; }
++#endif
++
++ switch(n_bytes) {
++ case 32: /* bytes */
++ case 256: /* bits */
++ nc = 8;
++ break;
++ case 24: /* bytes */
++ case 192: /* bits */
++ nc = 6;
++ break;
++ case 16: /* bytes */
++ case 128: /* bits */
++ default:
++ nc = 4;
++ break;
++ }
++}
++
++#endif
++
++// Initialise the key schedule from the user supplied key. The key
++// length is now specified in bytes - 16, 24 or 32 as appropriate.
++// This corresponds to bit lengths of 128, 192 and 256 bits, and
++// to Nk values of 4, 6 and 8 respectively.
++
++#define mx(t,f) (*t++ = inv_mcol(*f),f++)
++#define cp(t,f) *t++ = *f++
++
++#if AES_BLOCK_SIZE == 16
++#define cpy(d,s) cp(d,s); cp(d,s); cp(d,s); cp(d,s)
++#define mix(d,s) mx(d,s); mx(d,s); mx(d,s); mx(d,s)
++#elif AES_BLOCK_SIZE == 24
++#define cpy(d,s) cp(d,s); cp(d,s); cp(d,s); cp(d,s); \
++ cp(d,s); cp(d,s)
++#define mix(d,s) mx(d,s); mx(d,s); mx(d,s); mx(d,s); \
++ mx(d,s); mx(d,s)
++#elif AES_BLOCK_SIZE == 32
++#define cpy(d,s) cp(d,s); cp(d,s); cp(d,s); cp(d,s); \
++ cp(d,s); cp(d,s); cp(d,s); cp(d,s)
++#define mix(d,s) mx(d,s); mx(d,s); mx(d,s); mx(d,s); \
++ mx(d,s); mx(d,s); mx(d,s); mx(d,s)
++#else
++
++#define cpy(d,s) \
++switch(nc) \
++{ case 8: cp(d,s); cp(d,s); \
++ case 6: cp(d,s); cp(d,s); \
++ case 4: cp(d,s); cp(d,s); \
++ cp(d,s); cp(d,s); \
++}
++
++#define mix(d,s) \
++switch(nc) \
++{ case 8: mx(d,s); mx(d,s); \
++ case 6: mx(d,s); mx(d,s); \
++ case 4: mx(d,s); mx(d,s); \
++ mx(d,s); mx(d,s); \
++}
++
++#endif
++
++void aes_set_key(aes_context *cx, const unsigned char in_key[], int n_bytes, const int f)
++{ u_int32_t *kf, *kt, rci;
++
++#if !defined(FIXED_TABLES)
++ if(!tab_gen) { gen_tabs(); tab_gen = 1; }
++#endif
++
++ switch(n_bytes) {
++ case 32: /* bytes */
++ case 256: /* bits */
++ cx->aes_Nkey = 8;
++ break;
++ case 24: /* bytes */
++ case 192: /* bits */
++ cx->aes_Nkey = 6;
++ break;
++ case 16: /* bytes */
++ case 128: /* bits */
++ default:
++ cx->aes_Nkey = 4;
++ break;
++ }
++
++ cx->aes_Nrnd = (cx->aes_Nkey > nc ? cx->aes_Nkey : nc) + 6;
++
++ cx->aes_e_key[0] = word_in(in_key );
++ cx->aes_e_key[1] = word_in(in_key + 4);
++ cx->aes_e_key[2] = word_in(in_key + 8);
++ cx->aes_e_key[3] = word_in(in_key + 12);
++
++ kf = cx->aes_e_key;
++ kt = kf + nc * (cx->aes_Nrnd + 1) - cx->aes_Nkey;
++ rci = 0;
++
++ switch(cx->aes_Nkey)
++ {
++ case 4: do
++ { kf[4] = kf[0] ^ ls_box(kf[3],3) ^ rcon_tab[rci++];
++ kf[5] = kf[1] ^ kf[4];
++ kf[6] = kf[2] ^ kf[5];
++ kf[7] = kf[3] ^ kf[6];
++ kf += 4;
++ }
++ while(kf < kt);
++ break;
++
++ case 6: cx->aes_e_key[4] = word_in(in_key + 16);
++ cx->aes_e_key[5] = word_in(in_key + 20);
++ do
++ { kf[ 6] = kf[0] ^ ls_box(kf[5],3) ^ rcon_tab[rci++];
++ kf[ 7] = kf[1] ^ kf[ 6];
++ kf[ 8] = kf[2] ^ kf[ 7];
++ kf[ 9] = kf[3] ^ kf[ 8];
++ kf[10] = kf[4] ^ kf[ 9];
++ kf[11] = kf[5] ^ kf[10];
++ kf += 6;
++ }
++ while(kf < kt);
++ break;
++
++ case 8: cx->aes_e_key[4] = word_in(in_key + 16);
++ cx->aes_e_key[5] = word_in(in_key + 20);
++ cx->aes_e_key[6] = word_in(in_key + 24);
++ cx->aes_e_key[7] = word_in(in_key + 28);
++ do
++ { kf[ 8] = kf[0] ^ ls_box(kf[7],3) ^ rcon_tab[rci++];
++ kf[ 9] = kf[1] ^ kf[ 8];
++ kf[10] = kf[2] ^ kf[ 9];
++ kf[11] = kf[3] ^ kf[10];
++ kf[12] = kf[4] ^ ls_box(kf[11],0);
++ kf[13] = kf[5] ^ kf[12];
++ kf[14] = kf[6] ^ kf[13];
++ kf[15] = kf[7] ^ kf[14];
++ kf += 8;
++ }
++ while (kf < kt);
++ break;
++ }
++
++ if(!f)
++ { u_int32_t i;
++
++ kt = cx->aes_d_key + nc * cx->aes_Nrnd;
++ kf = cx->aes_e_key;
++
++ cpy(kt, kf); kt -= 2 * nc;
++
++ for(i = 1; i < cx->aes_Nrnd; ++i)
++ {
++#if defined(ONE_TABLE) || defined(FOUR_TABLES)
++#if !defined(ONE_IM_TABLE) && !defined(FOUR_IM_TABLES)
++ u_int32_t f2, f4, f8, f9;
++#endif
++ mix(kt, kf);
++#else
++ cpy(kt, kf);
++#endif
++ kt -= 2 * nc;
++ }
++
++ cpy(kt, kf);
++ }
++}
++
++// y = output word, x = input word, r = row, c = column
++// for r = 0, 1, 2 and 3 = column accessed for row r
++
++#if defined(ARRAYS)
++#define s(x,c) x[c]
++#else
++#define s(x,c) x##c
++#endif
++
++// I am grateful to Frank Yellin for the following constructions
++// which, given the column (c) of the output state variable that
++// is being computed, return the input state variables which are
++// needed for each row (r) of the state
++
++// For the fixed block size options, compilers reduce these two
++// expressions to fixed variable references. For variable block
++// size code conditional clauses will sometimes be returned
++
++#define unused 77 // Sunset Strip
++
++#define fwd_var(x,r,c) \
++ ( r==0 ? \
++ ( c==0 ? s(x,0) \
++ : c==1 ? s(x,1) \
++ : c==2 ? s(x,2) \
++ : c==3 ? s(x,3) \
++ : c==4 ? s(x,4) \
++ : c==5 ? s(x,5) \
++ : c==6 ? s(x,6) \
++ : s(x,7)) \
++ : r==1 ? \
++ ( c==0 ? s(x,1) \
++ : c==1 ? s(x,2) \
++ : c==2 ? s(x,3) \
++ : c==3 ? nc==4 ? s(x,0) : s(x,4) \
++ : c==4 ? s(x,5) \
++ : c==5 ? nc==8 ? s(x,6) : s(x,0) \
++ : c==6 ? s(x,7) \
++ : s(x,0)) \
++ : r==2 ? \
++ ( c==0 ? nc==8 ? s(x,3) : s(x,2) \
++ : c==1 ? nc==8 ? s(x,4) : s(x,3) \
++ : c==2 ? nc==4 ? s(x,0) : nc==8 ? s(x,5) : s(x,4) \
++ : c==3 ? nc==4 ? s(x,1) : nc==8 ? s(x,6) : s(x,5) \
++ : c==4 ? nc==8 ? s(x,7) : s(x,0) \
++ : c==5 ? nc==8 ? s(x,0) : s(x,1) \
++ : c==6 ? s(x,1) \
++ : s(x,2)) \
++ : \
++ ( c==0 ? nc==8 ? s(x,4) : s(x,3) \
++ : c==1 ? nc==4 ? s(x,0) : nc==8 ? s(x,5) : s(x,4) \
++ : c==2 ? nc==4 ? s(x,1) : nc==8 ? s(x,6) : s(x,5) \
++ : c==3 ? nc==4 ? s(x,2) : nc==8 ? s(x,7) : s(x,0) \
++ : c==4 ? nc==8 ? s(x,0) : s(x,1) \
++ : c==5 ? nc==8 ? s(x,1) : s(x,2) \
++ : c==6 ? s(x,2) \
++ : s(x,3)))
++
++#define inv_var(x,r,c) \
++ ( r==0 ? \
++ ( c==0 ? s(x,0) \
++ : c==1 ? s(x,1) \
++ : c==2 ? s(x,2) \
++ : c==3 ? s(x,3) \
++ : c==4 ? s(x,4) \
++ : c==5 ? s(x,5) \
++ : c==6 ? s(x,6) \
++ : s(x,7)) \
++ : r==1 ? \
++ ( c==0 ? nc==4 ? s(x,3) : nc==8 ? s(x,7) : s(x,5) \
++ : c==1 ? s(x,0) \
++ : c==2 ? s(x,1) \
++ : c==3 ? s(x,2) \
++ : c==4 ? s(x,3) \
++ : c==5 ? s(x,4) \
++ : c==6 ? s(x,5) \
++ : s(x,6)) \
++ : r==2 ? \
++ ( c==0 ? nc==4 ? s(x,2) : nc==8 ? s(x,5) : s(x,4) \
++ : c==1 ? nc==4 ? s(x,3) : nc==8 ? s(x,6) : s(x,5) \
++ : c==2 ? nc==8 ? s(x,7) : s(x,0) \
++ : c==3 ? nc==8 ? s(x,0) : s(x,1) \
++ : c==4 ? nc==8 ? s(x,1) : s(x,2) \
++ : c==5 ? nc==8 ? s(x,2) : s(x,3) \
++ : c==6 ? s(x,3) \
++ : s(x,4)) \
++ : \
++ ( c==0 ? nc==4 ? s(x,1) : nc==8 ? s(x,4) : s(x,3) \
++ : c==1 ? nc==4 ? s(x,2) : nc==8 ? s(x,5) : s(x,4) \
++ : c==2 ? nc==4 ? s(x,3) : nc==8 ? s(x,6) : s(x,5) \
++ : c==3 ? nc==8 ? s(x,7) : s(x,0) \
++ : c==4 ? nc==8 ? s(x,0) : s(x,1) \
++ : c==5 ? nc==8 ? s(x,1) : s(x,2) \
++ : c==6 ? s(x,2) \
++ : s(x,3)))
++
++#define si(y,x,k,c) s(y,c) = word_in(x + 4 * c) ^ k[c]
++#define so(y,x,c) word_out(y + 4 * c, s(x,c))
++
++#if defined(FOUR_TABLES)
++#define fwd_rnd(y,x,k,c) s(y,c)= (k)[c] ^ four_tables(x,ft_tab,fwd_var,rf1,c)
++#define inv_rnd(y,x,k,c) s(y,c)= (k)[c] ^ four_tables(x,it_tab,inv_var,rf1,c)
++#elif defined(ONE_TABLE)
++#define fwd_rnd(y,x,k,c) s(y,c)= (k)[c] ^ one_table(x,upr,ft_tab,fwd_var,rf1,c)
++#define inv_rnd(y,x,k,c) s(y,c)= (k)[c] ^ one_table(x,upr,it_tab,inv_var,rf1,c)
++#else
++#define fwd_rnd(y,x,k,c) s(y,c) = fwd_mcol(no_table(x,s_box,fwd_var,rf1,c)) ^ (k)[c]
++#define inv_rnd(y,x,k,c) s(y,c) = inv_mcol(no_table(x,inv_s_box,inv_var,rf1,c) ^ (k)[c])
++#endif
++
++#if defined(FOUR_LR_TABLES)
++#define fwd_lrnd(y,x,k,c) s(y,c)= (k)[c] ^ four_tables(x,fl_tab,fwd_var,rf1,c)
++#define inv_lrnd(y,x,k,c) s(y,c)= (k)[c] ^ four_tables(x,il_tab,inv_var,rf1,c)
++#elif defined(ONE_LR_TABLE)
++#define fwd_lrnd(y,x,k,c) s(y,c)= (k)[c] ^ one_table(x,ups,fl_tab,fwd_var,rf1,c)
++#define inv_lrnd(y,x,k,c) s(y,c)= (k)[c] ^ one_table(x,ups,il_tab,inv_var,rf1,c)
++#else
++#define fwd_lrnd(y,x,k,c) s(y,c) = no_table(x,s_box,fwd_var,rf1,c) ^ (k)[c]
++#define inv_lrnd(y,x,k,c) s(y,c) = no_table(x,inv_s_box,inv_var,rf1,c) ^ (k)[c]
++#endif
++
++#if AES_BLOCK_SIZE == 16
++
++#if defined(ARRAYS)
++#define locals(y,x) x[4],y[4]
++#else
++#define locals(y,x) x##0,x##1,x##2,x##3,y##0,y##1,y##2,y##3
++// the following defines prevent the compiler requiring the declaration
++// of generated but unused variables in the fwd_var and inv_var macros
++#define b04 unused
++#define b05 unused
++#define b06 unused
++#define b07 unused
++#define b14 unused
++#define b15 unused
++#define b16 unused
++#define b17 unused
++#endif
++#define l_copy(y, x) s(y,0) = s(x,0); s(y,1) = s(x,1); \
++ s(y,2) = s(x,2); s(y,3) = s(x,3);
++#define state_in(y,x,k) si(y,x,k,0); si(y,x,k,1); si(y,x,k,2); si(y,x,k,3)
++#define state_out(y,x) so(y,x,0); so(y,x,1); so(y,x,2); so(y,x,3)
++#define round(rm,y,x,k) rm(y,x,k,0); rm(y,x,k,1); rm(y,x,k,2); rm(y,x,k,3)
++
++#elif AES_BLOCK_SIZE == 24
++
++#if defined(ARRAYS)
++#define locals(y,x) x[6],y[6]
++#else
++#define locals(y,x) x##0,x##1,x##2,x##3,x##4,x##5, \
++ y##0,y##1,y##2,y##3,y##4,y##5
++#define b06 unused
++#define b07 unused
++#define b16 unused
++#define b17 unused
++#endif
++#define l_copy(y, x) s(y,0) = s(x,0); s(y,1) = s(x,1); \
++ s(y,2) = s(x,2); s(y,3) = s(x,3); \
++ s(y,4) = s(x,4); s(y,5) = s(x,5);
++#define state_in(y,x,k) si(y,x,k,0); si(y,x,k,1); si(y,x,k,2); \
++ si(y,x,k,3); si(y,x,k,4); si(y,x,k,5)
++#define state_out(y,x) so(y,x,0); so(y,x,1); so(y,x,2); \
++ so(y,x,3); so(y,x,4); so(y,x,5)
++#define round(rm,y,x,k) rm(y,x,k,0); rm(y,x,k,1); rm(y,x,k,2); \
++ rm(y,x,k,3); rm(y,x,k,4); rm(y,x,k,5)
++#else
++
++#if defined(ARRAYS)
++#define locals(y,x) x[8],y[8]
++#else
++#define locals(y,x) x##0,x##1,x##2,x##3,x##4,x##5,x##6,x##7, \
++ y##0,y##1,y##2,y##3,y##4,y##5,y##6,y##7
++#endif
++#define l_copy(y, x) s(y,0) = s(x,0); s(y,1) = s(x,1); \
++ s(y,2) = s(x,2); s(y,3) = s(x,3); \
++ s(y,4) = s(x,4); s(y,5) = s(x,5); \
++ s(y,6) = s(x,6); s(y,7) = s(x,7);
++
++#if AES_BLOCK_SIZE == 32
++
++#define state_in(y,x,k) si(y,x,k,0); si(y,x,k,1); si(y,x,k,2); si(y,x,k,3); \
++ si(y,x,k,4); si(y,x,k,5); si(y,x,k,6); si(y,x,k,7)
++#define state_out(y,x) so(y,x,0); so(y,x,1); so(y,x,2); so(y,x,3); \
++ so(y,x,4); so(y,x,5); so(y,x,6); so(y,x,7)
++#define round(rm,y,x,k) rm(y,x,k,0); rm(y,x,k,1); rm(y,x,k,2); rm(y,x,k,3); \
++ rm(y,x,k,4); rm(y,x,k,5); rm(y,x,k,6); rm(y,x,k,7)
++#else
++
++#define state_in(y,x,k) \
++switch(nc) \
++{ case 8: si(y,x,k,7); si(y,x,k,6); \
++ case 6: si(y,x,k,5); si(y,x,k,4); \
++ case 4: si(y,x,k,3); si(y,x,k,2); \
++ si(y,x,k,1); si(y,x,k,0); \
++}
++
++#define state_out(y,x) \
++switch(nc) \
++{ case 8: so(y,x,7); so(y,x,6); \
++ case 6: so(y,x,5); so(y,x,4); \
++ case 4: so(y,x,3); so(y,x,2); \
++ so(y,x,1); so(y,x,0); \
++}
++
++#if defined(FAST_VARIABLE)
++
++#define round(rm,y,x,k) \
++switch(nc) \
++{ case 8: rm(y,x,k,7); rm(y,x,k,6); \
++ rm(y,x,k,5); rm(y,x,k,4); \
++ rm(y,x,k,3); rm(y,x,k,2); \
++ rm(y,x,k,1); rm(y,x,k,0); \
++ break; \
++ case 6: rm(y,x,k,5); rm(y,x,k,4); \
++ rm(y,x,k,3); rm(y,x,k,2); \
++ rm(y,x,k,1); rm(y,x,k,0); \
++ break; \
++ case 4: rm(y,x,k,3); rm(y,x,k,2); \
++ rm(y,x,k,1); rm(y,x,k,0); \
++ break; \
++}
++#else
++
++#define round(rm,y,x,k) \
++switch(nc) \
++{ case 8: rm(y,x,k,7); rm(y,x,k,6); \
++ case 6: rm(y,x,k,5); rm(y,x,k,4); \
++ case 4: rm(y,x,k,3); rm(y,x,k,2); \
++ rm(y,x,k,1); rm(y,x,k,0); \
++}
++
++#endif
++
++#endif
++#endif
++
++void aes_encrypt(const aes_context *cx, const unsigned char in_blk[], unsigned char out_blk[])
++{ u_int32_t locals(b0, b1);
++ const u_int32_t *kp = cx->aes_e_key;
++
++#if !defined(ONE_TABLE) && !defined(FOUR_TABLES)
++ u_int32_t f2;
++#endif
++
++ state_in(b0, in_blk, kp); kp += nc;
++
++#if defined(UNROLL)
++
++ switch(cx->aes_Nrnd)
++ {
++ case 14: round(fwd_rnd, b1, b0, kp );
++ round(fwd_rnd, b0, b1, kp + nc ); kp += 2 * nc;
++ case 12: round(fwd_rnd, b1, b0, kp );
++ round(fwd_rnd, b0, b1, kp + nc ); kp += 2 * nc;
++ case 10: round(fwd_rnd, b1, b0, kp );
++ round(fwd_rnd, b0, b1, kp + nc);
++ round(fwd_rnd, b1, b0, kp + 2 * nc);
++ round(fwd_rnd, b0, b1, kp + 3 * nc);
++ round(fwd_rnd, b1, b0, kp + 4 * nc);
++ round(fwd_rnd, b0, b1, kp + 5 * nc);
++ round(fwd_rnd, b1, b0, kp + 6 * nc);
++ round(fwd_rnd, b0, b1, kp + 7 * nc);
++ round(fwd_rnd, b1, b0, kp + 8 * nc);
++ round(fwd_lrnd, b0, b1, kp + 9 * nc);
++ }
++
++#elif defined(PARTIAL_UNROLL)
++ { u_int32_t rnd;
++
++ for(rnd = 0; rnd < (cx->aes_Nrnd >> 1) - 1; ++rnd)
++ {
++ round(fwd_rnd, b1, b0, kp);
++ round(fwd_rnd, b0, b1, kp + nc); kp += 2 * nc;
++ }
++
++ round(fwd_rnd, b1, b0, kp);
++ round(fwd_lrnd, b0, b1, kp + nc);
++ }
++#else
++ { u_int32_t rnd;
++
++ for(rnd = 0; rnd < cx->aes_Nrnd - 1; ++rnd)
++ {
++ round(fwd_rnd, b1, b0, kp);
++ l_copy(b0, b1); kp += nc;
++ }
++
++ round(fwd_lrnd, b0, b1, kp);
++ }
++#endif
++
++ state_out(out_blk, b0);
++}
++
++void aes_decrypt(const aes_context *cx, const unsigned char in_blk[], unsigned char out_blk[])
++{ u_int32_t locals(b0, b1);
++ const u_int32_t *kp = cx->aes_d_key;
++
++#if !defined(ONE_TABLE) && !defined(FOUR_TABLES)
++ u_int32_t f2, f4, f8, f9;
++#endif
++
++ state_in(b0, in_blk, kp); kp += nc;
++
++#if defined(UNROLL)
++
++ switch(cx->aes_Nrnd)
++ {
++ case 14: round(inv_rnd, b1, b0, kp );
++ round(inv_rnd, b0, b1, kp + nc ); kp += 2 * nc;
++ case 12: round(inv_rnd, b1, b0, kp );
++ round(inv_rnd, b0, b1, kp + nc ); kp += 2 * nc;
++ case 10: round(inv_rnd, b1, b0, kp );
++ round(inv_rnd, b0, b1, kp + nc);
++ round(inv_rnd, b1, b0, kp + 2 * nc);
++ round(inv_rnd, b0, b1, kp + 3 * nc);
++ round(inv_rnd, b1, b0, kp + 4 * nc);
++ round(inv_rnd, b0, b1, kp + 5 * nc);
++ round(inv_rnd, b1, b0, kp + 6 * nc);
++ round(inv_rnd, b0, b1, kp + 7 * nc);
++ round(inv_rnd, b1, b0, kp + 8 * nc);
++ round(inv_lrnd, b0, b1, kp + 9 * nc);
++ }
++
++#elif defined(PARTIAL_UNROLL)
++ { u_int32_t rnd;
++
++ for(rnd = 0; rnd < (cx->aes_Nrnd >> 1) - 1; ++rnd)
++ {
++ round(inv_rnd, b1, b0, kp);
++ round(inv_rnd, b0, b1, kp + nc); kp += 2 * nc;
++ }
++
++ round(inv_rnd, b1, b0, kp);
++ round(inv_lrnd, b0, b1, kp + nc);
++ }
++#else
++ { u_int32_t rnd;
++
++ for(rnd = 0; rnd < cx->aes_Nrnd - 1; ++rnd)
++ {
++ round(inv_rnd, b1, b0, kp);
++ l_copy(b0, b1); kp += nc;
++ }
++
++ round(inv_lrnd, b0, b1, kp);
++ }
++#endif
++
++ state_out(out_blk, b0);
++}
+diff -urN linux-3.14-noloop/drivers/misc/aes.h linux-3.14-AES/drivers/misc/aes.h
+--- linux-3.14-noloop/drivers/misc/aes.h 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/aes.h 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,112 @@
++// I retain copyright in this code but I encourage its free use provided
++// that I don't carry any responsibility for the results. I am especially
++// happy to see it used in free and open source software. If you do use
++// it I would appreciate an acknowledgement of its origin in the code or
++// the product that results and I would also appreciate knowing a little
++// about the use to which it is being put. I am grateful to Frank Yellin
++// for some ideas that are used in this implementation.
++//
++// Dr B. R. Gladman <brg@gladman.uk.net> 6th April 2001.
++//
++// This is an implementation of the AES encryption algorithm (Rijndael)
++// designed by Joan Daemen and Vincent Rijmen. This version is designed
++// to provide both fixed and dynamic block and key lengths and can also
++// run with either big or little endian internal byte order (see aes.h).
++// It inputs block and key lengths in bytes with the legal values being
++// 16, 24 and 32.
++
++/*
++ * Modified by Jari Ruusu, May 1 2001
++ * - Fixed some compile warnings, code was ok but gcc warned anyway.
++ * - Changed basic types: byte -> unsigned char, word -> u_int32_t
++ * - Major name space cleanup: Names visible to outside now begin
++ * with "aes_" or "AES_". A lot of stuff moved from aes.h to aes.c
++ * - Removed C++ and DLL support as part of name space cleanup.
++ * - Eliminated unnecessary recomputation of tables. (actual bug fix)
++ * - Merged precomputed constant tables to aes.c file.
++ * - Removed data alignment restrictions for portability reasons.
++ * - Made block and key lengths accept bit count (128/192/256)
++ * as well byte count (16/24/32).
++ * - Removed all error checks. This change also eliminated the need
++ * to preinitialize the context struct to zero.
++ * - Removed some totally unused constants.
++ */
++
++#ifndef _AES_H
++#define _AES_H
++
++#include <linux/types.h>
++#include <linux/linkage.h>
++#include <linux/module.h>
++
++// CONFIGURATION OPTIONS (see also aes.c)
++//
++// Define AES_BLOCK_SIZE to set the cipher block size (16, 24 or 32) or
++// leave this undefined for dynamically variable block size (this will
++// result in much slower code).
++// IMPORTANT NOTE: AES_BLOCK_SIZE is in BYTES (16, 24, 32 or undefined). If
++// left undefined a slower version providing variable block length is compiled
++
++#define AES_BLOCK_SIZE 16
++
++// The number of key schedule words for different block and key lengths
++// allowing for method of computation which requires the length to be a
++// multiple of the key length
++//
++// Nk = 4 6 8
++// -------------
++// Nb = 4 | 60 60 64
++// 6 | 96 90 96
++// 8 | 120 120 120
++
++#if !defined(AES_BLOCK_SIZE) || (AES_BLOCK_SIZE == 32)
++#define AES_KS_LENGTH 120
++#define AES_RC_LENGTH 29
++#else
++#define AES_KS_LENGTH 4 * AES_BLOCK_SIZE
++#define AES_RC_LENGTH (9 * AES_BLOCK_SIZE) / 8 - 8
++#endif
++
++typedef struct
++{
++ u_int32_t aes_Nkey; // the number of words in the key input block
++ u_int32_t aes_Nrnd; // the number of cipher rounds
++ u_int32_t aes_e_key[AES_KS_LENGTH]; // the encryption key schedule
++ u_int32_t aes_d_key[AES_KS_LENGTH]; // the decryption key schedule
++#if !defined(AES_BLOCK_SIZE)
++ u_int32_t aes_Ncol; // the number of columns in the cipher state
++#endif
++} aes_context;
++
++// avoid global name conflict with mainline kernel
++#define aes_set_key _aes_set_key
++#define aes_encrypt _aes_encrypt
++#define aes_decrypt _aes_decrypt
++
++// THE CIPHER INTERFACE
++
++#if !defined(AES_BLOCK_SIZE)
++extern void aes_set_blk(aes_context *, const int);
++#endif
++
++#if defined(CONFIG_X86) || defined(CONFIG_X86_64)
++ asmlinkage
++#endif
++extern void aes_set_key(aes_context *, const unsigned char [], const int, const int);
++
++#if defined(CONFIG_X86) || defined(CONFIG_X86_64)
++ asmlinkage
++#endif
++extern void aes_encrypt(const aes_context *, const unsigned char [], unsigned char []);
++
++#if defined(CONFIG_X86) || defined(CONFIG_X86_64)
++ asmlinkage
++#endif
++extern void aes_decrypt(const aes_context *, const unsigned char [], unsigned char []);
++
++// The block length inputs to aes_set_block and aes_set_key are in numbers
++// of bytes or bits. The calls to subroutines must be made in the above
++// order but multiple calls can be made without repeating earlier calls
++// if their parameters have not changed.
++
++#endif // _AES_H
+diff -urN linux-3.14-noloop/drivers/misc/crypto-ksym.c linux-3.14-AES/drivers/misc/crypto-ksym.c
+--- linux-3.14-noloop/drivers/misc/crypto-ksym.c 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/crypto-ksym.c 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,18 @@
++#include <linux/module.h>
++#include "aes.h"
++#include "md5.h"
++EXPORT_SYMBOL(aes_set_key);
++EXPORT_SYMBOL(aes_encrypt);
++EXPORT_SYMBOL(aes_decrypt);
++EXPORT_SYMBOL(md5_transform_CPUbyteorder);
++#if defined(CONFIG_X86_64)
++EXPORT_SYMBOL(md5_transform_CPUbyteorder_2x);
++#endif
++#if defined(CONFIG_BLK_DEV_LOOP_INTELAES) && (defined(CONFIG_X86) || defined(CONFIG_X86_64))
++asmlinkage extern void intel_aes_cbc_encrypt(const aes_context *, void *src, void *dst, size_t len, void *iv);
++asmlinkage extern void intel_aes_cbc_decrypt(const aes_context *, void *src, void *dst, size_t len, void *iv);
++asmlinkage extern void intel_aes_cbc_enc_4x512(aes_context **, void *src, void *dst, void *iv);
++EXPORT_SYMBOL(intel_aes_cbc_encrypt);
++EXPORT_SYMBOL(intel_aes_cbc_decrypt);
++EXPORT_SYMBOL(intel_aes_cbc_enc_4x512);
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/md5-2x-amd64.S linux-3.14-AES/drivers/misc/md5-2x-amd64.S
+--- linux-3.14-noloop/drivers/misc/md5-2x-amd64.S 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/md5-2x-amd64.S 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,223 @@
++//
++// md5-2x-amd64.S
++//
++// Written by Jari Ruusu, October 1 2003
++//
++// Copyright 2003 by Jari Ruusu.
++// Redistribution of this file is permitted under the GNU Public License.
++//
++
++// Modified by Jari Ruusu, June 12 2004
++// - Converted 32 bit x86 code to 64 bit AMD64 code
++
++// Modified by Jari Ruusu, April 11 2010
++// - Added another parallel MD5 transform computation
++
++// A MD5 transform implementation for AMD64 compatible processors.
++// This code does not preserve the rax, rcx, rdx, rsi, rdi or r8-r11
++// registers or the artihmetic status flags. However, the rbx, rbp and
++// r12-r15 registers are preserved across calls.
++
++// void md5_transform_CPUbyteorder_2x(u_int32_t *hashAB, u_int32_t *inA, u_int32_t *inB)
++
++#if defined(USE_UNDERLINE)
++# define md5_transform_CPUbyteorder_2x _md5_transform_CPUbyteorder_2x
++#endif
++#if !defined(ALIGN64BYTES)
++# define ALIGN64BYTES 64
++#endif
++
++ .file "md5-2x-amd64.S"
++ .globl md5_transform_CPUbyteorder_2x
++
++// rdi = pointer to u_int32_t hash[4 + 4] array which is read and written
++// hash[0...3] are for first MD5, hash[4...7] are for second MD5
++// rsi = pointer to u_int32_t in[16] array, first MD5, read only
++// rdx = pointer to u_int32_t in[16] array, second MD5, read only
++
++ .text
++ .align ALIGN64BYTES
++md5_transform_CPUbyteorder_2x:
++ push %rbx
++ push %rbp
++ push %r12
++ push %r13
++ push %r14
++ push %r15
++
++ movl 12(%rdi),%eax ; movl 12+16(%rdi),%ebx
++ movl 8(%rdi),%ecx ; movl 8+16(%rdi),%r13d
++ movl (%rdi),%r8d ; movl 16(%rdi),%r11d
++ movl 4(%rdi),%r9d ; movl 4+16(%rdi),%r12d
++ movl (%rsi),%r10d ; movl (%rdx),%ebp
++ prefetcht0 60(%rsi) ; prefetcht0 60(%rdx)
++ movl %eax,%r15d ; movl %ebx,%r14d
++ xorl %ecx,%eax ; xorl %r13d,%ebx
++
++#define REPEAT1(p1Aw,p1Bw,p2Ax,p2Bx,p3Az,p3Bz,p4c,p5s,p6Nin,p7ANz,p7BNz,p8ANy,p8BNy) \
++ addl $p4c,p1Aw ; addl $p4c,p1Bw ;\
++ andl p2Ax,%eax ; andl p2Bx,%ebx ;\
++ addl %r10d,p1Aw ; addl %ebp,p1Bw ;\
++ xorl p3Az,%eax ; xorl p3Bz,%ebx ;\
++ movl p6Nin*4(%rsi),%r10d ; movl p6Nin*4(%rdx),%ebp ;\
++ addl %eax,p1Aw ; addl %ebx,p1Bw ;\
++ movl p7ANz,%eax ; movl p7BNz,%ebx ;\
++ roll $p5s,p1Aw ; roll $p5s,p1Bw ;\
++ xorl p8ANy,%eax ; xorl p8BNy,%ebx ;\
++ addl p2Ax,p1Aw ; addl p2Bx,p1Bw
++
++ REPEAT1(%r8d,%r11d,%r9d,%r12d,%r15d,%r14d,0xd76aa478,7,1,%ecx,%r13d,%r9d,%r12d)
++ REPEAT1(%r15d,%r14d,%r8d,%r11d,%ecx,%r13d,0xe8c7b756,12,2,%r9d,%r12d,%r8d,%r11d)
++ REPEAT1(%ecx,%r13d,%r15d,%r14d,%r9d,%r12d,0x242070db,17,3,%r8d,%r11d,%r15d,%r14d)
++ REPEAT1(%r9d,%r12d,%ecx,%r13d,%r8d,%r11d,0xc1bdceee,22,4,%r15d,%r14d,%ecx,%r13d)
++ REPEAT1(%r8d,%r11d,%r9d,%r12d,%r15d,%r14d,0xf57c0faf,7,5,%ecx,%r13d,%r9d,%r12d)
++ REPEAT1(%r15d,%r14d,%r8d,%r11d,%ecx,%r13d,0x4787c62a,12,6,%r9d,%r12d,%r8d,%r11d)
++ REPEAT1(%ecx,%r13d,%r15d,%r14d,%r9d,%r12d,0xa8304613,17,7,%r8d,%r11d,%r15d,%r14d)
++ REPEAT1(%r9d,%r12d,%ecx,%r13d,%r8d,%r11d,0xfd469501,22,8,%r15d,%r14d,%ecx,%r13d)
++ REPEAT1(%r8d,%r11d,%r9d,%r12d,%r15d,%r14d,0x698098d8,7,9,%ecx,%r13d,%r9d,%r12d)
++ REPEAT1(%r15d,%r14d,%r8d,%r11d,%ecx,%r13d,0x8b44f7af,12,10,%r9d,%r12d,%r8d,%r11d)
++ REPEAT1(%ecx,%r13d,%r15d,%r14d,%r9d,%r12d,0xffff5bb1,17,11,%r8d,%r11d,%r15d,%r14d)
++ REPEAT1(%r9d,%r12d,%ecx,%r13d,%r8d,%r11d,0x895cd7be,22,12,%r15d,%r14d,%ecx,%r13d)
++ REPEAT1(%r8d,%r11d,%r9d,%r12d,%r15d,%r14d,0x6b901122,7,13,%ecx,%r13d,%r9d,%r12d)
++ REPEAT1(%r15d,%r14d,%r8d,%r11d,%ecx,%r13d,0xfd987193,12,14,%r9d,%r12d,%r8d,%r11d)
++ REPEAT1(%ecx,%r13d,%r15d,%r14d,%r9d,%r12d,0xa679438e,17,15,%r8d,%r11d,%r15d,%r14d)
++
++ addl $0x49b40821,%r9d ; addl $0x49b40821,%r12d
++ andl %ecx,%eax ; andl %r13d,%ebx
++ addl %r10d,%r9d ; addl %ebp,%r12d
++ xorl %r8d,%eax ; xorl %r11d,%ebx
++ movl 1*4(%rsi),%r10d ; movl 1*4(%rdx),%ebp
++ addl %eax,%r9d ; addl %ebx,%r12d
++ movl %ecx,%eax ; movl %r13d,%ebx
++ roll $22,%r9d ; roll $22,%r12d
++ addl %ecx,%r9d ; addl %r13d,%r12d
++
++#define REPEAT2(p1Aw,p1Bw,p2Ax,p2Bx,p3Ay,p3By,p4Az,p4Bz,p5c,p6s,p7Nin,p8ANy,p8BNy) \
++ xorl p2Ax,%eax ; xorl p2Bx,%ebx ;\
++ addl $p5c,p1Aw ; addl $p5c,p1Bw ;\
++ andl p4Az,%eax ; andl p4Bz,%ebx ;\
++ addl %r10d,p1Aw ; addl %ebp,p1Bw ;\
++ xorl p3Ay,%eax ; xorl p3By,%ebx ;\
++ movl p7Nin*4(%rsi),%r10d ; movl p7Nin*4(%rdx),%ebp ;\
++ addl %eax,p1Aw ; addl %ebx,p1Bw ;\
++ movl p8ANy,%eax ; movl p8BNy,%ebx ;\
++ roll $p6s,p1Aw ; roll $p6s,p1Bw ;\
++ addl p2Ax,p1Aw ; addl p2Bx,p1Bw
++
++ REPEAT2(%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,0xf61e2562,5,6,%r9d,%r12d)
++ REPEAT2(%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,0xc040b340,9,11,%r8d,%r11d)
++ REPEAT2(%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,0x265e5a51,14,0,%r15d,%r14d)
++ REPEAT2(%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,0xe9b6c7aa,20,5,%ecx,%r13d)
++ REPEAT2(%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,0xd62f105d,5,10,%r9d,%r12d)
++ REPEAT2(%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,0x02441453,9,15,%r8d,%r11d)
++ REPEAT2(%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,0xd8a1e681,14,4,%r15d,%r14d)
++ REPEAT2(%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,0xe7d3fbc8,20,9,%ecx,%r13d)
++ REPEAT2(%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,0x21e1cde6,5,14,%r9d,%r12d)
++ REPEAT2(%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,0xc33707d6,9,3,%r8d,%r11d)
++ REPEAT2(%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,0xf4d50d87,14,8,%r15d,%r14d)
++ REPEAT2(%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,0x455a14ed,20,13,%ecx,%r13d)
++ REPEAT2(%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,0xa9e3e905,5,2,%r9d,%r12d)
++ REPEAT2(%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,0xfcefa3f8,9,7,%r8d,%r11d)
++ REPEAT2(%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,0x676f02d9,14,12,%r15d,%r14d)
++
++ xorl %ecx,%eax ; xorl %r13d,%ebx
++ addl $0x8d2a4c8a,%r9d ; addl $0x8d2a4c8a,%r12d
++ andl %r8d,%eax ; andl %r11d,%ebx
++ addl %r10d,%r9d ; addl %ebp,%r12d
++ xorl %r15d,%eax ; xorl %r14d,%ebx
++ movl 5*4(%rsi),%r10d ; movl 5*4(%rdx),%ebp
++ addl %eax,%r9d ; addl %ebx,%r12d
++ movl %ecx,%eax ; movl %r13d,%ebx
++ roll $20,%r9d ; roll $20,%r12d
++ xorl %r15d,%eax ; xorl %r14d,%ebx
++ addl %ecx,%r9d ; addl %r13d,%r12d
++
++#define REPEAT3(p1Aw,p1Bw,p2Ax,p2Bx,p3c,p4s,p5Nin,p6ANy,p6BNy,p7ANz,p7BNz) \
++ addl $p3c,p1Aw ; addl $p3c,p1Bw ;\
++ xorl p2Ax,%eax ; xorl p2Bx,%ebx ;\
++ addl %r10d,p1Aw ; addl %ebp,p1Bw ;\
++ movl p5Nin*4(%rsi),%r10d ; movl p5Nin*4(%rdx),%ebp ;\
++ addl %eax,p1Aw ; addl %ebx,p1Bw ;\
++ movl p6ANy,%eax ; movl p6BNy,%ebx ;\
++ roll $p4s,p1Aw ; roll $p4s,p1Bw ;\
++ xorl p7ANz,%eax ; xorl p7BNz,%ebx ;\
++ addl p2Ax,p1Aw ; addl p2Bx,p1Bw
++
++ REPEAT3(%r8d,%r11d,%r9d,%r12d,0xfffa3942,4,8,%r9d,%r12d,%ecx,%r13d)
++ REPEAT3(%r15d,%r14d,%r8d,%r11d,0x8771f681,11,11,%r8d,%r11d,%r9d,%r12d)
++ REPEAT3(%ecx,%r13d,%r15d,%r14d,0x6d9d6122,16,14,%r15d,%r14d,%r8d,%r11d)
++ REPEAT3(%r9d,%r12d,%ecx,%r13d,0xfde5380c,23,1,%ecx,%r13d,%r15d,%r14d)
++ REPEAT3(%r8d,%r11d,%r9d,%r12d,0xa4beea44,4,4,%r9d,%r12d,%ecx,%r13d)
++ REPEAT3(%r15d,%r14d,%r8d,%r11d,0x4bdecfa9,11,7,%r8d,%r11d,%r9d,%r12d)
++ REPEAT3(%ecx,%r13d,%r15d,%r14d,0xf6bb4b60,16,10,%r15d,%r14d,%r8d,%r11d)
++ REPEAT3(%r9d,%r12d,%ecx,%r13d,0xbebfbc70,23,13,%ecx,%r13d,%r15d,%r14d)
++ REPEAT3(%r8d,%r11d,%r9d,%r12d,0x289b7ec6,4,0,%r9d,%r12d,%ecx,%r13d)
++ REPEAT3(%r15d,%r14d,%r8d,%r11d,0xeaa127fa,11,3,%r8d,%r11d,%r9d,%r12d)
++ REPEAT3(%ecx,%r13d,%r15d,%r14d,0xd4ef3085,16,6,%r15d,%r14d,%r8d,%r11d)
++ REPEAT3(%r9d,%r12d,%ecx,%r13d,0x04881d05,23,9,%ecx,%r13d,%r15d,%r14d)
++ REPEAT3(%r8d,%r11d,%r9d,%r12d,0xd9d4d039,4,12,%r9d,%r12d,%ecx,%r13d)
++ REPEAT3(%r15d,%r14d,%r8d,%r11d,0xe6db99e5,11,15,%r8d,%r11d,%r9d,%r12d)
++ REPEAT3(%ecx,%r13d,%r15d,%r14d,0x1fa27cf8,16,2,%r15d,%r14d,%r8d,%r11d)
++
++ addl $0xc4ac5665,%r9d ; addl $0xc4ac5665,%r12d
++ xorl %ecx,%eax ; xorl %r13d,%ebx
++ addl %r10d,%r9d ; addl %ebp,%r12d
++ movl (%rsi),%r10d ; movl (%rdx),%ebp
++ addl %eax,%r9d ; addl %ebx,%r12d
++ movl %r15d,%eax ; movl %r14d,%ebx
++ roll $23,%r9d ; roll $23,%r12d
++ notl %eax ; notl %ebx
++ addl %ecx,%r9d ; addl %r13d,%r12d
++
++#define REPEAT4(p1Aw,p1Bw,p2Ax,p2Bx,p3Ay,p3By,p4c,p5s,p6Nin,p7ANz,p7BNz) \
++ addl $p4c,p1Aw ; addl $p4c,p1Bw ;\
++ orl p2Ax,%eax ; orl p2Bx,%ebx ;\
++ addl %r10d,p1Aw ; addl %ebp,p1Bw ;\
++ xorl p3Ay,%eax ; xorl p3By,%ebx ;\
++ movl p6Nin*4(%rsi),%r10d ; movl p6Nin*4(%rdx),%ebp ;\
++ addl %eax,p1Aw ; addl %ebx,p1Bw ;\
++ movl p7ANz,%eax ; movl p7BNz,%ebx ;\
++ roll $p5s,p1Aw ; roll $p5s,p1Bw ;\
++ notl %eax ; notl %ebx ;\
++ addl p2Ax,p1Aw ; addl p2Bx,p1Bw
++
++ REPEAT4(%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,0xf4292244,6,7,%ecx,%r13d)
++ REPEAT4(%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,0x432aff97,10,14,%r9d,%r12d)
++ REPEAT4(%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,0xab9423a7,15,5,%r8d,%r11d)
++ REPEAT4(%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,0xfc93a039,21,12,%r15d,%r14d)
++ REPEAT4(%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,0x655b59c3,6,3,%ecx,%r13d)
++ REPEAT4(%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,0x8f0ccc92,10,10,%r9d,%r12d)
++ REPEAT4(%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,0xffeff47d,15,1,%r8d,%r11d)
++ REPEAT4(%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,0x85845dd1,21,8,%r15d,%r14d)
++ REPEAT4(%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,0x6fa87e4f,6,15,%ecx,%r13d)
++ REPEAT4(%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,0xfe2ce6e0,10,6,%r9d,%r12d)
++ REPEAT4(%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,0xa3014314,15,13,%r8d,%r11d)
++ REPEAT4(%r9d,%r12d,%ecx,%r13d,%r15d,%r14d,0x4e0811a1,21,4,%r15d,%r14d)
++ REPEAT4(%r8d,%r11d,%r9d,%r12d,%ecx,%r13d,0xf7537e82,6,11,%ecx,%r13d)
++ REPEAT4(%r15d,%r14d,%r8d,%r11d,%r9d,%r12d,0xbd3af235,10,2,%r9d,%r12d)
++ REPEAT4(%ecx,%r13d,%r15d,%r14d,%r8d,%r11d,0x2ad7d2bb,15,9,%r8d,%r11d)
++
++ addl $0xeb86d391,%r9d ; addl $0xeb86d391,%r12d
++ orl %ecx,%eax ; orl %r13d,%ebx
++ addl %r10d,%r9d ; addl %ebp,%r12d
++ xorl %r15d,%eax ; xorl %r14d,%ebx
++ addl %eax,%r9d ; addl %ebx,%r12d
++ roll $21,%r9d ; roll $21,%r12d
++ addl %ecx,%r9d ; addl %r13d,%r12d
++
++ addl %r8d,(%rdi) ; addl %r11d,16(%rdi)
++ addl %r9d,4(%rdi) ; addl %r12d,4+16(%rdi)
++ addl %ecx,8(%rdi) ; addl %r13d,8+16(%rdi)
++ addl %r15d,12(%rdi) ; addl %r14d,12+16(%rdi)
++
++ pop %r15
++ pop %r14
++ pop %r13
++ pop %r12
++ pop %rbp
++ pop %rbx
++ ret
++
++#if defined(__ELF__) && defined(SECTION_NOTE_GNU_STACK)
++ .section .note.GNU-stack,"",@progbits
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/md5-amd64.S linux-3.14-AES/drivers/misc/md5-amd64.S
+--- linux-3.14-noloop/drivers/misc/md5-amd64.S 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/md5-amd64.S 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,204 @@
++//
++// md5-amd64.S
++//
++// Written by Jari Ruusu, October 1 2003
++//
++// Copyright 2003 by Jari Ruusu.
++// Redistribution of this file is permitted under the GNU Public License.
++//
++
++// Modified by Jari Ruusu, June 12 2004
++// - Converted 32 bit x86 code to 64 bit AMD64 code
++
++// A MD5 transform implementation for AMD64 compatible processors.
++// This code does not preserve the rax, rcx, rdx, rsi, rdi or r8-r11
++// registers or the artihmetic status flags. However, the rbx, rbp and
++// r12-r15 registers are preserved across calls.
++
++// void md5_transform_CPUbyteorder(u_int32_t *hash, u_int32_t *in)
++
++#if defined(USE_UNDERLINE)
++# define md5_transform_CPUbyteorder _md5_transform_CPUbyteorder
++#endif
++#if !defined(ALIGN64BYTES)
++# define ALIGN64BYTES 64
++#endif
++
++ .file "md5-amd64.S"
++ .globl md5_transform_CPUbyteorder
++
++// rdi = pointer to hash[4] array which is read and written
++// rsi = pointer to in[16] array which is read only
++
++ .text
++ .align ALIGN64BYTES
++md5_transform_CPUbyteorder:
++ movl 12(%rdi),%eax
++ movl 8(%rdi),%ecx
++ movl (%rdi),%r8d
++ movl 4(%rdi),%r9d
++ movl (%rsi),%r10d
++ prefetcht0 60(%rsi)
++ movl %eax,%edx
++ xorl %ecx,%eax
++
++#define REPEAT1(p1w,p2x,p3z,p4c,p5s,p6Nin,p7Nz,p8Ny) \
++ addl $p4c,p1w ;\
++ andl p2x,%eax ;\
++ addl %r10d,p1w ;\
++ xorl p3z,%eax ;\
++ movl p6Nin*4(%rsi),%r10d ;\
++ addl %eax,p1w ;\
++ movl p7Nz,%eax ;\
++ roll $p5s,p1w ;\
++ xorl p8Ny,%eax ;\
++ addl p2x,p1w
++
++ REPEAT1(%r8d,%r9d,%edx,0xd76aa478, 7, 1,%ecx,%r9d)
++ REPEAT1(%edx,%r8d,%ecx,0xe8c7b756,12, 2,%r9d,%r8d)
++ REPEAT1(%ecx,%edx,%r9d,0x242070db,17, 3,%r8d,%edx)
++ REPEAT1(%r9d,%ecx,%r8d,0xc1bdceee,22, 4,%edx,%ecx)
++ REPEAT1(%r8d,%r9d,%edx,0xf57c0faf, 7, 5,%ecx,%r9d)
++ REPEAT1(%edx,%r8d,%ecx,0x4787c62a,12, 6,%r9d,%r8d)
++ REPEAT1(%ecx,%edx,%r9d,0xa8304613,17, 7,%r8d,%edx)
++ REPEAT1(%r9d,%ecx,%r8d,0xfd469501,22, 8,%edx,%ecx)
++ REPEAT1(%r8d,%r9d,%edx,0x698098d8, 7, 9,%ecx,%r9d)
++ REPEAT1(%edx,%r8d,%ecx,0x8b44f7af,12,10,%r9d,%r8d)
++ REPEAT1(%ecx,%edx,%r9d,0xffff5bb1,17,11,%r8d,%edx)
++ REPEAT1(%r9d,%ecx,%r8d,0x895cd7be,22,12,%edx,%ecx)
++ REPEAT1(%r8d,%r9d,%edx,0x6b901122, 7,13,%ecx,%r9d)
++ REPEAT1(%edx,%r8d,%ecx,0xfd987193,12,14,%r9d,%r8d)
++ REPEAT1(%ecx,%edx,%r9d,0xa679438e,17,15,%r8d,%edx)
++
++ addl $0x49b40821,%r9d
++ andl %ecx,%eax
++ addl %r10d,%r9d
++ xorl %r8d,%eax
++ movl 1*4(%rsi),%r10d
++ addl %eax,%r9d
++ movl %ecx,%eax
++ roll $22,%r9d
++ addl %ecx,%r9d
++
++#define REPEAT2(p1w,p2x,p3y,p4z,p5c,p6s,p7Nin,p8Ny) \
++ xorl p2x,%eax ;\
++ addl $p5c,p1w ;\
++ andl p4z,%eax ;\
++ addl %r10d,p1w ;\
++ xorl p3y,%eax ;\
++ movl p7Nin*4(%rsi),%r10d ;\
++ addl %eax,p1w ;\
++ movl p8Ny,%eax ;\
++ roll $p6s,p1w ;\
++ addl p2x,p1w
++
++ REPEAT2(%r8d,%r9d,%ecx,%edx,0xf61e2562, 5, 6,%r9d)
++ REPEAT2(%edx,%r8d,%r9d,%ecx,0xc040b340, 9,11,%r8d)
++ REPEAT2(%ecx,%edx,%r8d,%r9d,0x265e5a51,14, 0,%edx)
++ REPEAT2(%r9d,%ecx,%edx,%r8d,0xe9b6c7aa,20, 5,%ecx)
++ REPEAT2(%r8d,%r9d,%ecx,%edx,0xd62f105d, 5,10,%r9d)
++ REPEAT2(%edx,%r8d,%r9d,%ecx,0x02441453, 9,15,%r8d)
++ REPEAT2(%ecx,%edx,%r8d,%r9d,0xd8a1e681,14, 4,%edx)
++ REPEAT2(%r9d,%ecx,%edx,%r8d,0xe7d3fbc8,20, 9,%ecx)
++ REPEAT2(%r8d,%r9d,%ecx,%edx,0x21e1cde6, 5,14,%r9d)
++ REPEAT2(%edx,%r8d,%r9d,%ecx,0xc33707d6, 9, 3,%r8d)
++ REPEAT2(%ecx,%edx,%r8d,%r9d,0xf4d50d87,14, 8,%edx)
++ REPEAT2(%r9d,%ecx,%edx,%r8d,0x455a14ed,20,13,%ecx)
++ REPEAT2(%r8d,%r9d,%ecx,%edx,0xa9e3e905, 5, 2,%r9d)
++ REPEAT2(%edx,%r8d,%r9d,%ecx,0xfcefa3f8, 9, 7,%r8d)
++ REPEAT2(%ecx,%edx,%r8d,%r9d,0x676f02d9,14,12,%edx)
++
++ xorl %ecx,%eax
++ addl $0x8d2a4c8a,%r9d
++ andl %r8d,%eax
++ addl %r10d,%r9d
++ xorl %edx,%eax
++ movl 5*4(%rsi),%r10d
++ addl %eax,%r9d
++ movl %ecx,%eax
++ roll $20,%r9d
++ xorl %edx,%eax
++ addl %ecx,%r9d
++
++#define REPEAT3(p1w,p2x,p3c,p4s,p5Nin,p6Ny,p7Nz) \
++ addl $p3c,p1w ;\
++ xorl p2x,%eax ;\
++ addl %r10d,p1w ;\
++ movl p5Nin*4(%rsi),%r10d ;\
++ addl %eax,p1w ;\
++ movl p6Ny,%eax ;\
++ roll $p4s,p1w ;\
++ xorl p7Nz,%eax ;\
++ addl p2x,p1w
++
++ REPEAT3(%r8d,%r9d,0xfffa3942, 4, 8,%r9d,%ecx)
++ REPEAT3(%edx,%r8d,0x8771f681,11,11,%r8d,%r9d)
++ REPEAT3(%ecx,%edx,0x6d9d6122,16,14,%edx,%r8d)
++ REPEAT3(%r9d,%ecx,0xfde5380c,23, 1,%ecx,%edx)
++ REPEAT3(%r8d,%r9d,0xa4beea44, 4, 4,%r9d,%ecx)
++ REPEAT3(%edx,%r8d,0x4bdecfa9,11, 7,%r8d,%r9d)
++ REPEAT3(%ecx,%edx,0xf6bb4b60,16,10,%edx,%r8d)
++ REPEAT3(%r9d,%ecx,0xbebfbc70,23,13,%ecx,%edx)
++ REPEAT3(%r8d,%r9d,0x289b7ec6, 4, 0,%r9d,%ecx)
++ REPEAT3(%edx,%r8d,0xeaa127fa,11, 3,%r8d,%r9d)
++ REPEAT3(%ecx,%edx,0xd4ef3085,16, 6,%edx,%r8d)
++ REPEAT3(%r9d,%ecx,0x04881d05,23, 9,%ecx,%edx)
++ REPEAT3(%r8d,%r9d,0xd9d4d039, 4,12,%r9d,%ecx)
++ REPEAT3(%edx,%r8d,0xe6db99e5,11,15,%r8d,%r9d)
++ REPEAT3(%ecx,%edx,0x1fa27cf8,16, 2,%edx,%r8d)
++
++ addl $0xc4ac5665,%r9d
++ xorl %ecx,%eax
++ addl %r10d,%r9d
++ movl (%rsi),%r10d
++ addl %eax,%r9d
++ movl %edx,%eax
++ roll $23,%r9d
++ notl %eax
++ addl %ecx,%r9d
++
++#define REPEAT4(p1w,p2x,p3y,p4c,p5s,p6Nin,p7Nz) \
++ addl $p4c,p1w ;\
++ orl p2x,%eax ;\
++ addl %r10d,p1w ;\
++ xorl p3y,%eax ;\
++ movl p6Nin*4(%rsi),%r10d ;\
++ addl %eax,p1w ;\
++ movl p7Nz,%eax ;\
++ roll $p5s,p1w ;\
++ notl %eax ;\
++ addl p2x,p1w
++
++ REPEAT4(%r8d,%r9d,%ecx,0xf4292244, 6, 7,%ecx)
++ REPEAT4(%edx,%r8d,%r9d,0x432aff97,10,14,%r9d)
++ REPEAT4(%ecx,%edx,%r8d,0xab9423a7,15, 5,%r8d)
++ REPEAT4(%r9d,%ecx,%edx,0xfc93a039,21,12,%edx)
++ REPEAT4(%r8d,%r9d,%ecx,0x655b59c3, 6, 3,%ecx)
++ REPEAT4(%edx,%r8d,%r9d,0x8f0ccc92,10,10,%r9d)
++ REPEAT4(%ecx,%edx,%r8d,0xffeff47d,15, 1,%r8d)
++ REPEAT4(%r9d,%ecx,%edx,0x85845dd1,21, 8,%edx)
++ REPEAT4(%r8d,%r9d,%ecx,0x6fa87e4f, 6,15,%ecx)
++ REPEAT4(%edx,%r8d,%r9d,0xfe2ce6e0,10, 6,%r9d)
++ REPEAT4(%ecx,%edx,%r8d,0xa3014314,15,13,%r8d)
++ REPEAT4(%r9d,%ecx,%edx,0x4e0811a1,21, 4,%edx)
++ REPEAT4(%r8d,%r9d,%ecx,0xf7537e82, 6,11,%ecx)
++ REPEAT4(%edx,%r8d,%r9d,0xbd3af235,10, 2,%r9d)
++ REPEAT4(%ecx,%edx,%r8d,0x2ad7d2bb,15, 9,%r8d)
++
++ addl $0xeb86d391,%r9d
++ orl %ecx,%eax
++ addl %r10d,%r9d
++ xorl %edx,%eax
++ addl %eax,%r9d
++ roll $21,%r9d
++ addl %ecx,%r9d
++
++ addl %r8d,(%rdi)
++ addl %r9d,4(%rdi)
++ addl %ecx,8(%rdi)
++ addl %edx,12(%rdi)
++ ret
++
++#if defined(__ELF__) && defined(SECTION_NOTE_GNU_STACK)
++ .section .note.GNU-stack,"",@progbits
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/md5-x86.S linux-3.14-AES/drivers/misc/md5-x86.S
+--- linux-3.14-noloop/drivers/misc/md5-x86.S 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/md5-x86.S 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,211 @@
++//
++// md5-x86.S
++//
++// Written by Jari Ruusu, October 1 2003
++//
++// Copyright 2003 by Jari Ruusu.
++// Redistribution of this file is permitted under the GNU Public License.
++//
++
++// A MD5 transform implementation for x86 compatible processors. This
++// version uses i386 instruction set but instruction scheduling is optimized
++// for Pentium-2. This code does not preserve the eax, ecx or edx registers
++// or the artihmetic status flags. However, the ebx, esi, edi, and ebp
++// registers are preserved across calls.
++
++// void md5_transform_CPUbyteorder(u_int32_t *hash, u_int32_t *in)
++
++#if defined(USE_UNDERLINE)
++# define md5_transform_CPUbyteorder _md5_transform_CPUbyteorder
++#endif
++#if !defined(ALIGN32BYTES)
++# define ALIGN32BYTES 32
++#endif
++
++ .file "md5-x86.S"
++ .globl md5_transform_CPUbyteorder
++ .text
++ .align ALIGN32BYTES
++
++md5_transform_CPUbyteorder:
++ push %ebp
++ mov 4+4(%esp),%eax // pointer to 'hash' input
++ mov 8+4(%esp),%ebp // pointer to 'in' array
++ push %ebx
++ push %esi
++ push %edi
++
++ mov (%eax),%esi
++ mov 4(%eax),%edi
++ mov 8(%eax),%ecx
++ mov 12(%eax),%eax
++ mov (%ebp),%ebx
++ mov %eax,%edx
++ xor %ecx,%eax
++
++#define REPEAT1(p1w,p2x,p3z,p4c,p5s,p6Nin,p7Nz,p8Ny) \
++ add $p4c,p1w ;\
++ and p2x,%eax ;\
++ add %ebx,p1w ;\
++ xor p3z,%eax ;\
++ mov p6Nin*4(%ebp),%ebx ;\
++ add %eax,p1w ;\
++ mov p7Nz,%eax ;\
++ rol $p5s,p1w ;\
++ xor p8Ny,%eax ;\
++ add p2x,p1w
++
++ REPEAT1(%esi,%edi,%edx,0xd76aa478, 7, 1,%ecx,%edi)
++ REPEAT1(%edx,%esi,%ecx,0xe8c7b756,12, 2,%edi,%esi)
++ REPEAT1(%ecx,%edx,%edi,0x242070db,17, 3,%esi,%edx)
++ REPEAT1(%edi,%ecx,%esi,0xc1bdceee,22, 4,%edx,%ecx)
++ REPEAT1(%esi,%edi,%edx,0xf57c0faf, 7, 5,%ecx,%edi)
++ REPEAT1(%edx,%esi,%ecx,0x4787c62a,12, 6,%edi,%esi)
++ REPEAT1(%ecx,%edx,%edi,0xa8304613,17, 7,%esi,%edx)
++ REPEAT1(%edi,%ecx,%esi,0xfd469501,22, 8,%edx,%ecx)
++ REPEAT1(%esi,%edi,%edx,0x698098d8, 7, 9,%ecx,%edi)
++ REPEAT1(%edx,%esi,%ecx,0x8b44f7af,12,10,%edi,%esi)
++ REPEAT1(%ecx,%edx,%edi,0xffff5bb1,17,11,%esi,%edx)
++ REPEAT1(%edi,%ecx,%esi,0x895cd7be,22,12,%edx,%ecx)
++ REPEAT1(%esi,%edi,%edx,0x6b901122, 7,13,%ecx,%edi)
++ REPEAT1(%edx,%esi,%ecx,0xfd987193,12,14,%edi,%esi)
++ REPEAT1(%ecx,%edx,%edi,0xa679438e,17,15,%esi,%edx)
++
++ add $0x49b40821,%edi
++ and %ecx,%eax
++ add %ebx,%edi
++ xor %esi,%eax
++ mov 1*4(%ebp),%ebx
++ add %eax,%edi
++ mov %ecx,%eax
++ rol $22,%edi
++ add %ecx,%edi
++
++#define REPEAT2(p1w,p2x,p3y,p4z,p5c,p6s,p7Nin,p8Ny) \
++ xor p2x,%eax ;\
++ add $p5c,p1w ;\
++ and p4z,%eax ;\
++ add %ebx,p1w ;\
++ xor p3y,%eax ;\
++ mov p7Nin*4(%ebp),%ebx ;\
++ add %eax,p1w ;\
++ mov p8Ny,%eax ;\
++ rol $p6s,p1w ;\
++ add p2x,p1w
++
++ REPEAT2(%esi,%edi,%ecx,%edx,0xf61e2562, 5, 6,%edi)
++ REPEAT2(%edx,%esi,%edi,%ecx,0xc040b340, 9,11,%esi)
++ REPEAT2(%ecx,%edx,%esi,%edi,0x265e5a51,14, 0,%edx)
++ REPEAT2(%edi,%ecx,%edx,%esi,0xe9b6c7aa,20, 5,%ecx)
++ REPEAT2(%esi,%edi,%ecx,%edx,0xd62f105d, 5,10,%edi)
++ REPEAT2(%edx,%esi,%edi,%ecx,0x02441453, 9,15,%esi)
++ REPEAT2(%ecx,%edx,%esi,%edi,0xd8a1e681,14, 4,%edx)
++ REPEAT2(%edi,%ecx,%edx,%esi,0xe7d3fbc8,20, 9,%ecx)
++ REPEAT2(%esi,%edi,%ecx,%edx,0x21e1cde6, 5,14,%edi)
++ REPEAT2(%edx,%esi,%edi,%ecx,0xc33707d6, 9, 3,%esi)
++ REPEAT2(%ecx,%edx,%esi,%edi,0xf4d50d87,14, 8,%edx)
++ REPEAT2(%edi,%ecx,%edx,%esi,0x455a14ed,20,13,%ecx)
++ REPEAT2(%esi,%edi,%ecx,%edx,0xa9e3e905, 5, 2,%edi)
++ REPEAT2(%edx,%esi,%edi,%ecx,0xfcefa3f8, 9, 7,%esi)
++ REPEAT2(%ecx,%edx,%esi,%edi,0x676f02d9,14,12,%edx)
++
++ xor %ecx,%eax
++ add $0x8d2a4c8a,%edi
++ and %esi,%eax
++ add %ebx,%edi
++ xor %edx,%eax
++ mov 5*4(%ebp),%ebx
++ add %eax,%edi
++ mov %ecx,%eax
++ rol $20,%edi
++ xor %edx,%eax
++ add %ecx,%edi
++
++#define REPEAT3(p1w,p2x,p3c,p4s,p5Nin,p6Ny,p7Nz) \
++ add $p3c,p1w ;\
++ xor p2x,%eax ;\
++ add %ebx,p1w ;\
++ mov p5Nin*4(%ebp),%ebx ;\
++ add %eax,p1w ;\
++ mov p6Ny,%eax ;\
++ rol $p4s,p1w ;\
++ xor p7Nz,%eax ;\
++ add p2x,p1w
++
++ REPEAT3(%esi,%edi,0xfffa3942, 4, 8,%edi,%ecx)
++ REPEAT3(%edx,%esi,0x8771f681,11,11,%esi,%edi)
++ REPEAT3(%ecx,%edx,0x6d9d6122,16,14,%edx,%esi)
++ REPEAT3(%edi,%ecx,0xfde5380c,23, 1,%ecx,%edx)
++ REPEAT3(%esi,%edi,0xa4beea44, 4, 4,%edi,%ecx)
++ REPEAT3(%edx,%esi,0x4bdecfa9,11, 7,%esi,%edi)
++ REPEAT3(%ecx,%edx,0xf6bb4b60,16,10,%edx,%esi)
++ REPEAT3(%edi,%ecx,0xbebfbc70,23,13,%ecx,%edx)
++ REPEAT3(%esi,%edi,0x289b7ec6, 4, 0,%edi,%ecx)
++ REPEAT3(%edx,%esi,0xeaa127fa,11, 3,%esi,%edi)
++ REPEAT3(%ecx,%edx,0xd4ef3085,16, 6,%edx,%esi)
++ REPEAT3(%edi,%ecx,0x04881d05,23, 9,%ecx,%edx)
++ REPEAT3(%esi,%edi,0xd9d4d039, 4,12,%edi,%ecx)
++ REPEAT3(%edx,%esi,0xe6db99e5,11,15,%esi,%edi)
++ REPEAT3(%ecx,%edx,0x1fa27cf8,16, 2,%edx,%esi)
++
++ add $0xc4ac5665,%edi
++ xor %ecx,%eax
++ add %ebx,%edi
++ mov (%ebp),%ebx
++ add %eax,%edi
++ mov %edx,%eax
++ rol $23,%edi
++ not %eax
++ add %ecx,%edi
++
++#define REPEAT4(p1w,p2x,p3y,p4c,p5s,p6Nin,p7Nz) \
++ add $p4c,p1w ;\
++ or p2x,%eax ;\
++ add %ebx,p1w ;\
++ xor p3y,%eax ;\
++ mov p6Nin*4(%ebp),%ebx ;\
++ add %eax,p1w ;\
++ mov p7Nz,%eax ;\
++ rol $p5s,p1w ;\
++ not %eax ;\
++ add p2x,p1w
++
++ REPEAT4(%esi,%edi,%ecx,0xf4292244, 6, 7,%ecx)
++ REPEAT4(%edx,%esi,%edi,0x432aff97,10,14,%edi)
++ REPEAT4(%ecx,%edx,%esi,0xab9423a7,15, 5,%esi)
++ REPEAT4(%edi,%ecx,%edx,0xfc93a039,21,12,%edx)
++ REPEAT4(%esi,%edi,%ecx,0x655b59c3, 6, 3,%ecx)
++ REPEAT4(%edx,%esi,%edi,0x8f0ccc92,10,10,%edi)
++ REPEAT4(%ecx,%edx,%esi,0xffeff47d,15, 1,%esi)
++ REPEAT4(%edi,%ecx,%edx,0x85845dd1,21, 8,%edx)
++ REPEAT4(%esi,%edi,%ecx,0x6fa87e4f, 6,15,%ecx)
++ REPEAT4(%edx,%esi,%edi,0xfe2ce6e0,10, 6,%edi)
++ REPEAT4(%ecx,%edx,%esi,0xa3014314,15,13,%esi)
++ REPEAT4(%edi,%ecx,%edx,0x4e0811a1,21, 4,%edx)
++ REPEAT4(%esi,%edi,%ecx,0xf7537e82, 6,11,%ecx)
++ REPEAT4(%edx,%esi,%edi,0xbd3af235,10, 2,%edi)
++ REPEAT4(%ecx,%edx,%esi,0x2ad7d2bb,15, 9,%esi)
++
++ add $0xeb86d391,%edi
++ or %ecx,%eax
++ add %ebx,%edi
++ xor %edx,%eax
++ mov 4+16(%esp),%ebp // pointer to 'hash' output
++ add %eax,%edi
++ rol $21,%edi
++ add %ecx,%edi
++
++ add %esi,(%ebp)
++ add %edi,4(%ebp)
++ add %ecx,8(%ebp)
++ add %edx,12(%ebp)
++
++ pop %edi
++ pop %esi
++ pop %ebx
++ pop %ebp
++ ret
++
++#if defined(__ELF__) && defined(SECTION_NOTE_GNU_STACK)
++ .section .note.GNU-stack,"",@progbits
++#endif
+diff -urN linux-3.14-noloop/drivers/misc/md5.c linux-3.14-AES/drivers/misc/md5.c
+--- linux-3.14-noloop/drivers/misc/md5.c 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/md5.c 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,106 @@
++/*
++ * MD5 Message Digest Algorithm (RFC1321).
++ *
++ * Derived from cryptoapi implementation, originally based on the
++ * public domain implementation written by Colin Plumb in 1993.
++ *
++ * Copyright (c) Cryptoapi developers.
++ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ */
++
++#include "md5.h"
++
++#define MD5_F1(x, y, z) (z ^ (x & (y ^ z)))
++#define MD5_F2(x, y, z) MD5_F1(z, x, y)
++#define MD5_F3(x, y, z) (x ^ y ^ z)
++#define MD5_F4(x, y, z) (y ^ (x | ~z))
++#define MD5_STEP(f, w, x, y, z, in, s) \
++ (w += f(x, y, z) + in, w = (w<<s | w>>(32-s)) + x)
++
++void md5_transform_CPUbyteorder(u_int32_t *hash, u_int32_t const *in)
++{
++ u_int32_t a, b, c, d;
++
++ a = hash[0];
++ b = hash[1];
++ c = hash[2];
++ d = hash[3];
++
++ MD5_STEP(MD5_F1, a, b, c, d, in[0] + 0xd76aa478, 7);
++ MD5_STEP(MD5_F1, d, a, b, c, in[1] + 0xe8c7b756, 12);
++ MD5_STEP(MD5_F1, c, d, a, b, in[2] + 0x242070db, 17);
++ MD5_STEP(MD5_F1, b, c, d, a, in[3] + 0xc1bdceee, 22);
++ MD5_STEP(MD5_F1, a, b, c, d, in[4] + 0xf57c0faf, 7);
++ MD5_STEP(MD5_F1, d, a, b, c, in[5] + 0x4787c62a, 12);
++ MD5_STEP(MD5_F1, c, d, a, b, in[6] + 0xa8304613, 17);
++ MD5_STEP(MD5_F1, b, c, d, a, in[7] + 0xfd469501, 22);
++ MD5_STEP(MD5_F1, a, b, c, d, in[8] + 0x698098d8, 7);
++ MD5_STEP(MD5_F1, d, a, b, c, in[9] + 0x8b44f7af, 12);
++ MD5_STEP(MD5_F1, c, d, a, b, in[10] + 0xffff5bb1, 17);
++ MD5_STEP(MD5_F1, b, c, d, a, in[11] + 0x895cd7be, 22);
++ MD5_STEP(MD5_F1, a, b, c, d, in[12] + 0x6b901122, 7);
++ MD5_STEP(MD5_F1, d, a, b, c, in[13] + 0xfd987193, 12);
++ MD5_STEP(MD5_F1, c, d, a, b, in[14] + 0xa679438e, 17);
++ MD5_STEP(MD5_F1, b, c, d, a, in[15] + 0x49b40821, 22);
++
++ MD5_STEP(MD5_F2, a, b, c, d, in[1] + 0xf61e2562, 5);
++ MD5_STEP(MD5_F2, d, a, b, c, in[6] + 0xc040b340, 9);
++ MD5_STEP(MD5_F2, c, d, a, b, in[11] + 0x265e5a51, 14);
++ MD5_STEP(MD5_F2, b, c, d, a, in[0] + 0xe9b6c7aa, 20);
++ MD5_STEP(MD5_F2, a, b, c, d, in[5] + 0xd62f105d, 5);
++ MD5_STEP(MD5_F2, d, a, b, c, in[10] + 0x02441453, 9);
++ MD5_STEP(MD5_F2, c, d, a, b, in[15] + 0xd8a1e681, 14);
++ MD5_STEP(MD5_F2, b, c, d, a, in[4] + 0xe7d3fbc8, 20);
++ MD5_STEP(MD5_F2, a, b, c, d, in[9] + 0x21e1cde6, 5);
++ MD5_STEP(MD5_F2, d, a, b, c, in[14] + 0xc33707d6, 9);
++ MD5_STEP(MD5_F2, c, d, a, b, in[3] + 0xf4d50d87, 14);
++ MD5_STEP(MD5_F2, b, c, d, a, in[8] + 0x455a14ed, 20);
++ MD5_STEP(MD5_F2, a, b, c, d, in[13] + 0xa9e3e905, 5);
++ MD5_STEP(MD5_F2, d, a, b, c, in[2] + 0xfcefa3f8, 9);
++ MD5_STEP(MD5_F2, c, d, a, b, in[7] + 0x676f02d9, 14);
++ MD5_STEP(MD5_F2, b, c, d, a, in[12] + 0x8d2a4c8a, 20);
++
++ MD5_STEP(MD5_F3, a, b, c, d, in[5] + 0xfffa3942, 4);
++ MD5_STEP(MD5_F3, d, a, b, c, in[8] + 0x8771f681, 11);
++ MD5_STEP(MD5_F3, c, d, a, b, in[11] + 0x6d9d6122, 16);
++ MD5_STEP(MD5_F3, b, c, d, a, in[14] + 0xfde5380c, 23);
++ MD5_STEP(MD5_F3, a, b, c, d, in[1] + 0xa4beea44, 4);
++ MD5_STEP(MD5_F3, d, a, b, c, in[4] + 0x4bdecfa9, 11);
++ MD5_STEP(MD5_F3, c, d, a, b, in[7] + 0xf6bb4b60, 16);
++ MD5_STEP(MD5_F3, b, c, d, a, in[10] + 0xbebfbc70, 23);
++ MD5_STEP(MD5_F3, a, b, c, d, in[13] + 0x289b7ec6, 4);
++ MD5_STEP(MD5_F3, d, a, b, c, in[0] + 0xeaa127fa, 11);
++ MD5_STEP(MD5_F3, c, d, a, b, in[3] + 0xd4ef3085, 16);
++ MD5_STEP(MD5_F3, b, c, d, a, in[6] + 0x04881d05, 23);
++ MD5_STEP(MD5_F3, a, b, c, d, in[9] + 0xd9d4d039, 4);
++ MD5_STEP(MD5_F3, d, a, b, c, in[12] + 0xe6db99e5, 11);
++ MD5_STEP(MD5_F3, c, d, a, b, in[15] + 0x1fa27cf8, 16);
++ MD5_STEP(MD5_F3, b, c, d, a, in[2] + 0xc4ac5665, 23);
++
++ MD5_STEP(MD5_F4, a, b, c, d, in[0] + 0xf4292244, 6);
++ MD5_STEP(MD5_F4, d, a, b, c, in[7] + 0x432aff97, 10);
++ MD5_STEP(MD5_F4, c, d, a, b, in[14] + 0xab9423a7, 15);
++ MD5_STEP(MD5_F4, b, c, d, a, in[5] + 0xfc93a039, 21);
++ MD5_STEP(MD5_F4, a, b, c, d, in[12] + 0x655b59c3, 6);
++ MD5_STEP(MD5_F4, d, a, b, c, in[3] + 0x8f0ccc92, 10);
++ MD5_STEP(MD5_F4, c, d, a, b, in[10] + 0xffeff47d, 15);
++ MD5_STEP(MD5_F4, b, c, d, a, in[1] + 0x85845dd1, 21);
++ MD5_STEP(MD5_F4, a, b, c, d, in[8] + 0x6fa87e4f, 6);
++ MD5_STEP(MD5_F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10);
++ MD5_STEP(MD5_F4, c, d, a, b, in[6] + 0xa3014314, 15);
++ MD5_STEP(MD5_F4, b, c, d, a, in[13] + 0x4e0811a1, 21);
++ MD5_STEP(MD5_F4, a, b, c, d, in[4] + 0xf7537e82, 6);
++ MD5_STEP(MD5_F4, d, a, b, c, in[11] + 0xbd3af235, 10);
++ MD5_STEP(MD5_F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15);
++ MD5_STEP(MD5_F4, b, c, d, a, in[9] + 0xeb86d391, 21);
++
++ hash[0] += a;
++ hash[1] += b;
++ hash[2] += c;
++ hash[3] += d;
++}
+diff -urN linux-3.14-noloop/drivers/misc/md5.h linux-3.14-AES/drivers/misc/md5.h
+--- linux-3.14-noloop/drivers/misc/md5.h 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/drivers/misc/md5.h 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,15 @@
++/* md5.h */
++
++#include <linux/types.h>
++#include <linux/linkage.h>
++#include <linux/module.h>
++
++#if defined(CONFIG_X86) || defined(CONFIG_X86_64)
++ asmlinkage
++#endif
++extern void md5_transform_CPUbyteorder(u_int32_t *, u_int32_t const *);
++
++#if defined(CONFIG_X86) || defined(CONFIG_X86_64)
++ asmlinkage
++#endif
++extern void md5_transform_CPUbyteorder_2x(u_int32_t *, u_int32_t const *, u_int32_t const *);
+diff -urN linux-3.14-noloop/include/linux/loop.h linux-3.14-AES/include/linux/loop.h
+--- linux-3.14-noloop/include/linux/loop.h 1970-01-01 02:00:00.000000000 +0200
++++ linux-3.14-AES/include/linux/loop.h 2014-03-31 22:20:36.000000000 +0300
+@@ -0,0 +1,171 @@
++#ifndef _LINUX_LOOP_H
++#define _LINUX_LOOP_H
++
++/*
++ * include/linux/loop.h
++ *
++ * Written by Theodore Ts'o, 3/29/93.
++ *
++ * Copyright 1993 by Theodore Ts'o. Redistribution of this file is
++ * permitted under the GNU General Public License.
++ */
++
++#define LO_NAME_SIZE 64
++#define LO_KEY_SIZE 32
++
++#ifdef __KERNEL__
++#include <linux/version.h>
++#include <linux/bio.h>
++#include <linux/blkdev.h>
++#include <linux/module.h>
++#include <linux/spinlock.h>
++
++struct loop_func_table;
++
++struct loop_device {
++ int lo_number;
++ int lo_refcnt;
++ loff_t lo_offset;
++ loff_t lo_sizelimit;
++ int lo_flags;
++ int (*transfer)(struct loop_device *, int cmd,
++ char *raw_buf, char *loop_buf, int size,
++ sector_t real_block);
++ struct loop_func_table *lo_encryption;
++ char lo_file_name[LO_NAME_SIZE];
++ char lo_crypt_name[LO_NAME_SIZE];
++ char lo_encrypt_key[LO_KEY_SIZE];
++ int lo_encrypt_key_size;
++#if LINUX_VERSION_CODE >= 0x30600
++ kuid_t lo_key_owner; /* Who set the key */
++#else
++ uid_t lo_key_owner; /* Who set the key */
++#endif
++ __u32 lo_init[2];
++ int (*ioctl)(struct loop_device *, int cmd,
++ unsigned long arg);
++
++ struct file * lo_backing_file;
++ struct block_device *lo_device;
++ void *key_data;
++
++ int old_gfp_mask;
++
++ spinlock_t lo_lock;
++ struct completion lo_done;
++ atomic_t lo_pending;
++
++ struct request_queue *lo_queue;
++
++ struct bio *lo_bio_que0;
++ struct bio *lo_bio_free0;
++ struct bio *lo_bio_free1;
++ int lo_bio_flshMax;
++ int lo_bio_flshCnt;
++ wait_queue_head_t lo_bio_wait;
++ wait_queue_head_t lo_buf_wait;
++ sector_t lo_offs_sec;
++ sector_t lo_iv_remove;
++ spinlock_t lo_ioctl_spin;
++ int lo_ioctl_busy;
++ wait_queue_head_t lo_ioctl_wait;
++ struct request_queue *lo_backingQueue;
++#ifdef CONFIG_BLK_DEV_LOOP_KEYSCRUB
++ void (*lo_keyscrub_fn)(void *);
++ void *lo_keyscrub_ptr;
++#endif
++};
++
++#endif /* __KERNEL__ */
++
++/*
++ * Loop flags
++ */
++#define LO_FLAGS_DO_BMAP 1
++#define LO_FLAGS_READ_ONLY 2
++
++#include <asm/posix_types.h> /* for __kernel_old_dev_t */
++#include <asm/types.h> /* for __u64 */
++
++/* Backwards compatibility version */
++struct loop_info {
++ int lo_number; /* ioctl r/o */
++ __kernel_old_dev_t lo_device; /* ioctl r/o */
++ unsigned long lo_inode; /* ioctl r/o */
++ __kernel_old_dev_t lo_rdevice; /* ioctl r/o */
++ int lo_offset;
++ int lo_encrypt_type;
++ int lo_encrypt_key_size; /* ioctl w/o */
++ int lo_flags; /* ioctl r/o */
++ char lo_name[LO_NAME_SIZE];
++ unsigned char lo_encrypt_key[LO_KEY_SIZE]; /* ioctl w/o */
++ unsigned long lo_init[2];
++ char reserved[4];
++};
++
++struct loop_info64 {
++ __u64 lo_device; /* ioctl r/o */
++ __u64 lo_inode; /* ioctl r/o */
++ __u64 lo_rdevice; /* ioctl r/o */
++ __u64 lo_offset;
++ __u64 lo_sizelimit;/* bytes, 0 == max available */
++ __u32 lo_number; /* ioctl r/o */
++ __u32 lo_encrypt_type;
++ __u32 lo_encrypt_key_size; /* ioctl w/o */
++ __u32 lo_flags; /* ioctl r/o */
++ __u8 lo_file_name[LO_NAME_SIZE];
++ __u8 lo_crypt_name[LO_NAME_SIZE];
++ __u8 lo_encrypt_key[LO_KEY_SIZE]; /* ioctl w/o */
++ __u64 lo_init[2];
++};
++
++/*
++ * Loop filter types
++ */
++
++#define LO_CRYPT_NONE 0
++#define LO_CRYPT_XOR 1
++#define LO_CRYPT_DES 2
++#define LO_CRYPT_FISH2 3 /* Twofish encryption */
++#define LO_CRYPT_BLOW 4
++#define LO_CRYPT_CAST128 5
++#define LO_CRYPT_IDEA 6
++#define LO_CRYPT_DUMMY 9
++#define LO_CRYPT_SKIPJACK 10
++#define LO_CRYPT_AES 16
++#define LO_CRYPT_CRYPTOAPI 18
++#define MAX_LO_CRYPT 20
++
++#ifdef __KERNEL__
++/* Support for loadable transfer modules */
++struct loop_func_table {
++ int number; /* filter type */
++ int (*transfer)(struct loop_device *lo, int cmd, char *raw_buf,
++ char *loop_buf, int size, sector_t real_block);
++ int (*init)(struct loop_device *, struct loop_info64 *);
++ /* release is called from loop_unregister_transfer or clr_fd */
++ int (*release)(struct loop_device *);
++ int (*ioctl)(struct loop_device *, int cmd, unsigned long arg);
++ struct module *owner;
++};
++
++int loop_register_transfer(struct loop_func_table *funcs);
++int loop_unregister_transfer(int number);
++
++#endif
++/*
++ * IOCTL commands --- we will commandeer 0x4C ('L')
++ */
++
++#define LOOP_SET_FD 0x4C00
++#define LOOP_CLR_FD 0x4C01
++#define LOOP_SET_STATUS 0x4C02
++#define LOOP_GET_STATUS 0x4C03
++#define LOOP_SET_STATUS64 0x4C04
++#define LOOP_GET_STATUS64 0x4C05
++#define LOOP_CHANGE_FD 0x4C06
++
++#define LOOP_MULTI_KEY_SETUP 0x4C4D
++#define LOOP_MULTI_KEY_SETUP_V3 0x4C4E
++#define LOOP_RECOMPUTE_DEV_SIZE 0x4C52
++#endif
diff --git a/tools-hardened/desktop/files/3.14.2-hardened-r1.config b/tools-hardened/desktop/files/3.14.2-hardened-r1.config
new file mode 100644
index 0000000..5b10d1a
--- /dev/null
+++ b/tools-hardened/desktop/files/3.14.2-hardened-r1.config
@@ -0,0 +1,3237 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/x86 3.14.2-hardened Kernel Configuration
+#
+CONFIG_64BIT=y
+CONFIG_X86_64=y
+CONFIG_X86=y
+CONFIG_INSTRUCTION_DECODER=y
+CONFIG_OUTPUT_FORMAT="elf64-x86-64"
+CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_MMU=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_HAS_CPU_RELAX=y
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_ARCH_HAS_CPU_AUTOPROBE=y
+CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
+CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
+CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
+CONFIG_ZONE_DMA32=y
+CONFIG_AUDIT_ARCH=y
+CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_X86_64_SMP=y
+CONFIG_X86_HT=y
+CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11"
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_IRQ_WORK=y
+CONFIG_BUILDTIME_EXTABLE_SORT=y
+
+#
+# General setup
+#
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+# CONFIG_COMPILE_TEST is not set
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_XZ=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_HAVE_KERNEL_LZ4=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_BZIP2 is not set
+CONFIG_KERNEL_LZMA=y
+# CONFIG_KERNEL_XZ is not set
+# CONFIG_KERNEL_LZO is not set
+# CONFIG_KERNEL_LZ4 is not set
+CONFIG_DEFAULT_HOSTNAME="(none)"
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_FHANDLE=y
+# CONFIG_AUDIT is not set
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PENDING_IRQ=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_CLOCKSOURCE_WATCHDOG=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+
+#
+# Timers subsystem
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ_COMMON=y
+# CONFIG_HZ_PERIODIC is not set
+CONFIG_NO_HZ_IDLE=y
+# CONFIG_NO_HZ_FULL is not set
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
+# CONFIG_IRQ_TIME_ACCOUNTING is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_PREEMPT_RCU=y
+CONFIG_PREEMPT_RCU=y
+CONFIG_RCU_STALL_COMMON=y
+# CONFIG_RCU_USER_QS is not set
+CONFIG_RCU_FANOUT=64
+CONFIG_RCU_FANOUT_LEAF=16
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_RCU_FAST_NO_HZ is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_RCU_BOOST is not set
+# CONFIG_RCU_NOCB_CPU is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=20
+CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
+CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
+CONFIG_ARCH_SUPPORTS_INT128=y
+CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+# CONFIG_CGROUP_FREEZER is not set
+# CONFIG_CGROUP_DEVICE is not set
+# CONFIG_CPUSETS is not set
+# CONFIG_CGROUP_CPUACCT is not set
+# CONFIG_RESOURCE_COUNTERS is not set
+# CONFIG_CGROUP_PERF is not set
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_CFS_BANDWIDTH is not set
+# CONFIG_RT_GROUP_SCHED is not set
+# CONFIG_BLK_CGROUP is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_SCHED_AUTOGROUP=y
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_RD_LZ4=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_HAVE_UID16=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_HAVE_PCSPKR_PLATFORM=y
+# CONFIG_EXPERT is not set
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_PCSPKR_PLATFORM=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_PCI_QUIRKS=y
+# CONFIG_EMBEDDED is not set
+CONFIG_HAVE_PERF_EVENTS=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_OPROFILE_NMI_TIMER=y
+# CONFIG_JUMP_LABEL is not set
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_OPTPROBES=y
+CONFIG_HAVE_KPROBES_ON_FTRACE=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_HW_BREAKPOINT=y
+CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
+CONFIG_HAVE_USER_RETURN_NOTIFIER=y
+CONFIG_HAVE_PERF_EVENTS_NMI=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
+CONFIG_HAVE_CMPXCHG_LOCAL=y
+CONFIG_HAVE_CMPXCHG_DOUBLE=y
+CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
+CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_SECCOMP_FILTER=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+# CONFIG_CC_STACKPROTECTOR is not set
+CONFIG_CC_STACKPROTECTOR_NONE=y
+# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
+# CONFIG_CC_STACKPROTECTOR_STRONG is not set
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+CONFIG_HAVE_ARCH_SOFT_DIRTY=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_COMPAT_OLD_SIGACTION=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_SYSTEM_TRUSTED_KEYRING is not set
+# CONFIG_MODULES is not set
+CONFIG_STOP_MACHINE=y
+CONFIG_BLOCK=y
+CONFIG_BLK_DEV_BSG=y
+# CONFIG_BLK_DEV_BSGLIB is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+# CONFIG_BLK_CMDLINE_PARSER is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_BLOCK_COMPAT=y
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_PADATA=y
+CONFIG_ASN1=y
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+# CONFIG_FREEZER is not set
+
+#
+# Processor type and features
+#
+CONFIG_ZONE_DMA=y
+CONFIG_SMP=y
+CONFIG_X86_MPPARSE=y
+# CONFIG_X86_EXTENDED_PLATFORM is not set
+# CONFIG_X86_INTEL_LPSS is not set
+CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_HYPERVISOR_GUEST is not set
+CONFIG_NO_BOOTMEM=y
+# CONFIG_MEMTEST is not set
+# CONFIG_MK8 is not set
+# CONFIG_MPSC is not set
+# CONFIG_MCORE2 is not set
+# CONFIG_MATOM is not set
+CONFIG_GENERIC_CPU=y
+CONFIG_X86_INTERNODE_CACHE_SHIFT=6
+CONFIG_X86_L1_CACHE_SHIFT=6
+CONFIG_X86_TSC=y
+CONFIG_X86_CMPXCHG64=y
+CONFIG_X86_CMOV=y
+CONFIG_X86_MINIMUM_CPU_FAMILY=64
+CONFIG_X86_DEBUGCTLMSR=y
+CONFIG_CPU_SUP_INTEL=y
+CONFIG_CPU_SUP_AMD=y
+CONFIG_CPU_SUP_CENTAUR=y
+CONFIG_HPET_TIMER=y
+CONFIG_HPET_EMULATE_RTC=y
+CONFIG_DMI=y
+CONFIG_GART_IOMMU=y
+# CONFIG_CALGARY_IOMMU is not set
+CONFIG_SWIOTLB=y
+CONFIG_IOMMU_HELPER=y
+# CONFIG_MAXSMP is not set
+CONFIG_NR_CPUS=32
+CONFIG_SCHED_SMT=y
+CONFIG_SCHED_MC=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_X86_LOCAL_APIC=y
+CONFIG_X86_IO_APIC=y
+# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set
+CONFIG_X86_MCE=y
+CONFIG_X86_MCE_INTEL=y
+CONFIG_X86_MCE_AMD=y
+CONFIG_X86_MCE_THRESHOLD=y
+# CONFIG_X86_MCE_INJECT is not set
+CONFIG_X86_THERMAL_VECTOR=y
+# CONFIG_I8K is not set
+# CONFIG_MICROCODE is not set
+# CONFIG_MICROCODE_INTEL_EARLY is not set
+# CONFIG_MICROCODE_AMD_EARLY is not set
+# CONFIG_X86_MSR is not set
+# CONFIG_X86_CPUID is not set
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_DIRECT_GBPAGES=y
+# CONFIG_NUMA is not set
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
+CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
+# CONFIG_MEMORY_FAILURE is not set
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
+# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
+CONFIG_CROSS_MEMORY_ATTACH=y
+# CONFIG_CLEANCACHE is not set
+# CONFIG_FRONTSWAP is not set
+# CONFIG_CMA is not set
+# CONFIG_ZBUD is not set
+# CONFIG_ZSMALLOC is not set
+# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set
+CONFIG_X86_RESERVE_LOW=64
+CONFIG_MTRR=y
+CONFIG_MTRR_SANITIZER=y
+CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0
+CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1
+CONFIG_X86_PAT=y
+CONFIG_ARCH_USES_PG_UNCACHED=y
+CONFIG_ARCH_RANDOM=y
+CONFIG_X86_SMAP=y
+# CONFIG_EFI is not set
+CONFIG_SECCOMP=y
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+CONFIG_SCHED_HRTICK=y
+# CONFIG_CRASH_DUMP is not set
+CONFIG_PHYSICAL_START=0x1000000
+# CONFIG_RELOCATABLE is not set
+CONFIG_PHYSICAL_ALIGN=0x1000000
+# CONFIG_HOTPLUG_CPU is not set
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+
+#
+# Power management and ACPI options
+#
+# CONFIG_SUSPEND is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
+CONFIG_ACPI=y
+# CONFIG_ACPI_PROCFS is not set
+# CONFIG_ACPI_EC_DEBUGFS is not set
+CONFIG_ACPI_AC=y
+CONFIG_ACPI_BATTERY=y
+CONFIG_ACPI_BUTTON=y
+CONFIG_ACPI_VIDEO=y
+CONFIG_ACPI_FAN=y
+CONFIG_ACPI_DOCK=y
+CONFIG_ACPI_PROCESSOR=y
+CONFIG_ACPI_PROCESSOR_AGGREGATOR=y
+CONFIG_ACPI_THERMAL=y
+# CONFIG_ACPI_CUSTOM_DSDT is not set
+# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set
+# CONFIG_ACPI_DEBUG is not set
+# CONFIG_ACPI_PCI_SLOT is not set
+CONFIG_X86_PM_TIMER=y
+# CONFIG_ACPI_CONTAINER is not set
+# CONFIG_ACPI_SBS is not set
+# CONFIG_ACPI_HED is not set
+# CONFIG_ACPI_APEI is not set
+# CONFIG_ACPI_EXTLOG is not set
+# CONFIG_SFI is not set
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_COMMON=y
+# CONFIG_CPU_FREQ_STAT is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+
+#
+# x86 CPU frequency scaling drivers
+#
+CONFIG_X86_INTEL_PSTATE=y
+CONFIG_X86_PCC_CPUFREQ=y
+CONFIG_X86_ACPI_CPUFREQ=y
+CONFIG_X86_ACPI_CPUFREQ_CPB=y
+CONFIG_X86_POWERNOW_K8=y
+CONFIG_X86_AMD_FREQ_SENSITIVITY=y
+# CONFIG_X86_SPEEDSTEP_CENTRINO is not set
+CONFIG_X86_P4_CLOCKMOD=y
+
+#
+# shared options
+#
+CONFIG_X86_SPEEDSTEP_LIB=y
+
+#
+# CPU Idle
+#
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
+# CONFIG_INTEL_IDLE is not set
+
+#
+# Memory power savings
+#
+# CONFIG_I7300_IDLE is not set
+
+#
+# Bus options (PCI etc.)
+#
+CONFIG_PCI=y
+CONFIG_PCI_DIRECT=y
+CONFIG_PCI_MMCONFIG=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIE_ECRC is not set
+# CONFIG_PCIEAER_INJECT is not set
+CONFIG_PCIEASPM=y
+# CONFIG_PCIEASPM_DEBUG is not set
+CONFIG_PCIEASPM_DEFAULT=y
+# CONFIG_PCIEASPM_POWERSAVE is not set
+# CONFIG_PCIEASPM_PERFORMANCE is not set
+CONFIG_PCIE_PME=y
+CONFIG_PCI_MSI=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
+# CONFIG_PCI_STUB is not set
+CONFIG_HT_IRQ=y
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCI_PRI is not set
+# CONFIG_PCI_PASID is not set
+# CONFIG_PCI_IOAPIC is not set
+CONFIG_PCI_LABEL=y
+
+#
+# PCI host controller drivers
+#
+CONFIG_ISA_DMA_API=y
+CONFIG_AMD_NB=y
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_RAPIDIO is not set
+# CONFIG_X86_SYSFB is not set
+
+#
+# Executable file formats / Emulations
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_COMPAT_BINFMT_ELF=y
+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
+CONFIG_BINFMT_SCRIPT=y
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_COREDUMP=y
+CONFIG_IA32_EMULATION=y
+# CONFIG_IA32_AOUT is not set
+# CONFIG_X86_X32 is not set
+CONFIG_COMPAT=y
+CONFIG_COMPAT_FOR_U64_ALIGNMENT=y
+CONFIG_SYSVIPC_COMPAT=y
+CONFIG_KEYS_COMPAT=y
+CONFIG_X86_DEV_DMA_OPS=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_DIAG is not set
+CONFIG_UNIX=y
+# CONFIG_UNIX_DIAG is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_ALGO=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=y
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_NET_IP_TUNNEL=y
+# CONFIG_IP_MROUTE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_NET_IPVTI is not set
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+CONFIG_INET_UDP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_VTI=y
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=y
+# CONFIG_IPV6_GRE is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+CONFIG_HAVE_NET_DSA=y
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+CONFIG_DNS_RESOLVER=y
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_VSOCKETS is not set
+# CONFIG_NETLINK_MMAP is not set
+# CONFIG_NETLINK_DIAG is not set
+# CONFIG_NET_MPLS_GSO is not set
+# CONFIG_HSR is not set
+CONFIG_RPS=y
+CONFIG_RFS_ACCEL=y
+CONFIG_XPS=y
+# CONFIG_CGROUP_NET_PRIO is not set
+# CONFIG_CGROUP_NET_CLASSID is not set
+CONFIG_NET_RX_BUSY_POLL=y
+CONFIG_BQL=y
+CONFIG_NET_FLOW_LIMIT=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+CONFIG_HAVE_BPF_JIT=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE="amd-ucode/microcode_amd.bin amd-ucode/microcode_amd_fam15h.bin ar5523.bin ar7010.fw ar7010_1_1.fw ar9170-1.fw ar9170-2.fw ar9271.fw ath3k-1.fw av7110/bootcode.bin brcm/bcm4329-fullmac-4.bin brcm/bcm43xx-0.fw brcm/bcm43xx_hdr-0.fw brcm/brcmfmac43236b.bin brcm/brcmfmac4329-sdio.bin brcm/brcmfmac4330-sdio.bin brcm/brcmfmac4334-sdio.bin carl9170-1.fw cpia2/stv0672_vp4.bin ctefx.bin ctspeq.bin cxgb3/ael2005_opt_edc.bin cxgb3/ael2020_twx_edc.bin cxgb3/t3c_psram-1.1.0.bin cxgb3/t3fw-7.1.0.bin cxgb3/t3fw-7.12.0.bin cxgb3/ael2005_twx_edc.bin cxgb3/t3b_psram-1.1.0.bin cxgb3/t3fw-7.0.0.bin cxgb3/t3fw-7.10.0.bin cxgb3/t3fw-7.4.0.bin cxgb4/t4fw.bin dabusb/bitstream.bin dabusb/firmware.fw dsp56k/bootstrap.bin dvb-fe-xc5000-1.6.114.fw dvb-usb-dib0700-1.20.fw dvb-usb-terratec-h5-drxk.fw e100/d101m_ucode.bin e100/d101s_ucode.bin e100/d102e_ucode.bin edgeport/boot.fw edgeport/boot2.fw edgeport/down.fw edgeport/down2.fw edgeport/down3.bin emi26/bitstream.fw emi26/firmware.fw em
i26/loader.fw emi62/bitstream.fw emi62/loader.fw emi62/midi.fw emi62/spdif.fw ene-ub6250/ms_init.bin ene-ub6250/ms_rdwr.bin ene-ub6250/msp_rdwr.bin ene-ub6250/sd_init1.bin ene-ub6250/sd_init2.bin ene-ub6250/sd_rdwr.bin ess/maestro3_assp_kernel.fw ess/maestro3_assp_minisrc.fw f2255usb.bin go7007/go7007fw.bin go7007/go7007tv.bin go7007/lr192.fw go7007/px-m402u.fw go7007/px-tv402u.fw go7007/s2250-1.fw go7007/s2250-2.fw go7007/wis-startrek.fw htc_7010.fw htc_9271.fw i2400m-fw-usb-1.4.sbcf i2400m-fw-usb-1.5.sbcf i6050-fw-usb-1.5.sbcf intel/ibt-hw-37.7.10-fw-1.80.2.3.d.bseq intel/ibt-hw-37.7.bseq intelliport2.bin isci/isci_firmware.bin iwlwifi-100-5.ucode iwlwifi-1000-3.ucode iwlwifi-1000-5.ucode iwlwifi-105-6.ucode iwlwifi-135-6.ucode iwlwifi-2000-6.ucode iwlwifi-2030-6.ucode iwlwifi-3160-7.ucode iwlwifi-3945-2.ucode iwlwifi-4965-2.ucode iwlwifi-5000-1.ucode iwlwifi-5000-2.ucode iwlwifi-5000-5.ucode iwlwifi-5150-2.ucode iwlwifi-6000-4.ucode iwlwifi-6000g2a-5.ucode iwlwifi-6000g2a-6.ucode
iwlwifi-6000g2b-5.ucode iwlwifi-6000g2b-6.ucode iwlwifi-6050-4.ucode iwlwifi-6050-5.ucode iwlwifi-7260-7.ucode kaweth/new_code.bin kaweth/new_code_fix.bin kaweth/trigger_code.bin kaweth/trigger_code_fix.bin keyspan/mpr.fw keyspan/usa18x.fw keyspan/usa19.fw keyspan/usa19qi.fw keyspan/usa19qw.fw keyspan/usa19w.fw keyspan/usa28.fw keyspan/usa28x.fw keyspan/usa28xa.fw keyspan/usa28xb.fw keyspan/usa49w.fw keyspan/usa49wlc.fw keyspan_pda/keyspan_pda.fw keyspan_pda/xircom_pgs.fw korg/k1212.dsp lbtf_usb.bin lgs8g75.fw matrox/g200_warp.fw matrox/g400_warp.fw mrvl/pcie8897_uapsta.bin mrvl/sd8688.bin mrvl/sd8688_helper.bin mrvl/sd8787_uapsta.bin mrvl/sd8797_uapsta.bin mrvl/usb8797_uapsta.bin mt7650.bin mts_cdma.fw mts_edge.fw mts_gsm.fw mts_mt9234mu.fw mts_mt9234zba.fw mwl8k/fmimage_8366.fw mwl8k/fmimage_8366_ap-1.fw mwl8k/fmimage_8366_ap-2.fw mwl8k/fmimage_8366_ap-3.fw mwl8k/fmimage_8687.fw mwl8k/fmimage_8764_ap-1.fw mwl8k/helper_8366.fw mwl8k/helper_8687.fw myri10ge_eth_z8e.dat myri10ge_eth
p_z8e.dat myri10ge_rss_eth_z8e.dat myri10ge_rss_ethp_z8e.dat radeon/ARUBA_me.bin radeon/BONAIRE_uvd.bin radeon/BONAIRE_smc.bin radeon/CEDAR_smc.bin radeon/JUNIPER_rlc.bin radeon/PALM_me.bin radeon/R600_pfp.bin radeon/RV620_pfp.bin radeon/RV740_smc.bin radeon/TAHITI_rlc.bin radeon/ARUBA_pfp.bin radeon/BTC_rlc.bin radeon/CYPRESS_me.bin radeon/JUNIPER_smc.bin radeon/PALM_pfp.bin radeon/R600_rlc.bin radeon/RV630_me.bin radeon/RV770_me.bin radeon/TAHITI_smc.bin radeon/ARUBA_rlc.bin radeon/CAICOS_mc.bin radeon/CYPRESS_pfp.bin radeon/KABINI_ce.bin radeon/PITCAIRN_ce.bin radeon/R700_rlc.bin radeon/RV630_pfp.bin radeon/RV770_pfp.bin radeon/TAHITI_uvd.bin radeon/BARTS_mc.bin radeon/CAICOS_me.bin radeon/CYPRESS_rlc.bin radeon/KABINI_me.bin radeon/PITCAIRN_mc.bin radeon/REDWOOD_me.bin radeon/RV635_me.bin radeon/RV770_smc.bin radeon/TURKS_mc.bin radeon/BARTS_me.bin radeon/CAICOS_pfp.bin radeon/CYPRESS_smc.bin radeon/KABINI_mec.bin radeon/PITCAIRN_me.bin radeon/REDWOOD_pfp.bin radeon/RV635_pfp.bi
n radeon/SUMO2_me.bin radeon/TURKS_me.bin radeon/BARTS_pfp.bin radeon/CAICOS_smc.bin radeon/CYPRESS_uvd.bin radeon/KABINI_pfp.bin radeon/PITCAIRN_pfp.bin radeon/REDWOOD_rlc.bin radeon/RV670_me.bin radeon/SUMO2_pfp.bin radeon/TURKS_pfp.bin radeon/BARTS_smc.bin radeon/CAYMAN_mc.bin radeon/HAINAN_ce.bin radeon/KABINI_rlc.bin radeon/PITCAIRN_rlc.bin radeon/REDWOOD_smc.bin radeon/RV670_pfp.bin radeon/SUMO_me.bin radeon/TURKS_smc.bin radeon/BONAIRE_ce.bin radeon/CAYMAN_me.bin radeon/HAINAN_mc.bin radeon/KABINI_sdma.bin radeon/PITCAIRN_smc.bin radeon/RS600_cp.bin radeon/RV710_me.bin radeon/SUMO_pfp.bin radeon/VERDE_ce.bin radeon/BONAIRE_mc.bin radeon/CAYMAN_pfp.bin radeon/HAINAN_me.bin radeon/OLAND_ce.bin radeon/R100_cp.bin radeon/RS690_cp.bin radeon/RV710_pfp.bin radeon/SUMO_rlc.bin radeon/VERDE_mc.bin radeon/BONAIRE_me.bin radeon/CAYMAN_rlc.bin radeon/HAINAN_pfp.bin radeon/OLAND_mc.bin radeon/R200_cp.bin radeon/RS780_me.bin radeon/RV710_smc.bin radeon/SUMO_uvd.bin radeon/VERDE_me.bin rad
eon/BONAIRE_mec.bin radeon/CAYMAN_smc.bin radeon/HAINAN_rlc.bin radeon/OLAND_me.bin radeon/R300_cp.bin radeon/RS780_pfp.bin radeon/RV710_uvd.bin radeon/TAHITI_ce.bin radeon/VERDE_pfp.bin radeon/BONAIRE_pfp.bin radeon/CEDAR_me.bin radeon/HAINAN_smc.bin radeon/OLAND_pfp.bin radeon/R420_cp.bin radeon/RV610_me.bin radeon/RV730_me.bin radeon/TAHITI_mc.bin radeon/VERDE_rlc.bin radeon/BONAIRE_rlc.bin radeon/CEDAR_pfp.bin radeon/JUNIPER_me.bin radeon/OLAND_rlc.bin radeon/R520_cp.bin radeon/RV610_pfp.bin radeon/RV730_pfp.bin radeon/TAHITI_me.bin radeon/VERDE_smc.bin radeon/BONAIRE_sdma.bin radeon/CEDAR_rlc.bin radeon/JUNIPER_pfp.bin radeon/OLAND_smc.bin radeon/R600_me.bin radeon/RV620_me.bin radeon/RV730_smc.bin radeon/TAHITI_pfp.bin rtl_nic/rtl8105e-1.fw rtl_nic/rtl8106e-2.fw rtl_nic/rtl8168d-2.fw rtl_nic/rtl8168e-2.fw rtl_nic/rtl8168f-1.fw rtl_nic/rtl8168g-1.fw rtl_nic/rtl8168g-3.fw rtl_nic/rtl8411-1.fw rtl_nic/rtl8106e-1.fw rtl_nic/rtl8168d-1.fw rtl_nic/rtl8168e-1.fw rtl_nic/rtl8168e-3.fw
rtl_nic/rtl8168f-2.fw rtl_nic/rtl8168g-2.fw rtl_nic/rtl8402-1.fw rtl_nic/rtl8411-2.fw tigon/tg3.bin tigon/tg357766.bin tigon/tg3_tso.bin tigon/tg3_tso5.bin"
+CONFIG_EXTRA_FIRMWARE_DIR="/lib/firmware"
+CONFIG_FW_LOADER_USER_HELPER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_GENERIC_CPU_DEVICES is not set
+CONFIG_DMA_SHARED_BUFFER=y
+
+#
+# Bus devices
+#
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_PNP=y
+# CONFIG_PNP_DEBUG_MESSAGES is not set
+
+#
+# Protocols
+#
+CONFIG_PNPACPI=y
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_NULL_BLK is not set
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_AES=y
+CONFIG_BLK_DEV_LOOP_KEYSCRUB=y
+CONFIG_BLK_DEV_LOOP_PADLOCK=y
+CONFIG_BLK_DEV_LOOP_INTELAES=y
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_NVME is not set
+# CONFIG_BLK_DEV_SKD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_BLK_DEV_RSXX is not set
+
+#
+# Misc devices
+#
+# CONFIG_SENSORS_LIS3LV02D is not set
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_DUMMY_IRQ is not set
+# CONFIG_IBM_ASM is not set
+# CONFIG_PHANTOM is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ATMEL_SSC is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_BMP085_I2C is not set
+# CONFIG_PCH_PHUB is not set
+# CONFIG_USB_SWITCH_FSA9480 is not set
+# CONFIG_SRAM is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_CB710_CORE is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_SENSORS_LIS3_I2C is not set
+
+#
+# Altera FPGA firmware download module
+#
+# CONFIG_ALTERA_STAPL is not set
+# CONFIG_VMWARE_VMCI is not set
+
+#
+# Intel MIC Host Driver
+#
+# CONFIG_INTEL_MIC_HOST is not set
+
+#
+# Intel MIC Card Driver
+#
+# CONFIG_INTEL_MIC_CARD is not set
+# CONFIG_GENWQE is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_ATA_ACPI=y
+CONFIG_SATA_ZPODD=y
+CONFIG_SATA_PMP=y
+
+#
+# Controllers with non-SFF native interface
+#
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_SATA_INIC162X=y
+CONFIG_SATA_ACARD_AHCI=y
+CONFIG_SATA_SIL24=y
+CONFIG_ATA_SFF=y
+
+#
+# SFF controllers with custom DMA interface
+#
+CONFIG_PDC_ADMA=y
+CONFIG_SATA_QSTOR=y
+CONFIG_SATA_SX4=y
+CONFIG_ATA_BMDMA=y
+
+#
+# SATA SFF controllers with BMDMA
+#
+CONFIG_ATA_PIIX=y
+CONFIG_SATA_HIGHBANK=y
+CONFIG_SATA_MV=y
+CONFIG_SATA_NV=y
+CONFIG_SATA_PROMISE=y
+CONFIG_SATA_RCAR=y
+CONFIG_SATA_SIL=y
+CONFIG_SATA_SIS=y
+CONFIG_SATA_SVW=y
+CONFIG_SATA_ULI=y
+CONFIG_SATA_VIA=y
+CONFIG_SATA_VITESSE=y
+
+#
+# PATA SFF controllers with BMDMA
+#
+CONFIG_PATA_ALI=y
+CONFIG_PATA_AMD=y
+CONFIG_PATA_ARTOP=y
+CONFIG_PATA_ATIIXP=y
+CONFIG_PATA_ATP867X=y
+CONFIG_PATA_CMD64X=y
+CONFIG_PATA_CS5520=y
+CONFIG_PATA_CS5530=y
+CONFIG_PATA_CS5536=y
+# CONFIG_PATA_CYPRESS is not set
+CONFIG_PATA_EFAR=y
+CONFIG_PATA_HPT366=y
+CONFIG_PATA_HPT37X=y
+CONFIG_PATA_HPT3X2N=y
+CONFIG_PATA_HPT3X3=y
+CONFIG_PATA_HPT3X3_DMA=y
+CONFIG_PATA_IT8213=y
+CONFIG_PATA_IT821X=y
+CONFIG_PATA_JMICRON=y
+CONFIG_PATA_MARVELL=y
+CONFIG_PATA_NETCELL=y
+CONFIG_PATA_NINJA32=y
+CONFIG_PATA_NS87415=y
+CONFIG_PATA_OLDPIIX=y
+# CONFIG_PATA_OPTIDMA is not set
+CONFIG_PATA_PDC2027X=y
+CONFIG_PATA_PDC_OLD=y
+CONFIG_PATA_RADISYS=y
+CONFIG_PATA_RDC=y
+CONFIG_PATA_SC1200=y
+CONFIG_PATA_SCH=y
+CONFIG_PATA_SERVERWORKS=y
+CONFIG_PATA_SIL680=y
+CONFIG_PATA_SIS=y
+CONFIG_PATA_TOSHIBA=y
+CONFIG_PATA_TRIFLEX=y
+CONFIG_PATA_VIA=y
+CONFIG_PATA_WINBOND=y
+
+#
+# PIO-only SFF controllers
+#
+CONFIG_PATA_CMD640_PCI=y
+CONFIG_PATA_MPIIX=y
+CONFIG_PATA_NS87410=y
+# CONFIG_PATA_OPTI is not set
+CONFIG_PATA_RZ1000=y
+
+#
+# Generic fallback / legacy drivers
+#
+# CONFIG_PATA_ACPI is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_LEGACY is not set
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_BCACHE is not set
+CONFIG_BLK_DEV_DM_BUILTIN=y
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_DEBUG is not set
+CONFIG_DM_CRYPT=y
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_THIN_PROVISIONING is not set
+# CONFIG_DM_CACHE is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_RAID is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
+# CONFIG_DM_FLAKEY is not set
+# CONFIG_DM_VERITY is not set
+# CONFIG_DM_SWITCH is not set
+# CONFIG_TARGET_CORE is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_FIREWIRE_NOSY is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_NET_CORE=y
+# CONFIG_BONDING is not set
+# CONFIG_DUMMY is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NET_TEAM is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_VXLAN is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_NLMON is not set
+CONFIG_SUNGEM_PHY=y
+# CONFIG_ARCNET is not set
+
+#
+# CAIF transport drivers
+#
+
+#
+# Distributed Switch Architecture drivers
+#
+# CONFIG_NET_DSA_MV88E6XXX is not set
+# CONFIG_NET_DSA_MV88E6060 is not set
+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
+# CONFIG_NET_DSA_MV88E6131 is not set
+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
+CONFIG_ETHERNET=y
+CONFIG_MDIO=y
+CONFIG_NET_VENDOR_3COM=y
+CONFIG_VORTEX=y
+CONFIG_TYPHOON=y
+CONFIG_NET_VENDOR_ADAPTEC=y
+CONFIG_ADAPTEC_STARFIRE=y
+CONFIG_NET_VENDOR_ALTEON=y
+CONFIG_ACENIC=y
+# CONFIG_ACENIC_OMIT_TIGON_I is not set
+CONFIG_NET_VENDOR_AMD=y
+CONFIG_AMD8111_ETH=y
+CONFIG_PCNET32=y
+CONFIG_NET_VENDOR_ARC=y
+CONFIG_NET_VENDOR_ATHEROS=y
+CONFIG_ATL2=y
+CONFIG_ATL1=y
+CONFIG_ATL1E=y
+CONFIG_ATL1C=y
+CONFIG_ALX=y
+CONFIG_NET_CADENCE=y
+CONFIG_ARM_AT91_ETHER=y
+CONFIG_MACB=y
+CONFIG_NET_VENDOR_BROADCOM=y
+CONFIG_B44=y
+CONFIG_B44_PCI_AUTOSELECT=y
+CONFIG_B44_PCICORE_AUTOSELECT=y
+CONFIG_B44_PCI=y
+CONFIG_BNX2=y
+CONFIG_CNIC=y
+CONFIG_TIGON3=y
+CONFIG_BNX2X=y
+CONFIG_NET_VENDOR_BROCADE=y
+CONFIG_BNA=y
+CONFIG_NET_CALXEDA_XGMAC=y
+CONFIG_NET_VENDOR_CHELSIO=y
+CONFIG_CHELSIO_T1=y
+CONFIG_CHELSIO_T1_1G=y
+CONFIG_CHELSIO_T3=y
+CONFIG_CHELSIO_T4=y
+CONFIG_CHELSIO_T4VF=y
+CONFIG_NET_VENDOR_CISCO=y
+CONFIG_ENIC=y
+CONFIG_DNET=y
+CONFIG_NET_VENDOR_DEC=y
+CONFIG_NET_TULIP=y
+CONFIG_DE2104X=y
+CONFIG_DE2104X_DSL=0
+CONFIG_TULIP=y
+CONFIG_TULIP_MWI=y
+CONFIG_TULIP_MMIO=y
+CONFIG_TULIP_NAPI=y
+CONFIG_TULIP_NAPI_HW_MITIGATION=y
+CONFIG_DE4X5=y
+CONFIG_WINBOND_840=y
+CONFIG_DM9102=y
+CONFIG_ULI526X=y
+CONFIG_NET_VENDOR_DLINK=y
+CONFIG_DL2K=y
+CONFIG_SUNDANCE=y
+CONFIG_SUNDANCE_MMIO=y
+CONFIG_NET_VENDOR_EMULEX=y
+CONFIG_BE2NET=y
+CONFIG_NET_VENDOR_EXAR=y
+CONFIG_S2IO=y
+CONFIG_VXGE=y
+# CONFIG_VXGE_DEBUG_TRACE_ALL is not set
+CONFIG_NET_VENDOR_HP=y
+CONFIG_HP100=y
+CONFIG_NET_VENDOR_INTEL=y
+CONFIG_E100=y
+CONFIG_E1000=y
+CONFIG_E1000E=y
+CONFIG_IGB=y
+CONFIG_IGB_HWMON=y
+CONFIG_IGBVF=y
+CONFIG_IXGB=y
+CONFIG_IXGBE=y
+CONFIG_IXGBE_HWMON=y
+CONFIG_IXGBEVF=y
+CONFIG_I40E=y
+# CONFIG_I40EVF is not set
+CONFIG_NET_VENDOR_I825XX=y
+CONFIG_IP1000=y
+CONFIG_JME=y
+CONFIG_NET_VENDOR_MARVELL=y
+# CONFIG_MVMDIO is not set
+CONFIG_SKGE=y
+CONFIG_SKGE_GENESIS=y
+CONFIG_SKY2=y
+CONFIG_NET_VENDOR_MELLANOX=y
+CONFIG_MLX4_EN=y
+CONFIG_MLX4_CORE=y
+CONFIG_MLX4_DEBUG=y
+# CONFIG_MLX5_CORE is not set
+CONFIG_NET_VENDOR_MICREL=y
+CONFIG_KS8851_MLL=y
+CONFIG_KSZ884X_PCI=y
+CONFIG_NET_VENDOR_MYRI=y
+CONFIG_MYRI10GE=y
+CONFIG_FEALNX=y
+CONFIG_NET_VENDOR_NATSEMI=y
+CONFIG_NATSEMI=y
+CONFIG_NS83820=y
+CONFIG_NET_VENDOR_8390=y
+CONFIG_NE2K_PCI=y
+CONFIG_NET_VENDOR_NVIDIA=y
+CONFIG_FORCEDETH=y
+CONFIG_NET_VENDOR_OKI=y
+CONFIG_PCH_GBE=y
+CONFIG_ETHOC=y
+CONFIG_NET_PACKET_ENGINE=y
+CONFIG_HAMACHI=y
+CONFIG_YELLOWFIN=y
+CONFIG_NET_VENDOR_QLOGIC=y
+CONFIG_QLA3XXX=y
+CONFIG_QLCNIC=y
+CONFIG_QLGE=y
+CONFIG_NETXEN_NIC=y
+CONFIG_NET_VENDOR_REALTEK=y
+CONFIG_8139CP=y
+CONFIG_8139TOO=y
+# CONFIG_8139TOO_PIO is not set
+CONFIG_8139TOO_TUNE_TWISTER=y
+CONFIG_8139TOO_8129=y
+# CONFIG_8139_OLD_RX_RESET is not set
+CONFIG_R8169=y
+CONFIG_SH_ETH=y
+CONFIG_NET_VENDOR_RDC=y
+CONFIG_R6040=y
+CONFIG_NET_VENDOR_SEEQ=y
+CONFIG_NET_VENDOR_SILAN=y
+CONFIG_SC92031=y
+CONFIG_NET_VENDOR_SIS=y
+CONFIG_SIS900=y
+CONFIG_SIS190=y
+CONFIG_SFC=y
+CONFIG_SFC_MCDI_MON=y
+CONFIG_NET_VENDOR_SMSC=y
+CONFIG_EPIC100=y
+CONFIG_SMSC911X=y
+# CONFIG_SMSC911X_ARCH_HOOKS is not set
+CONFIG_SMSC9420=y
+CONFIG_NET_VENDOR_STMICRO=y
+CONFIG_STMMAC_ETH=y
+CONFIG_STMMAC_PLATFORM=y
+# CONFIG_STMMAC_PCI is not set
+CONFIG_STMMAC_DA=y
+CONFIG_NET_VENDOR_SUN=y
+CONFIG_HAPPYMEAL=y
+CONFIG_SUNGEM=y
+CONFIG_CASSINI=y
+CONFIG_NIU=y
+CONFIG_NET_VENDOR_TEHUTI=y
+CONFIG_TEHUTI=y
+CONFIG_NET_VENDOR_TI=y
+CONFIG_TLAN=y
+CONFIG_NET_VENDOR_VIA=y
+CONFIG_VIA_RHINE=y
+CONFIG_VIA_RHINE_MMIO=y
+CONFIG_VIA_VELOCITY=y
+CONFIG_NET_VENDOR_WIZNET=y
+CONFIG_WIZNET_W5100=y
+CONFIG_WIZNET_W5300=y
+# CONFIG_WIZNET_BUS_DIRECT is not set
+# CONFIG_WIZNET_BUS_INDIRECT is not set
+CONFIG_WIZNET_BUS_ANY=y
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_NET_SB1000 is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_AT803X_PHY=y
+CONFIG_AMD_PHY=y
+CONFIG_MARVELL_PHY=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_QSEMI_PHY=y
+CONFIG_LXT_PHY=y
+CONFIG_CICADA_PHY=y
+CONFIG_VITESSE_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_BCM87XX_PHY=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_STE10XP=y
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_FIXED_PHY=y
+CONFIG_MDIO_BITBANG=y
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# USB Network Adapters
+#
+CONFIG_USB_CATC=y
+CONFIG_USB_KAWETH=y
+CONFIG_USB_PEGASUS=y
+CONFIG_USB_RTL8150=y
+CONFIG_USB_RTL8152=y
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_AX8817X=y
+CONFIG_USB_NET_AX88179_178A=y
+CONFIG_USB_NET_CDCETHER=y
+CONFIG_USB_NET_CDC_EEM=y
+CONFIG_USB_NET_CDC_NCM=y
+CONFIG_USB_NET_HUAWEI_CDC_NCM=y
+CONFIG_USB_NET_CDC_MBIM=y
+CONFIG_USB_NET_DM9601=y
+# CONFIG_USB_NET_SR9700 is not set
+# CONFIG_USB_NET_SR9800 is not set
+CONFIG_USB_NET_SMSC75XX=y
+CONFIG_USB_NET_SMSC95XX=y
+CONFIG_USB_NET_GL620A=y
+CONFIG_USB_NET_NET1080=y
+CONFIG_USB_NET_PLUSB=y
+CONFIG_USB_NET_MCS7830=y
+CONFIG_USB_NET_RNDIS_HOST=y
+CONFIG_USB_NET_CDC_SUBSET=y
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_KC2190=y
+CONFIG_USB_NET_ZAURUS=y
+CONFIG_USB_NET_CX82310_ETH=y
+CONFIG_USB_NET_KALMIA=y
+CONFIG_USB_NET_QMI_WWAN=y
+CONFIG_USB_NET_INT51X1=y
+CONFIG_USB_IPHETH=y
+CONFIG_USB_SIERRA_NET=y
+CONFIG_USB_VL600=y
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_VMXNET3 is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+# CONFIG_INPUT_MATRIXKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_CYPRESS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+CONFIG_MOUSE_CYAPA=y
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_MOUSE_SYNAPTICS_USB is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_PCIPS2=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+
+#
+# KCopy
+#
+# CONFIG_KCOPY is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
+CONFIG_SERIAL_8250_PNP=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_DW is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MFD_HSU is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_PCH_UART is not set
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_SERIAL_RP2 is not set
+# CONFIG_SERIAL_FSL_LPUART is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_MWAVE is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_HPET is not set
+# CONFIG_HANGCHECK_TIMER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_COMPAT is not set
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_ISMT is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# ACPI drivers
+#
+# CONFIG_I2C_SCMI is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
+# CONFIG_I2C_DESIGNWARE_PCI is not set
+# CONFIG_I2C_EG20T is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_SPI is not set
+# CONFIG_HSI is not set
+
+#
+# PPS support
+#
+CONFIG_PPS=y
+# CONFIG_PPS_DEBUG is not set
+
+#
+# PPS clients support
+#
+# CONFIG_PPS_CLIENT_KTIMER is not set
+# CONFIG_PPS_CLIENT_LDISC is not set
+# CONFIG_PPS_CLIENT_GPIO is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+CONFIG_PTP_1588_CLOCK=y
+
+#
+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
+#
+CONFIG_PTP_1588_CLOCK_PCH=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_ISP1704 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_POWER_RESET is not set
+# CONFIG_POWER_AVS is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ABITUGURU3 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7410 is not set
+# CONFIG_SENSORS_ADT7411 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
+# CONFIG_SENSORS_K8TEMP is not set
+# CONFIG_SENSORS_K10TEMP is not set
+# CONFIG_SENSORS_FAM15H_POWER is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS620 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_FSCHMD is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_G762 is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_HIH6130 is not set
+# CONFIG_SENSORS_HTU21 is not set
+# CONFIG_SENSORS_CORETEMP is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_JC42 is not set
+# CONFIG_SENSORS_LINEAGE is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM73 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4151 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4261 is not set
+# CONFIG_SENSORS_LM95234 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_LM95245 is not set
+# CONFIG_SENSORS_MAX16065 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX1668 is not set
+# CONFIG_SENSORS_MAX197 is not set
+# CONFIG_SENSORS_MAX6639 is not set
+# CONFIG_SENSORS_MAX6642 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_MAX6697 is not set
+# CONFIG_SENSORS_MCP3021 is not set
+# CONFIG_SENSORS_NCT6775 is not set
+# CONFIG_SENSORS_NTC_THERMISTOR is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_PMBUS is not set
+# CONFIG_SENSORS_SHT21 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMM665 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_EMC1403 is not set
+# CONFIG_SENSORS_EMC2103 is not set
+# CONFIG_SENSORS_EMC6W201 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SCH56XX_COMMON is not set
+# CONFIG_SENSORS_ADS1015 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_AMC6821 is not set
+# CONFIG_SENSORS_INA209 is not set
+# CONFIG_SENSORS_INA2XX is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP102 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VIA_CPUTEMP is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_APPLESMC is not set
+
+#
+# ACPI drivers
+#
+# CONFIG_SENSORS_ACPI_POWER is not set
+# CONFIG_SENSORS_ATK0110 is not set
+CONFIG_THERMAL=y
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
+CONFIG_THERMAL_GOV_FAIR_SHARE=y
+CONFIG_THERMAL_GOV_STEP_WISE=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+# CONFIG_THERMAL_EMULATION is not set
+# CONFIG_INTEL_POWERCLAMP is not set
+CONFIG_X86_PKG_TEMP_THERMAL=y
+# CONFIG_ACPI_INT3403_THERMAL is not set
+
+#
+# Texas Instruments thermal drivers
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=y
+CONFIG_SSB_SPROM=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+# CONFIG_SSB_B43_PCI_BRIDGE is not set
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_CS5535 is not set
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_CROS_EC is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_DA9063 is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_LPC_ICH is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_MFD_JANZ_CMODIO is not set
+# CONFIG_MFD_KEMPLD is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_VIPERBOARD is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_RDC321X is not set
+CONFIG_MFD_RTSX_PCI=y
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_SI476X_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_STMPE is not set
+# CONFIG_MFD_SYSCON is not set
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_LP3943 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_VX855 is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
+# CONFIG_VGA_SWITCHEROO is not set
+CONFIG_DRM=y
+CONFIG_DRM_USB=y
+CONFIG_DRM_KMS_HELPER=y
+CONFIG_DRM_KMS_FB_HELPER=y
+# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
+CONFIG_DRM_TTM=y
+
+#
+# I2C encoder or helper chips
+#
+CONFIG_DRM_I2C_CH7006=y
+CONFIG_DRM_I2C_SIL164=y
+CONFIG_DRM_I2C_NXP_TDA998X=y
+CONFIG_DRM_TDFX=y
+CONFIG_DRM_R128=y
+CONFIG_DRM_RADEON=y
+# CONFIG_DRM_RADEON_UMS is not set
+CONFIG_DRM_NOUVEAU=y
+CONFIG_NOUVEAU_DEBUG=5
+CONFIG_NOUVEAU_DEBUG_DEFAULT=3
+CONFIG_DRM_NOUVEAU_BACKLIGHT=y
+# CONFIG_DRM_I915 is not set
+CONFIG_DRM_MGA=y
+CONFIG_DRM_VIA=y
+CONFIG_DRM_SAVAGE=y
+CONFIG_DRM_VMWGFX=y
+CONFIG_DRM_VMWGFX_FBCON=y
+CONFIG_DRM_GMA500=y
+CONFIG_DRM_GMA600=y
+CONFIG_DRM_GMA3600=y
+CONFIG_DRM_UDL=y
+CONFIG_DRM_AST=y
+CONFIG_DRM_MGAG200=y
+CONFIG_DRM_CIRRUS_QEMU=y
+# CONFIG_DRM_QXL is not set
+# CONFIG_DRM_BOCHS is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_HDMI=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+CONFIG_FB_BACKLIGHT=y
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ARC is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_VESA is not set
+# CONFIG_FB_N411 is not set
+# CONFIG_FB_HGA is not set
+# CONFIG_FB_OPENCORES is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_I740 is not set
+# CONFIG_FB_LE80578 is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_TMIO is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_GOLDFISH is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_FB_AUO_K190X is not set
+# CONFIG_FB_SIMPLE is not set
+# CONFIG_EXYNOS_VIDEO is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+# CONFIG_BACKLIGHT_APPLE is not set
+# CONFIG_BACKLIGHT_SAHARA is not set
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+# CONFIG_BACKLIGHT_LM3630A is not set
+# CONFIG_BACKLIGHT_LM3639 is not set
+# CONFIG_BACKLIGHT_LP855X is not set
+# CONFIG_BACKLIGHT_LV5207LP is not set
+# CONFIG_BACKLIGHT_BD6107 is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_LOGO is not set
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=y
+CONFIG_SND_RAWMIDI=y
+CONFIG_SND_JACK=y
+CONFIG_SND_SEQUENCER=y
+# CONFIG_SND_SEQ_DUMMY is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_PCM_OSS_PLUGINS is not set
+CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_HRTIMER=y
+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_MAX_CARDS=32
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_KCTL_JACK=y
+CONFIG_SND_DMA_SGBUF=y
+CONFIG_SND_RAWMIDI_SEQ=y
+CONFIG_SND_OPL3_LIB_SEQ=y
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+CONFIG_SND_EMU10K1_SEQ=y
+CONFIG_SND_MPU401_UART=y
+CONFIG_SND_OPL3_LIB=y
+CONFIG_SND_VX_LIB=y
+CONFIG_SND_AC97_CODEC=y
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_SB_COMMON=y
+CONFIG_SND_SB16_DSP=y
+CONFIG_SND_PCI=y
+CONFIG_SND_AD1889=y
+CONFIG_SND_ALS300=y
+CONFIG_SND_ALS4000=y
+CONFIG_SND_ALI5451=y
+CONFIG_SND_ASIHPI=y
+CONFIG_SND_ATIIXP=y
+CONFIG_SND_ATIIXP_MODEM=y
+CONFIG_SND_AU8810=y
+CONFIG_SND_AU8820=y
+CONFIG_SND_AU8830=y
+CONFIG_SND_AW2=y
+CONFIG_SND_AZT3328=y
+CONFIG_SND_BT87X=y
+# CONFIG_SND_BT87X_OVERCLOCK is not set
+CONFIG_SND_CA0106=y
+CONFIG_SND_CMIPCI=y
+CONFIG_SND_OXYGEN_LIB=y
+CONFIG_SND_OXYGEN=y
+CONFIG_SND_CS4281=y
+CONFIG_SND_CS46XX=y
+CONFIG_SND_CS46XX_NEW_DSP=y
+CONFIG_SND_CS5530=y
+CONFIG_SND_CS5535AUDIO=y
+CONFIG_SND_CTXFI=y
+CONFIG_SND_DARLA20=y
+CONFIG_SND_GINA20=y
+CONFIG_SND_LAYLA20=y
+CONFIG_SND_DARLA24=y
+CONFIG_SND_GINA24=y
+CONFIG_SND_LAYLA24=y
+CONFIG_SND_MONA=y
+CONFIG_SND_MIA=y
+CONFIG_SND_ECHO3G=y
+CONFIG_SND_INDIGO=y
+CONFIG_SND_INDIGOIO=y
+CONFIG_SND_INDIGODJ=y
+CONFIG_SND_INDIGOIOX=y
+CONFIG_SND_INDIGODJX=y
+CONFIG_SND_EMU10K1=y
+CONFIG_SND_EMU10K1X=y
+CONFIG_SND_ENS1370=y
+CONFIG_SND_ENS1371=y
+CONFIG_SND_ES1938=y
+CONFIG_SND_ES1968=y
+CONFIG_SND_ES1968_INPUT=y
+CONFIG_SND_FM801=y
+CONFIG_SND_HDA_INTEL=y
+CONFIG_SND_HDA_PREALLOC_SIZE=64
+CONFIG_SND_HDA_HWDEP=y
+CONFIG_SND_HDA_RECONFIG=y
+CONFIG_SND_HDA_INPUT_BEEP=y
+CONFIG_SND_HDA_INPUT_BEEP_MODE=1
+CONFIG_SND_HDA_INPUT_JACK=y
+CONFIG_SND_HDA_PATCH_LOADER=y
+CONFIG_SND_HDA_CODEC_REALTEK=y
+CONFIG_SND_HDA_CODEC_ANALOG=y
+CONFIG_SND_HDA_CODEC_SIGMATEL=y
+CONFIG_SND_HDA_CODEC_VIA=y
+CONFIG_SND_HDA_CODEC_HDMI=y
+CONFIG_SND_HDA_CODEC_CIRRUS=y
+CONFIG_SND_HDA_CODEC_CONEXANT=y
+CONFIG_SND_HDA_CODEC_CA0110=y
+CONFIG_SND_HDA_CODEC_CA0132=y
+# CONFIG_SND_HDA_CODEC_CA0132_DSP is not set
+CONFIG_SND_HDA_CODEC_CMEDIA=y
+CONFIG_SND_HDA_CODEC_SI3054=y
+CONFIG_SND_HDA_GENERIC=y
+CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0
+CONFIG_SND_HDSP=y
+
+#
+# Don't forget to add built-in firmwares for HDSP driver
+#
+CONFIG_SND_HDSPM=y
+CONFIG_SND_ICE1712=y
+CONFIG_SND_ICE1724=y
+CONFIG_SND_INTEL8X0=y
+CONFIG_SND_INTEL8X0M=y
+CONFIG_SND_KORG1212=y
+CONFIG_SND_LOLA=y
+CONFIG_SND_LX6464ES=y
+CONFIG_SND_MAESTRO3=y
+CONFIG_SND_MAESTRO3_INPUT=y
+CONFIG_SND_MIXART=y
+CONFIG_SND_NM256=y
+CONFIG_SND_PCXHR=y
+CONFIG_SND_RIPTIDE=y
+CONFIG_SND_RME32=y
+CONFIG_SND_RME96=y
+CONFIG_SND_RME9652=y
+CONFIG_SND_SONICVIBES=y
+CONFIG_SND_TRIDENT=y
+CONFIG_SND_VIA82XX=y
+CONFIG_SND_VIA82XX_MODEM=y
+CONFIG_SND_VIRTUOSO=y
+CONFIG_SND_VX222=y
+CONFIG_SND_YMFPCI=y
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_USB_UA101=y
+CONFIG_SND_USB_USX2Y=y
+CONFIG_SND_USB_CAIAQ=y
+CONFIG_SND_USB_CAIAQ_INPUT=y
+CONFIG_SND_USB_US122L=y
+CONFIG_SND_USB_6FIRE=y
+CONFIG_SND_USB_HIFACE=y
+# CONFIG_SND_SOC is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=y
+
+#
+# HID support
+#
+CONFIG_HID=y
+# CONFIG_HID_BATTERY_STRENGTH is not set
+CONFIG_HIDRAW=y
+# CONFIG_UHID is not set
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=y
+# CONFIG_HID_ACRUX is not set
+CONFIG_HID_APPLE=y
+# CONFIG_HID_APPLEIR is not set
+# CONFIG_HID_AUREAL is not set
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+# CONFIG_HID_PRODIKEYS is not set
+CONFIG_HID_CYPRESS=y
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+CONFIG_HID_ELECOM=y
+# CONFIG_HID_ELO is not set
+CONFIG_HID_EZKEY=y
+# CONFIG_HID_HOLTEK is not set
+# CONFIG_HID_HUION is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_ICADE is not set
+# CONFIG_HID_TWINHAN is not set
+CONFIG_HID_KENSINGTON=y
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LENOVO_TPKBD is not set
+CONFIG_HID_LOGITECH=y
+# CONFIG_HID_LOGITECH_DJ is not set
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
+# CONFIG_LOGIWHEELS_FF is not set
+CONFIG_HID_MAGICMOUSE=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_PRIMAX is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_SAITEK is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SPEEDLINK is not set
+# CONFIG_HID_STEELSERIES is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TIVO is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THINGM is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_WACOM is not set
+# CONFIG_HID_WIIMOTE is not set
+# CONFIG_HID_XINMO is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+# CONFIG_HID_SENSOR_HUB is not set
+
+#
+# USB HID support
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+CONFIG_USB_HIDDEV=y
+
+#
+# I2C HID support
+#
+# CONFIG_I2C_HID is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEFAULT_PERSIST=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_C67X00_HCD=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_PCI=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OXU210HP_HCD=y
+CONFIG_USB_ISP116X_HCD=y
+CONFIG_USB_ISP1760_HCD=y
+CONFIG_USB_ISP1362_HCD=y
+# CONFIG_USB_FUSBH200_HCD is not set
+# CONFIG_USB_FOTG210_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_HCD_SSB=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_UHCI_HCD=y
+CONFIG_USB_SL811_HCD=y
+CONFIG_USB_SL811_HCD_ISO=y
+CONFIG_USB_R8A66597_HCD=y
+CONFIG_USB_HCD_SSB=y
+# CONFIG_USB_HCD_TEST_MODE is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_WDM=y
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_REALTEK=y
+CONFIG_REALTEK_AUTOPM=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_DWC3 is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_CHIPIDEA is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=y
+# CONFIG_USB_SERIAL_CONSOLE is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_SIMPLE is not set
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP210X is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=y
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_F81232 is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_METRO is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MXUPORT is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_XSENS_MT is not set
+# CONFIG_USB_SERIAL_WISHBONE is not set
+# CONFIG_USB_SERIAL_ZTE is not set
+# CONFIG_USB_SERIAL_SSU100 is not set
+# CONFIG_USB_SERIAL_QT2 is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_EHSET_TEST_FIXTURE is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_EZUSB_FX2 is not set
+# CONFIG_USB_HSIC_USB3503 is not set
+
+#
+# USB Physical Layer drivers
+#
+CONFIG_USB_PHY=y
+# CONFIG_USB_OTG_FSM is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_SAMSUNG_USBPHY=y
+CONFIG_SAMSUNG_USB2PHY=y
+CONFIG_SAMSUNG_USB3PHY=y
+# CONFIG_USB_ISP1301 is not set
+# CONFIG_USB_RCAR_PHY is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_LP5562 is not set
+# CONFIG_LEDS_LP8501 is not set
+# CONFIG_LEDS_CLEVO_MAIL is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA963X is not set
+# CONFIG_LEDS_PCA9685 is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_INTEL_SS4200 is not set
+# CONFIG_LEDS_DELL_NETBOOKS is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_LM355x is not set
+# CONFIG_LEDS_OT200 is not set
+# CONFIG_LEDS_BLINKM is not set
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGERS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_SYSTOHC=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_ISL12057 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF2127 is not set
+# CONFIG_RTC_DRV_PCF8523 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+CONFIG_RTC_DRV_CMOS=y
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_RTC_DRV_DS2404 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_MOXART is not set
+
+#
+# HID Sensor RTC drivers
+#
+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_CIF is not set
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_DMEM_GENIRQ is not set
+# CONFIG_UIO_AEC is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_UIO_PCI_GENERIC is not set
+# CONFIG_UIO_NETX is not set
+# CONFIG_UIO_MF624 is not set
+# CONFIG_VIRT_DRIVERS is not set
+
+#
+# Virtio drivers
+#
+# CONFIG_VIRTIO_PCI is not set
+# CONFIG_VIRTIO_MMIO is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+# CONFIG_STAGING is not set
+CONFIG_X86_PLATFORM_DEVICES=y
+# CONFIG_ACER_WMI is not set
+# CONFIG_ACERHDF is not set
+# CONFIG_ASUS_LAPTOP is not set
+# CONFIG_DELL_WMI is not set
+# CONFIG_DELL_WMI_AIO is not set
+# CONFIG_FUJITSU_LAPTOP is not set
+# CONFIG_FUJITSU_TABLET is not set
+# CONFIG_HP_ACCEL is not set
+# CONFIG_HP_WIRELESS is not set
+# CONFIG_HP_WMI is not set
+# CONFIG_PANASONIC_LAPTOP is not set
+# CONFIG_THINKPAD_ACPI is not set
+CONFIG_SENSORS_HDAPS=y
+# CONFIG_INTEL_MENLOW is not set
+CONFIG_ACPI_WMI=y
+# CONFIG_MSI_WMI is not set
+# CONFIG_TOPSTAR_LAPTOP is not set
+# CONFIG_ACPI_TOSHIBA is not set
+CONFIG_TOSHIBA_BT_RFKILL=y
+# CONFIG_ACPI_CMPC is not set
+# CONFIG_INTEL_IPS is not set
+# CONFIG_IBM_RTL is not set
+# CONFIG_XO15_EBOOK is not set
+CONFIG_SAMSUNG_LAPTOP=y
+CONFIG_MXM_WMI=y
+# CONFIG_SAMSUNG_Q10 is not set
+CONFIG_APPLE_GMUX=y
+CONFIG_INTEL_RST=y
+# CONFIG_INTEL_SMARTCONNECT is not set
+# CONFIG_PVPANIC is not set
+# CONFIG_CHROME_PLATFORMS is not set
+
+#
+# Hardware Spinlock drivers
+#
+CONFIG_CLKEVT_I8253=y
+CONFIG_I8253_LOCK=y
+CONFIG_CLKBLD_I8253=y
+# CONFIG_MAILBOX is not set
+# CONFIG_IOMMU_SUPPORT is not set
+
+#
+# Remoteproc drivers
+#
+# CONFIG_STE_MODEM_RPROC is not set
+
+#
+# Rpmsg drivers
+#
+# CONFIG_PM_DEVFREQ is not set
+# CONFIG_EXTCON is not set
+# CONFIG_MEMORY is not set
+# CONFIG_IIO is not set
+# CONFIG_NTB is not set
+# CONFIG_VME_BUS is not set
+# CONFIG_PWM is not set
+# CONFIG_IPACK_BUS is not set
+CONFIG_RESET_CONTROLLER=y
+# CONFIG_FMC is not set
+
+#
+# PHY Subsystem
+#
+CONFIG_GENERIC_PHY=y
+# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set
+# CONFIG_BCM_KONA_USB2_PHY is not set
+# CONFIG_POWERCAP is not set
+
+#
+# Firmware Drivers
+#
+# CONFIG_EDD is not set
+CONFIG_FIRMWARE_MEMMAP=y
+# CONFIG_DELL_RBU is not set
+# CONFIG_DCDBAS is not set
+# CONFIG_DMIID is not set
+# CONFIG_DMI_SYSFS is not set
+CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y
+# CONFIG_ISCSI_IBFT_FIND is not set
+# CONFIG_GOOGLE_FIRMWARE is not set
+
+#
+# File systems
+#
+CONFIG_DCACHE_WORD_ACCESS=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=y
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_BTRFS_FS=y
+CONFIG_BTRFS_FS_POSIX_ACL=y
+# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
+# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
+# CONFIG_BTRFS_DEBUG is not set
+# CONFIG_BTRFS_ASSERT is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=y
+CONFIG_CUSE=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=y
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+CONFIG_HUGETLBFS=y
+CONFIG_HUGETLB_PAGE=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
+# CONFIG_CRAMFS is not set
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_FILE_CACHE=y
+# CONFIG_SQUASHFS_FILE_DIRECT is not set
+# CONFIG_SQUASHFS_DECOMP_SINGLE is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
+CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_ZLIB=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_F2FS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V2=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_SWAP is not set
+# CONFIG_NFS_V4_1 is not set
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_SUNRPC_DEBUG is not set
+# CONFIG_CEPH_FS is not set
+CONFIG_CIFS=y
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_UPCALL is not set
+# CONFIG_CIFS_XATTR is not set
+CONFIG_CIFS_DEBUG=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_DFS_UPCALL is not set
+# CONFIG_CIFS_SMB2 is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=y
+CONFIG_NLS_CODEPAGE_775=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_CODEPAGE_852=y
+CONFIG_NLS_CODEPAGE_855=y
+CONFIG_NLS_CODEPAGE_857=y
+CONFIG_NLS_CODEPAGE_860=y
+CONFIG_NLS_CODEPAGE_861=y
+CONFIG_NLS_CODEPAGE_862=y
+CONFIG_NLS_CODEPAGE_863=y
+CONFIG_NLS_CODEPAGE_864=y
+CONFIG_NLS_CODEPAGE_865=y
+CONFIG_NLS_CODEPAGE_866=y
+CONFIG_NLS_CODEPAGE_869=y
+CONFIG_NLS_CODEPAGE_936=y
+CONFIG_NLS_CODEPAGE_950=y
+CONFIG_NLS_CODEPAGE_932=y
+CONFIG_NLS_CODEPAGE_949=y
+CONFIG_NLS_CODEPAGE_874=y
+CONFIG_NLS_ISO8859_8=y
+CONFIG_NLS_CODEPAGE_1250=y
+CONFIG_NLS_CODEPAGE_1251=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_3=y
+CONFIG_NLS_ISO8859_4=y
+CONFIG_NLS_ISO8859_5=y
+CONFIG_NLS_ISO8859_6=y
+CONFIG_NLS_ISO8859_7=y
+CONFIG_NLS_ISO8859_9=y
+CONFIG_NLS_ISO8859_13=y
+CONFIG_NLS_ISO8859_14=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_KOI8_R=y
+CONFIG_NLS_KOI8_U=y
+CONFIG_NLS_MAC_ROMAN=y
+CONFIG_NLS_MAC_CELTIC=y
+CONFIG_NLS_MAC_CENTEURO=y
+CONFIG_NLS_MAC_CROATIAN=y
+CONFIG_NLS_MAC_CYRILLIC=y
+CONFIG_NLS_MAC_GAELIC=y
+CONFIG_NLS_MAC_GREEK=y
+CONFIG_NLS_MAC_ICELAND=y
+CONFIG_NLS_MAC_INUIT=y
+CONFIG_NLS_MAC_ROMANIAN=y
+CONFIG_NLS_MAC_TURKISH=y
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+
+#
+# printk and dmesg options
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+# CONFIG_BOOT_PRINTK_DELAY is not set
+
+#
+# Compile-time checks and compiler options
+#
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=2048
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_READABLE_ASM is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+# CONFIG_FRAME_POINTER is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_MAGIC_SYSRQ is not set
+CONFIG_DEBUG_KERNEL=y
+
+#
+# Memory Debugging
+#
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_VIRTUAL is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+CONFIG_HAVE_ARCH_KMEMCHECK=y
+# CONFIG_DEBUG_SHIRQ is not set
+
+#
+# Debug Lockups and Hangs
+#
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+CONFIG_PANIC_TIMEOUT=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+CONFIG_DEBUG_PREEMPT=y
+
+#
+# Lock Debugging (spinlocks, mutexes, etc...)
+#
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_LIST=y
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+
+#
+# RCU Debugging
+#
+# CONFIG_PROVE_RCU_DELAY is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_RCU_CPU_STALL_VERBOSE is not set
+# CONFIG_RCU_CPU_STALL_INFO is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_FAULT_INJECTION is not set
+CONFIG_ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS=y
+CONFIG_USER_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_FENTRY=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+
+#
+# Runtime Testing
+#
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_TEST_STRING_HELPERS is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_STRICT_DEVMEM=y
+# CONFIG_X86_VERBOSE_BOOTUP is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_EARLY_PRINTK_DBGP is not set
+# CONFIG_X86_PTDUMP is not set
+CONFIG_DOUBLEFAULT=y
+# CONFIG_DEBUG_TLBFLUSH is not set
+# CONFIG_IOMMU_DEBUG is not set
+# CONFIG_IOMMU_STRESS is not set
+CONFIG_HAVE_MMIOTRACE_SUPPORT=y
+CONFIG_IO_DELAY_TYPE_0X80=0
+CONFIG_IO_DELAY_TYPE_0XED=1
+CONFIG_IO_DELAY_TYPE_UDELAY=2
+CONFIG_IO_DELAY_TYPE_NONE=3
+CONFIG_IO_DELAY_0X80=y
+# CONFIG_IO_DELAY_0XED is not set
+# CONFIG_IO_DELAY_UDELAY is not set
+# CONFIG_IO_DELAY_NONE is not set
+CONFIG_DEFAULT_IO_DELAY_TYPE=0
+# CONFIG_CPA_DEBUG is not set
+# CONFIG_OPTIMIZE_INLINING is not set
+# CONFIG_DEBUG_NMI_SELFTEST is not set
+# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set
+
+#
+# Security options
+#
+
+#
+# Grsecurity
+#
+CONFIG_PAX_KERNEXEC_PLUGIN=y
+CONFIG_PAX_PER_CPU_PGD=y
+CONFIG_TASK_SIZE_MAX_SHIFT=42
+CONFIG_PAX_USERCOPY_SLABS=y
+CONFIG_GRKERNSEC=y
+# CONFIG_GRKERNSEC_CONFIG_AUTO is not set
+CONFIG_GRKERNSEC_CONFIG_CUSTOM=y
+CONFIG_GRKERNSEC_TPE_TRUSTED_GID=10
+CONFIG_GRKERNSEC_SYMLINKOWN_GID=100
+
+#
+# Customize Configuration
+#
+
+#
+# PaX
+#
+CONFIG_PAX=y
+
+#
+# PaX Control
+#
+# CONFIG_PAX_SOFTMODE is not set
+CONFIG_PAX_PT_PAX_FLAGS=y
+# CONFIG_PAX_XATTR_PAX_FLAGS is not set
+# CONFIG_PAX_NO_ACL_FLAGS is not set
+CONFIG_PAX_HAVE_ACL_FLAGS=y
+# CONFIG_PAX_HOOK_ACL_FLAGS is not set
+
+#
+# Non-executable pages
+#
+CONFIG_PAX_NOEXEC=y
+CONFIG_PAX_PAGEEXEC=y
+# CONFIG_PAX_EMUTRAMP is not set
+CONFIG_PAX_MPROTECT=y
+# CONFIG_PAX_MPROTECT_COMPAT is not set
+# CONFIG_PAX_ELFRELOCS is not set
+CONFIG_PAX_KERNEXEC=y
+# CONFIG_PAX_KERNEXEC_PLUGIN_METHOD_BTS is not set
+CONFIG_PAX_KERNEXEC_PLUGIN_METHOD_OR=y
+CONFIG_PAX_KERNEXEC_PLUGIN_METHOD="or"
+
+#
+# Address Space Layout Randomization
+#
+CONFIG_PAX_ASLR=y
+CONFIG_PAX_RANDKSTACK=y
+CONFIG_PAX_RANDUSTACK=y
+CONFIG_PAX_RANDMMAP=y
+
+#
+# Miscellaneous hardening features
+#
+CONFIG_PAX_MEMORY_SANITIZE=y
+CONFIG_PAX_MEMORY_STACKLEAK=y
+# CONFIG_PAX_MEMORY_STRUCTLEAK is not set
+CONFIG_PAX_MEMORY_UDEREF=y
+CONFIG_PAX_REFCOUNT=y
+CONFIG_PAX_CONSTIFY_PLUGIN=y
+CONFIG_PAX_USERCOPY=y
+# CONFIG_PAX_USERCOPY_DEBUG is not set
+CONFIG_PAX_SIZE_OVERFLOW=y
+# CONFIG_PAX_LATENT_ENTROPY is not set
+
+#
+# Memory Protections
+#
+CONFIG_GRKERNSEC_KMEM=y
+# CONFIG_GRKERNSEC_IO is not set
+# CONFIG_GRKERNSEC_PERF_HARDEN is not set
+CONFIG_GRKERNSEC_RAND_THREADSTACK=y
+CONFIG_GRKERNSEC_PROC_MEMMAP=y
+CONFIG_GRKERNSEC_BRUTE=y
+CONFIG_GRKERNSEC_HIDESYM=y
+# CONFIG_GRKERNSEC_RANDSTRUCT is not set
+CONFIG_GRKERNSEC_KERN_LOCKOUT=y
+
+#
+# Role Based Access Control Options
+#
+# CONFIG_GRKERNSEC_NO_RBAC is not set
+CONFIG_GRKERNSEC_ACL_HIDEKERN=y
+CONFIG_GRKERNSEC_ACL_MAXTRIES=3
+CONFIG_GRKERNSEC_ACL_TIMEOUT=30
+
+#
+# Filesystem Protections
+#
+CONFIG_GRKERNSEC_PROC=y
+# CONFIG_GRKERNSEC_PROC_USER is not set
+# CONFIG_GRKERNSEC_PROC_USERGROUP is not set
+CONFIG_GRKERNSEC_LINK=y
+CONFIG_GRKERNSEC_SYMLINKOWN=y
+CONFIG_GRKERNSEC_FIFO=y
+CONFIG_GRKERNSEC_SYSFS_RESTRICT=y
+# CONFIG_GRKERNSEC_ROFS is not set
+CONFIG_GRKERNSEC_DEVICE_SIDECHANNEL=y
+CONFIG_GRKERNSEC_CHROOT=y
+CONFIG_GRKERNSEC_CHROOT_MOUNT=y
+CONFIG_GRKERNSEC_CHROOT_DOUBLE=y
+CONFIG_GRKERNSEC_CHROOT_PIVOT=y
+CONFIG_GRKERNSEC_CHROOT_CHDIR=y
+CONFIG_GRKERNSEC_CHROOT_CHMOD=y
+CONFIG_GRKERNSEC_CHROOT_FCHDIR=y
+CONFIG_GRKERNSEC_CHROOT_MKNOD=y
+CONFIG_GRKERNSEC_CHROOT_SHMAT=y
+CONFIG_GRKERNSEC_CHROOT_UNIX=y
+CONFIG_GRKERNSEC_CHROOT_FINDTASK=y
+CONFIG_GRKERNSEC_CHROOT_NICE=y
+CONFIG_GRKERNSEC_CHROOT_SYSCTL=y
+CONFIG_GRKERNSEC_CHROOT_CAPS=y
+# CONFIG_GRKERNSEC_CHROOT_INITRD is not set
+
+#
+# Kernel Auditing
+#
+CONFIG_GRKERNSEC_AUDIT_GROUP=y
+CONFIG_GRKERNSEC_AUDIT_GID=9997
+# CONFIG_GRKERNSEC_EXECLOG is not set
+CONFIG_GRKERNSEC_RESLOG=y
+CONFIG_GRKERNSEC_CHROOT_EXECLOG=y
+CONFIG_GRKERNSEC_AUDIT_PTRACE=y
+CONFIG_GRKERNSEC_AUDIT_CHDIR=y
+CONFIG_GRKERNSEC_AUDIT_MOUNT=y
+CONFIG_GRKERNSEC_SIGNAL=y
+CONFIG_GRKERNSEC_FORKFAIL=y
+CONFIG_GRKERNSEC_TIME=y
+CONFIG_GRKERNSEC_PROC_IPADDR=y
+CONFIG_GRKERNSEC_RWXMAP_LOG=y
+
+#
+# Executable Protections
+#
+CONFIG_GRKERNSEC_DMESG=y
+CONFIG_GRKERNSEC_HARDEN_PTRACE=y
+CONFIG_GRKERNSEC_PTRACE_READEXEC=y
+CONFIG_GRKERNSEC_SETXID=y
+# CONFIG_GRKERNSEC_HARDEN_IPC is not set
+CONFIG_GRKERNSEC_TPE=y
+# CONFIG_GRKERNSEC_TPE_ALL is not set
+CONFIG_GRKERNSEC_TPE_INVERT=y
+CONFIG_GRKERNSEC_TPE_GID=10
+
+#
+# Network Protections
+#
+CONFIG_GRKERNSEC_RANDNET=y
+CONFIG_GRKERNSEC_BLACKHOLE=y
+CONFIG_GRKERNSEC_NO_SIMULT_CONNECT=y
+CONFIG_GRKERNSEC_SOCKET=y
+CONFIG_GRKERNSEC_SOCKET_ALL=y
+CONFIG_GRKERNSEC_SOCKET_ALL_GID=9994
+CONFIG_GRKERNSEC_SOCKET_CLIENT=y
+CONFIG_GRKERNSEC_SOCKET_CLIENT_GID=9993
+CONFIG_GRKERNSEC_SOCKET_SERVER=y
+CONFIG_GRKERNSEC_SOCKET_SERVER_GID=9992
+
+#
+# Physical Protections
+#
+# CONFIG_GRKERNSEC_DENYUSB is not set
+
+#
+# Sysctl Support
+#
+CONFIG_GRKERNSEC_SYSCTL=y
+CONFIG_GRKERNSEC_SYSCTL_ON=y
+
+#
+# Logging Options
+#
+CONFIG_GRKERNSEC_FLOODTIME=10
+CONFIG_GRKERNSEC_FLOODBURST=4
+CONFIG_KEYS=y
+# CONFIG_PERSISTENT_KEYRINGS is not set
+# CONFIG_BIG_KEYS is not set
+# CONFIG_ENCRYPTED_KEYS is not set
+# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_XOR_BLOCKS=y
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_USER is not set
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_PCRYPT=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_CRYPTD=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_ABLK_HELPER=y
+CONFIG_CRYPTO_GLUE_HELPER_X86=y
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_SEQIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CTS=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_LRW=y
+CONFIG_CRYPTO_PCBC=y
+CONFIG_CRYPTO_XTS=y
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_XCBC=y
+CONFIG_CRYPTO_VMAC=y
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_CRC32C_INTEL=y
+# CONFIG_CRYPTO_CRC32 is not set
+# CONFIG_CRYPTO_CRC32_PCLMUL is not set
+CONFIG_CRYPTO_CRCT10DIF=y
+# CONFIG_CRYPTO_CRCT10DIF_PCLMUL is not set
+CONFIG_CRYPTO_GHASH=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_RMD128=y
+CONFIG_CRYPTO_RMD160=y
+CONFIG_CRYPTO_RMD256=y
+CONFIG_CRYPTO_RMD320=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA1_SSSE3=y
+# CONFIG_CRYPTO_SHA256_SSSE3 is not set
+# CONFIG_CRYPTO_SHA512_SSSE3 is not set
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_TGR192=y
+CONFIG_CRYPTO_WP512=y
+CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=y
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES_X86_64=y
+CONFIG_CRYPTO_AES_NI_INTEL=y
+CONFIG_CRYPTO_ANUBIS=y
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_BLOWFISH_COMMON=y
+CONFIG_CRYPTO_BLOWFISH_X86_64=y
+CONFIG_CRYPTO_CAMELLIA=y
+CONFIG_CRYPTO_CAMELLIA_X86_64=y
+# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set
+# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set
+CONFIG_CRYPTO_CAST_COMMON=y
+CONFIG_CRYPTO_CAST5=y
+CONFIG_CRYPTO_CAST5_AVX_X86_64=y
+CONFIG_CRYPTO_CAST6=y
+CONFIG_CRYPTO_CAST6_AVX_X86_64=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_FCRYPT=y
+CONFIG_CRYPTO_KHAZAD=y
+CONFIG_CRYPTO_SALSA20=y
+CONFIG_CRYPTO_SALSA20_X86_64=y
+CONFIG_CRYPTO_SEED=y
+CONFIG_CRYPTO_SERPENT=y
+CONFIG_CRYPTO_SERPENT_SSE2_X86_64=y
+CONFIG_CRYPTO_SERPENT_AVX_X86_64=y
+# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set
+CONFIG_CRYPTO_TEA=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+CONFIG_CRYPTO_TWOFISH_X86_64=y
+CONFIG_CRYPTO_TWOFISH_X86_64_3WAY=y
+CONFIG_CRYPTO_TWOFISH_AVX_X86_64=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ZLIB=y
+CONFIG_CRYPTO_LZO=y
+# CONFIG_CRYPTO_LZ4 is not set
+# CONFIG_CRYPTO_LZ4HC is not set
+
+#
+# Random Number Generation
+#
+CONFIG_CRYPTO_ANSI_CPRNG=y
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+CONFIG_CRYPTO_HASH_INFO=y
+# CONFIG_CRYPTO_HW is not set
+CONFIG_ASYMMETRIC_KEY_TYPE=y
+CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
+CONFIG_PUBLIC_KEY_ALGO_RSA=y
+CONFIG_X509_CERTIFICATE_PARSER=y
+CONFIG_HAVE_KVM=y
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_RAID6_PQ=y
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_NET_UTILS=y
+CONFIG_GENERIC_FIND_FIRST_BIT=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_IOMAP=y
+CONFIG_GENERIC_IO=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC32_SELFTEST=y
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+CONFIG_CRC7=y
+CONFIG_LIBCRC32C=y
+CONFIG_CRC8=y
+# CONFIG_RANDOM32_SELFTEST is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_LZ4_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+CONFIG_XZ_DEC_X86=y
+CONFIG_XZ_DEC_POWERPC=y
+CONFIG_XZ_DEC_IA64=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_ARMTHUMB=y
+CONFIG_XZ_DEC_SPARC=y
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_XZ_DEC_TEST=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_DECOMPRESS_LZ4=y
+CONFIG_ASSOCIATIVE_ARRAY=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_CPU_RMAP=y
+CONFIG_DQL=y
+CONFIG_NLATTR=y
+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
+CONFIG_AVERAGE=y
+CONFIG_CLZ_TAB=y
+CONFIG_CORDIC=y
+CONFIG_DDR=y
+CONFIG_MPILIB=y
+CONFIG_OID_REGISTRY=y
+CONFIG_FONT_SUPPORT=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
diff --git a/tools-hardened/desktop/files/kernel-config b/tools-hardened/desktop/files/kernel-config
index a13402d..1599807 120000
--- a/tools-hardened/desktop/files/kernel-config
+++ b/tools-hardened/desktop/files/kernel-config
@@ -1 +1 @@
-3.13.5-hardened.config
\ No newline at end of file
+3.14.2-hardened-r1.config
\ No newline at end of file
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2014-05-06 19:27 [gentoo-commits] proj/releng:master commit in: tools-hardened/desktop/, tools-hardened/desktop/configs/, Devan Franchini
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