* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-06-25 18:45 Sebastian Pipping
0 siblings, 0 replies; 17+ messages in thread
From: Sebastian Pipping @ 2011-06-25 18:45 UTC (permalink / raw
To: gentoo-commits
commit: 93bd6040e6324299664bdeb132ce2a725c8f1b30
Author: Sebastian Pipping <sebastian <AT> pipping <DOT> org>
AuthorDate: Sat Jun 25 18:45:12 2011 +0000
Commit: Sebastian Pipping <sping <AT> gentoo <DOT> org>
CommitDate: Sat Jun 25 18:45:12 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=93bd6040
Resolve duplicate class arch_sh4aeb
---
modules/catalyst/arch/sh.py | 7 -------
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/modules/catalyst/arch/sh.py b/modules/catalyst/arch/sh.py
index 0058152..363fe15 100644
--- a/modules/catalyst/arch/sh.py
+++ b/modules/catalyst/arch/sh.py
@@ -62,13 +62,6 @@ class arch_sheb(generic_sheb):
self.settings["CFLAGS"]="-O2 -pipe"
self.settings["CHOST"]="sheb-unknown-linux-gnu"
-class arch_sh4aeb(generic_sheb):
- "Builder class for SH-4A [Big-endian]"
- def __init__(self,myspec):
- generic_sheb.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -m4a -pipe"
- self.settings["CHOST"]="sh4aeb-unknown-linux-gnu"
-
class arch_sh2eb(generic_sheb):
"Builder class for SH-2 [Big-endian]"
def __init__(self,myspec):
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-06-28 2:54 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-06-28 2:54 UTC (permalink / raw
To: gentoo-commits
commit: d1c26d0eff8b75e8aa8692e4bc41fc135965ddb6
Author: Matt Turner <mattst88 <AT> gentoo <DOT> org>
AuthorDate: Tue Jun 28 00:54:25 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jun 28 00:54:25 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=d1c26d0e
mips.py: include R4x00 and loongson workarounds in mips3
---
modules/catalyst/arch/mips.py | 16 ++++++++--------
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 4c4af0c..16ec207 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -45,26 +45,26 @@ class arch_mips3(generic_mips):
"Builder class for MIPS III [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips3_n32(generic_mips64):
"Builder class for MIPS III [Big-endian N32]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips3_n64(generic_mips64):
"Builder class for MIPS III [Big-endian N64]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+ self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips3_multilib(generic_mips64,generic_multilib):
"Builder class for MIPS III [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
generic_multilib.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+ self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips4(generic_mips64):
"Builder class for MIPS IV [Big-endian]"
@@ -101,26 +101,26 @@ class arch_mipsel3(generic_mipsel):
"Builder class for all MIPS III [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_n32(generic_mips64el):
"Builder class for all MIPS III [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_n64(generic_mips64el):
"Builder class for MIPS III [Little-endian N64]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+ self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_multilib(generic_mips64el,generic_multilib):
"Builder class for MIPS III [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
generic_multilib.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+ self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2e(generic_mipsel):
"Builder class for all Loongson 2E [Little-endian]"
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-07-16 21:17 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-07-16 21:17 UTC (permalink / raw
To: gentoo-commits
commit: fe2c40a88e1240354fba138e1e0039a89227d47f
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Jul 16 18:31:56 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Jul 16 18:31:56 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=fe2c40a8
mips.py: add mips32 and mips64 builder classes
Signed-off-by: Matt Turner <mattst88 <AT> gmail.com>
---
modules/catalyst/arch/mips.py | 72 +++++++++++++++++++++++++++++++++++++++++
1 files changed, 72 insertions(+), 0 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 16ec207..5d43842 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -41,6 +41,12 @@ class arch_mips1(generic_mips):
generic_mips.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
+class arch_mips32(generic_mips):
+ "Builder class for MIPS 32 [Big-endian]"
+ def __init__(self,myspec):
+ generic_mips.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mfix-24k -mabi=32 -pipe"
+
class arch_mips3(generic_mips):
"Builder class for MIPS III [Big-endian]"
def __init__(self,myspec):
@@ -91,12 +97,43 @@ class arch_mips4_multilib(generic_mips64,generic_multilib):
generic_multilib.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+class arch_mips64(generic_mips64):
+ "Builder class for MIPS 64 [Big-endian]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
+
+class arch_mips64_n32(generic_mips64):
+ "Builder class for MIPS 64 [Big-endian N32]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
+
+class arch_mips64_n64(generic_mips64):
+ "Builder class for MIPS 64 [Big-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=64 -pipe"
+
+class arch_mips64_multilib(generic_mips64,generic_multilib):
+ "Builder class for MIPS 64 [Big-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ generic_multilib.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+
class arch_mipsel1(generic_mipsel):
"Builder class for all MIPS I [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
+class arch_mips32el(generic_mipsel):
+ "Builder class for all MIPS 32 [Little-endian]"
+ def __init__(self,myspec):
+ generic_mipsel.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mfix-24k -mabi=32 -pipe"
+
class arch_mipsel3(generic_mipsel):
"Builder class for all MIPS III [Little-endian]"
def __init__(self,myspec):
@@ -171,6 +208,31 @@ class arch_mipsel4_multilib(generic_mips64el,generic_multilib):
generic_multilib.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+class arch_mips64el(generic_mips64el):
+ "Builder class for all MIPS 64 [Little-endian]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
+
+class arch_mips64el_n32(generic_mips64el):
+ "Builder class for all MIPS 64 [Little-endian N32]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
+
+class arch_mips64el_n64(generic_mips64el):
+ "Builder class for MIPS 64 [Little-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=64 -pipe"
+
+class arch_mips64el_multilib(generic_mips64el,generic_multilib):
+ "Builder class for MIPS 64 [Little-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ generic_multilib.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+
class arch_cobalt(generic_mipsel):
"Builder class for all cobalt [Little-endian]"
def __init__(self,myspec):
@@ -190,6 +252,7 @@ _subarch_map = {
"cobalt_n32" : arch_cobalt_n32,
"mips" : arch_mips1,
"mips1" : arch_mips1,
+ "mips32" : arch_mips32,
"mips3" : arch_mips3,
"mips3_n32" : arch_mips3_n32,
"mips3_n64" : arch_mips3_n64,
@@ -198,8 +261,13 @@ _subarch_map = {
"mips4_n32" : arch_mips4_n32,
"mips4_n64" : arch_mips4_n64,
"mips4_multilib": arch_mips4_multilib,
+ "mips64" : arch_mips64,
+ "mips64_n32" : arch_mips64_n32,
+ "mips64_n64" : arch_mips64_n64,
+ "mips64_multilib" : arch_mips64_multilib,
"mipsel" : arch_mipsel1,
"mipsel1" : arch_mipsel1,
+ "mips32el" : arch_mips32el,
"mipsel3" : arch_mipsel3,
"mipsel3_n32" : arch_mipsel3_n32,
"mipsel3_n64" : arch_mipsel3_n64,
@@ -208,6 +276,10 @@ _subarch_map = {
"mipsel4_n32" : arch_mipsel4_n32,
"mipsel4_n64" : arch_mipsel4_n64,
"mipsel4_multilib" : arch_mipsel4_multilib,
+ "mips64el" : arch_mips64el,
+ "mips64el_n32" : arch_mips64el_n32,
+ "mips64el_n64" : arch_mips64el_n64,
+ "mips64el_multilib" : arch_mips64el_multilib,
"loongson2e" : arch_loongson2e,
"loongson2e_n32" : arch_loongson2e_n32,
"loongson2f" : arch_loongson2f,
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-07-21 4:44 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-07-21 4:44 UTC (permalink / raw
To: gentoo-commits
commit: b0ee113f0f6dc0f2e7d23204bdc096c6582d6bbd
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Tue Jul 19 17:01:48 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jul 19 17:01:48 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=b0ee113f
mips.py: remove unnecessary generic_multilib class
It only served to add the "multilib" USE flag, which is already provided
by the multilib profiles.
Signed-off-by: Matt Turner <mattst88 <AT> gmail.com>
---
modules/catalyst/arch/mips.py | 24 ++++++------------------
1 files changed, 6 insertions(+), 18 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 0c5263a..094304a 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -29,12 +29,6 @@ class generic_mips64el(catalyst.arch.generic_arch):
self.settings["CHROOT"]="chroot"
self.settings["CHOST"]="mips64el-unknown-linux-gnu"
-class generic_multilib(catalyst.arch.generic_arch):
- "Abstract base class for MIPS multilib"
- def __init__(self,myspec):
- catalyst.arch.generic_arch.__init__(self,myspec)
- self.settings["HOSTUSE"]=["multilib"]
-
class arch_mips1(generic_mips):
"Builder class for MIPS I [Big-endian]"
def __init__(self,myspec):
@@ -65,11 +59,10 @@ class arch_mips3_n64(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
-class arch_mips3_multilib(generic_mips64,generic_multilib):
+class arch_mips3_multilib(generic_mips64):
"Builder class for MIPS III [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- generic_multilib.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips4(generic_mips64):
@@ -90,11 +83,10 @@ class arch_mips4_n64(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
-class arch_mips4_multilib(generic_mips64,generic_multilib):
+class arch_mips4_multilib(generic_mips64):
"Builder class for MIPS IV [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- generic_multilib.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -pipe"
class arch_mips64(generic_mips64):
@@ -115,11 +107,10 @@ class arch_mips64_n64(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=64 -pipe"
-class arch_mips64_multilib(generic_mips64,generic_multilib):
+class arch_mips64_multilib(generic_mips64):
"Builder class for MIPS 64 [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- generic_multilib.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
class arch_mipsel1(generic_mipsel):
@@ -152,11 +143,10 @@ class arch_mipsel3_n64(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
-class arch_mipsel3_multilib(generic_mips64el,generic_multilib):
+class arch_mipsel3_multilib(generic_mips64el):
"Builder class for MIPS III [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- generic_multilib.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2e(generic_mipsel):
@@ -201,11 +191,10 @@ class arch_mipsel4_n64(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
-class arch_mipsel4_multilib(generic_mips64el,generic_multilib):
+class arch_mipsel4_multilib(generic_mips64el):
"Builder class for MIPS IV [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- generic_multilib.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -pipe"
class arch_mips64el(generic_mips64el):
@@ -226,11 +215,10 @@ class arch_mips64el_n64(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=64 -pipe"
-class arch_mips64el_multilib(generic_mips64el,generic_multilib):
+class arch_mips64el_multilib(generic_mips64el):
"Builder class for MIPS 64 [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- generic_multilib.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
class arch_cobalt(generic_mipsel):
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-07-21 4:44 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-07-21 4:44 UTC (permalink / raw
To: gentoo-commits
commit: 0b2ede1372b057338df06e2e03f3ca460a4a5017
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Tue Jul 19 16:59:27 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jul 19 16:59:27 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=0b2ede13
mips.py: remove -mfix-24k from CFLAGS, it apparently doesn't exist
Signed-off-by: Matt Turner <mattst88 <AT> gmail.com>
---
modules/catalyst/arch/mips.py | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 5d43842..0c5263a 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -45,7 +45,7 @@ class arch_mips32(generic_mips):
"Builder class for MIPS 32 [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32 -mfix-24k -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
class arch_mips3(generic_mips):
"Builder class for MIPS III [Big-endian]"
@@ -132,7 +132,7 @@ class arch_mips32el(generic_mipsel):
"Builder class for all MIPS 32 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32 -mfix-24k -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
class arch_mipsel3(generic_mipsel):
"Builder class for all MIPS III [Little-endian]"
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-07-21 4:44 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-07-21 4:44 UTC (permalink / raw
To: gentoo-commits
commit: 633b3468fcc95a61568a5a695c89b4b86dfb2cbb
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Tue Jul 19 17:09:33 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Tue Jul 19 17:09:33 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=633b3468
mips.py: mips/o32 classes should inherit generic_mips{,el}
generic_mips64{,el} should only be used for n32/n64/multilib.
Signed-off-by: Matt Turner <mattst88 <AT> gmail.com>
---
modules/catalyst/arch/mips.py | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 094304a..4b05551 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -65,7 +65,7 @@ class arch_mips3_multilib(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
-class arch_mips4(generic_mips64):
+class arch_mips4(generic_mips):
"Builder class for MIPS IV [Big-endian]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
@@ -89,7 +89,7 @@ class arch_mips4_multilib(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -pipe"
-class arch_mips64(generic_mips64):
+class arch_mips64(generic_mips):
"Builder class for MIPS 64 [Big-endian]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
@@ -173,7 +173,7 @@ class arch_loongson2f_n32(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
-class arch_mipsel4(generic_mips64el):
+class arch_mipsel4(generic_mipsel):
"Builder class for all MIPS IV [Little-endian]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
@@ -197,7 +197,7 @@ class arch_mipsel4_multilib(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -pipe"
-class arch_mips64el(generic_mips64el):
+class arch_mips64el(generic_mipsel):
"Builder class for all MIPS 64 [Little-endian]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-08-17 4:23 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-08-17 4:23 UTC (permalink / raw
To: gentoo-commits
commit: 4f59e74e5266cb2b9bb1693036fc869973fd69ae
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Wed Aug 17 04:09:58 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Wed Aug 17 04:09:58 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=4f59e74e
mips.py: add mips32r2 and mips64r2 builder classes
---
modules/catalyst/arch/mips.py | 70 +++++++++++++++++++++++++++++++++++++++++
1 files changed, 70 insertions(+), 0 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 4b05551..f042af4 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -41,6 +41,12 @@ class arch_mips32(generic_mips):
generic_mips.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+class arch_mips32r2(generic_mips):
+ "Builder class for MIPS 32r2 [Big-endian]"
+ def __init__(self,myspec):
+ generic_mips.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+
class arch_mips3(generic_mips):
"Builder class for MIPS III [Big-endian]"
def __init__(self,myspec):
@@ -113,6 +119,30 @@ class arch_mips64_multilib(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+class arch_mips64r2(generic_mips):
+ "Builder class for MIPS 64r2 [Big-endian]"
+ def __init__(self,myspec):
+ generic_mips.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
+
+class arch_mips64r2_n32(generic_mips64):
+ "Builder class for MIPS 64r2 [Big-endian N32]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
+
+class arch_mips64r2_n64(generic_mips64):
+ "Builder class for MIPS 64r2 [Big-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=64 -pipe"
+
+class arch_mips64r2_multilib(generic_mips64):
+ "Builder class for MIPS 64r2 [Big-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
+
class arch_mipsel1(generic_mipsel):
"Builder class for all MIPS I [Little-endian]"
def __init__(self,myspec):
@@ -125,6 +155,12 @@ class arch_mips32el(generic_mipsel):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+class arch_mips32r2el(generic_mipsel):
+ "Builder class for all MIPS 32r2 [Little-endian]"
+ def __init__(self,myspec):
+ generic_mipsel.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+
class arch_mipsel3(generic_mipsel):
"Builder class for all MIPS III [Little-endian]"
def __init__(self,myspec):
@@ -221,6 +257,30 @@ class arch_mips64el_multilib(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+class arch_mips64r2el(generic_mipsel):
+ "Builder class for all MIPS 64r2 [Little-endian]"
+ def __init__(self,myspec):
+ generic_mipsel.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
+
+class arch_mips64r2el_n32(generic_mips64el):
+ "Builder class for all MIPS 64r2 [Little-endian N32]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
+
+class arch_mips64r2el_n64(generic_mips64el):
+ "Builder class for MIPS 64r2 [Little-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=64 -pipe"
+
+class arch_mips64r2el_multilib(generic_mips64el):
+ "Builder class for MIPS 64r2 [Little-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
+
class arch_cobalt(generic_mipsel):
"Builder class for all cobalt [Little-endian]"
def __init__(self,myspec):
@@ -241,6 +301,7 @@ _subarch_map = {
"mips" : arch_mips1,
"mips1" : arch_mips1,
"mips32" : arch_mips32,
+ "mips32r2" : arch_mips32r2,
"mips3" : arch_mips3,
"mips3_n32" : arch_mips3_n32,
"mips3_n64" : arch_mips3_n64,
@@ -253,9 +314,14 @@ _subarch_map = {
"mips64_n32" : arch_mips64_n32,
"mips64_n64" : arch_mips64_n64,
"mips64_multilib" : arch_mips64_multilib,
+ "mips64r2" : arch_mips64r2,
+ "mips64r2_n32" : arch_mips64r2_n32,
+ "mips64r2_n64" : arch_mips64r2_n64,
+ "mips64r2_multilib" : arch_mips64r2_multilib,
"mipsel" : arch_mipsel1,
"mipsel1" : arch_mipsel1,
"mips32el" : arch_mips32el,
+ "mips32r2el" : arch_mips32r2el,
"mipsel3" : arch_mipsel3,
"mipsel3_n32" : arch_mipsel3_n32,
"mipsel3_n64" : arch_mipsel3_n64,
@@ -268,6 +334,10 @@ _subarch_map = {
"mips64el_n32" : arch_mips64el_n32,
"mips64el_n64" : arch_mips64el_n64,
"mips64el_multilib" : arch_mips64el_multilib,
+ "mips64r2el" : arch_mips64r2el,
+ "mips64r2el_n32" : arch_mips64r2el_n32,
+ "mips64r2el_n64" : arch_mips64r2el_n64,
+ "mips64r2el_multilib" : arch_mips64r2el_multilib,
"loongson2e" : arch_loongson2e,
"loongson2e_n32" : arch_loongson2e_n32,
"loongson2f" : arch_loongson2f,
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-08-17 4:23 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-08-17 4:23 UTC (permalink / raw
To: gentoo-commits
commit: 793079a01f38299f91d1821096500f36cae5eb6c
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Wed Aug 17 04:16:59 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Wed Aug 17 04:16:59 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=793079a0
mips.py: call correct constructor in o32 classes
---
modules/catalyst/arch/mips.py | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index f042af4..af962c4 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -74,7 +74,7 @@ class arch_mips3_multilib(generic_mips64):
class arch_mips4(generic_mips):
"Builder class for MIPS IV [Big-endian]"
def __init__(self,myspec):
- generic_mips64.__init__(self,myspec)
+ generic_mips.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
class arch_mips4_n32(generic_mips64):
@@ -98,7 +98,7 @@ class arch_mips4_multilib(generic_mips64):
class arch_mips64(generic_mips):
"Builder class for MIPS 64 [Big-endian]"
def __init__(self,myspec):
- generic_mips64.__init__(self,myspec)
+ generic_mips.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
class arch_mips64_n32(generic_mips64):
@@ -212,7 +212,7 @@ class arch_loongson2f_n32(generic_mips64el):
class arch_mipsel4(generic_mipsel):
"Builder class for all MIPS IV [Little-endian]"
def __init__(self,myspec):
- generic_mips64el.__init__(self,myspec)
+ generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
class arch_mipsel4_n32(generic_mips64el):
@@ -236,7 +236,7 @@ class arch_mipsel4_multilib(generic_mips64el):
class arch_mips64el(generic_mipsel):
"Builder class for all MIPS 64 [Little-endian]"
def __init__(self,myspec):
- generic_mips64el.__init__(self,myspec)
+ generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
class arch_mips64el_n32(generic_mips64el):
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-08-17 4:23 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-08-17 4:23 UTC (permalink / raw
To: gentoo-commits
commit: 579e694d144f6e3b7985ce5355f18daba4b2be9b
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Wed Aug 17 04:17:16 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Wed Aug 17 04:17:16 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=579e694d
mips.py: remove incorrect word 'all' from descriptions
---
modules/catalyst/arch/mips.py | 34 +++++++++++++++++-----------------
1 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index af962c4..f2fb0c8 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -144,31 +144,31 @@ class arch_mips64r2_multilib(generic_mips64):
self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
class arch_mipsel1(generic_mipsel):
- "Builder class for all MIPS I [Little-endian]"
+ "Builder class for MIPS I [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
class arch_mips32el(generic_mipsel):
- "Builder class for all MIPS 32 [Little-endian]"
+ "Builder class for MIPS 32 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
class arch_mips32r2el(generic_mipsel):
- "Builder class for all MIPS 32r2 [Little-endian]"
+ "Builder class for MIPS 32r2 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
class arch_mipsel3(generic_mipsel):
- "Builder class for all MIPS III [Little-endian]"
+ "Builder class for MIPS III [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_n32(generic_mips64el):
- "Builder class for all MIPS III [Little-endian N32]"
+ "Builder class for MIPS III [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
@@ -186,37 +186,37 @@ class arch_mipsel3_multilib(generic_mips64el):
self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2e(generic_mipsel):
- "Builder class for all Loongson 2E [Little-endian]"
+ "Builder class for Loongson 2E [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=32 -pipe -mplt"
class arch_loongson2e_n32(generic_mips64el):
- "Builder class for all Loongson 2E [Little-endian N32]"
+ "Builder class for Loongson 2E [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -pipe -mplt"
class arch_loongson2f(generic_mipsel):
- "Builder class for all Loongson 2F [Little-endian]"
+ "Builder class for Loongson 2F [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
class arch_loongson2f_n32(generic_mips64el):
- "Builder class for all Loongson 2F [Little-endian N32]"
+ "Builder class for Loongson 2F [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
class arch_mipsel4(generic_mipsel):
- "Builder class for all MIPS IV [Little-endian]"
+ "Builder class for MIPS IV [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
class arch_mipsel4_n32(generic_mips64el):
- "Builder class for all MIPS IV [Little-endian N32]"
+ "Builder class for MIPS IV [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
@@ -234,13 +234,13 @@ class arch_mipsel4_multilib(generic_mips64el):
self.settings["CFLAGS"]="-O2 -mips4 -pipe"
class arch_mips64el(generic_mipsel):
- "Builder class for all MIPS 64 [Little-endian]"
+ "Builder class for MIPS 64 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
class arch_mips64el_n32(generic_mips64el):
- "Builder class for all MIPS 64 [Little-endian N32]"
+ "Builder class for MIPS 64 [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
@@ -258,13 +258,13 @@ class arch_mips64el_multilib(generic_mips64el):
self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
class arch_mips64r2el(generic_mipsel):
- "Builder class for all MIPS 64r2 [Little-endian]"
+ "Builder class for MIPS 64r2 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
class arch_mips64r2el_n32(generic_mips64el):
- "Builder class for all MIPS 64r2 [Little-endian N32]"
+ "Builder class for MIPS 64r2 [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
@@ -282,14 +282,14 @@ class arch_mips64r2el_multilib(generic_mips64el):
self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
class arch_cobalt(generic_mipsel):
- "Builder class for all cobalt [Little-endian]"
+ "Builder class for cobalt [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=32 -pipe"
self.settings["HOSTUSE"]=["cobalt"]
class arch_cobalt_n32(generic_mips64el):
- "Builder class for all cobalt [Little-endian N32]"
+ "Builder class for cobalt [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -pipe"
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-08-21 23:23 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-08-21 23:23 UTC (permalink / raw
To: gentoo-commits
commit: b87c3ba69dc8e3a6b596df7392a0a44ac9745ce0
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sun Aug 21 23:20:16 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sun Aug 21 23:20:16 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=b87c3ba6
mips.py: add mips4_r10k classes
---
modules/catalyst/arch/mips.py | 28 ++++++++++++++++++++++++++++
1 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index f2fb0c8..9296069 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -95,6 +95,30 @@ class arch_mips4_multilib(generic_mips64):
generic_mips64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+class arch_mips4_r10k(generic_mips):
+ "Builder class for MIPS IV R10k [Big-endian]"
+ def __init__(self,myspec):
+ generic_mips.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=r10k -mabi=32 -pipe"
+
+class arch_mips4_r10k_n32(generic_mips64):
+ "Builder class for MIPS IV R10k [Big-endian N32]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=r10k -mabi=n32 -pipe"
+
+class arch_mips4_r10k_n64(generic_mips64):
+ "Builder class for MIPS IV R10k [Big-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=r10k -mabi=64 -pipe"
+
+class arch_mips4_r10k_multilib(generic_mips64):
+ "Builder class for MIPS IV R10k [Big-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=r10k -pipe"
+
class arch_mips64(generic_mips):
"Builder class for MIPS 64 [Big-endian]"
def __init__(self,myspec):
@@ -310,6 +334,10 @@ _subarch_map = {
"mips4_n32" : arch_mips4_n32,
"mips4_n64" : arch_mips4_n64,
"mips4_multilib": arch_mips4_multilib,
+ "mips4_r10k" : arch_mips4_r10k,
+ "mips4_r10k_n32": arch_mips4_r10k_n32,
+ "mips4_r10k_n64": arch_mips4_r10k_n64,
+ "mips4_r10k_multilib": arch_mips4_r10k_multilib,
"mips64" : arch_mips64,
"mips64_n32" : arch_mips64_n32,
"mips64_n64" : arch_mips64_n64,
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-09-03 1:20 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-09-03 1:20 UTC (permalink / raw
To: gentoo-commits
commit: 5b9aef1eb0653c544253f659d1aeaa08ca8c567e
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Sep 3 01:19:19 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Sep 3 01:19:50 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=5b9aef1e
mips.py: replace -mips* with new -march=mips*
---
modules/catalyst/arch/mips.py | 36 ++++++++++++++++++------------------
1 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 9296069..46fafa8 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -33,7 +33,7 @@ class arch_mips1(generic_mips):
"Builder class for MIPS I [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -pipe"
class arch_mips32(generic_mips):
"Builder class for MIPS 32 [Big-endian]"
@@ -51,49 +51,49 @@ class arch_mips3(generic_mips):
"Builder class for MIPS III [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips3_n32(generic_mips64):
"Builder class for MIPS III [Big-endian N32]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips3_n64(generic_mips64):
"Builder class for MIPS III [Big-endian N64]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips3_multilib(generic_mips64):
"Builder class for MIPS III [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips4(generic_mips):
"Builder class for MIPS IV [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -pipe"
class arch_mips4_n32(generic_mips64):
"Builder class for MIPS IV [Big-endian N32]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -pipe"
class arch_mips4_n64(generic_mips64):
"Builder class for MIPS IV [Big-endian N64]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=64 -pipe"
class arch_mips4_multilib(generic_mips64):
"Builder class for MIPS IV [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -pipe"
class arch_mips4_r10k(generic_mips):
"Builder class for MIPS IV R10k [Big-endian]"
@@ -171,7 +171,7 @@ class arch_mipsel1(generic_mipsel):
"Builder class for MIPS I [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -pipe"
class arch_mips32el(generic_mipsel):
"Builder class for MIPS 32 [Little-endian]"
@@ -189,25 +189,25 @@ class arch_mipsel3(generic_mipsel):
"Builder class for MIPS III [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_n32(generic_mips64el):
"Builder class for MIPS III [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_n64(generic_mips64el):
"Builder class for MIPS III [Little-endian N64]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_multilib(generic_mips64el):
"Builder class for MIPS III [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2e(generic_mipsel):
"Builder class for Loongson 2E [Little-endian]"
@@ -237,25 +237,25 @@ class arch_mipsel4(generic_mipsel):
"Builder class for MIPS IV [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -pipe"
class arch_mipsel4_n32(generic_mips64el):
"Builder class for MIPS IV [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips4 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -pipe"
class arch_mipsel4_n64(generic_mips64el):
"Builder class for MIPS IV [Little-endian N64]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips4 -mabi=64 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=64 -pipe"
class arch_mipsel4_multilib(generic_mips64el):
"Builder class for MIPS IV [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -mips4 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -pipe"
class arch_mips64el(generic_mipsel):
"Builder class for MIPS 64 [Little-endian]"
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-10-17 2:29 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-10-17 2:29 UTC (permalink / raw
To: gentoo-commits
commit: d6112c9de80681d8494031d36da3526ea8d27582
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Mon Oct 17 02:16:45 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Mon Oct 17 02:20:46 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=d6112c9d
mips.py: add mips32 softfloat targets
softfloat targets are for producing a userland (ie glibc, gcc) that
handles software floating-point emulation in userspace. The alternative
is configuring your kernel to emulate floating-point math, which is
slower but allows you to use a standard "hard float" userland.
---
modules/catalyst/arch/mips.py | 32 ++++++++++++++++++++++++++++++++
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 46fafa8..4b6e77c 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -41,12 +41,26 @@ class arch_mips32(generic_mips):
generic_mips.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+class arch_mips32_softfloat(generic_mips):
+ "Builder class for MIPS 32 [Big-endian softfloat]"
+ def __init__(self,myspec):
+ generic_mips.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+ self.settings["CHOST"]="mips-softfloat-linux-gnu"
+
class arch_mips32r2(generic_mips):
"Builder class for MIPS 32r2 [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+class arch_mips32r2_softfloat(generic_mips):
+ "Builder class for MIPS 32r2 [Big-endian softfloat]"
+ def __init__(self,myspec):
+ generic_mips.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+ self.settings["CHOST"]="mips-softfloat-linux-gnu"
+
class arch_mips3(generic_mips):
"Builder class for MIPS III [Big-endian]"
def __init__(self,myspec):
@@ -179,12 +193,26 @@ class arch_mips32el(generic_mipsel):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+class arch_mips32el_softfloat(generic_mipsel):
+ "Builder class for MIPS 32 [Little-endian softfloat]"
+ def __init__(self,myspec):
+ generic_mipsel.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+ self.settings["CHOST"]="mipsel-softfloat-linux-gnu"
+
class arch_mips32r2el(generic_mipsel):
"Builder class for MIPS 32r2 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+class arch_mips32r2el_softfloat(generic_mipsel):
+ "Builder class for MIPS 32r2 [Little-endian softfloat]"
+ def __init__(self,myspec):
+ generic_mipsel.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+ self.settings["CHOST"]="mipsel-softfloat-linux-gnu"
+
class arch_mipsel3(generic_mipsel):
"Builder class for MIPS III [Little-endian]"
def __init__(self,myspec):
@@ -325,7 +353,9 @@ _subarch_map = {
"mips" : arch_mips1,
"mips1" : arch_mips1,
"mips32" : arch_mips32,
+ "mips32_softfloat" : arch_mips32_softfloat,
"mips32r2" : arch_mips32r2,
+ "mips32r2_softfloat" : arch_mips32r2_softfloat,
"mips3" : arch_mips3,
"mips3_n32" : arch_mips3_n32,
"mips3_n64" : arch_mips3_n64,
@@ -349,7 +379,9 @@ _subarch_map = {
"mipsel" : arch_mipsel1,
"mipsel1" : arch_mipsel1,
"mips32el" : arch_mips32el,
+ "mips32el_softfloat" : arch_mips32el_softfloat,
"mips32r2el" : arch_mips32r2el,
+ "mips32r2el_softfloat" : arch_mips32r2el_softfloat,
"mipsel3" : arch_mipsel3,
"mipsel3_n32" : arch_mipsel3_n32,
"mipsel3_n64" : arch_mipsel3_n64,
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2011-10-17 2:29 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2011-10-17 2:29 UTC (permalink / raw
To: gentoo-commits
commit: 0db5dbc84cd7a0887995bffc1f680a0533f073c2
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Mon Oct 17 02:26:13 2011 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Mon Oct 17 02:29:17 2011 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=0db5dbc8
mips.py: align class table
---
modules/catalyst/arch/mips.py | 98 ++++++++++++++++++++--------------------
1 files changed, 49 insertions(+), 49 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 4b6e77c..6565e76 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -348,60 +348,60 @@ class arch_cobalt_n32(generic_mips64el):
self.settings["HOSTUSE"]=["cobalt"]
_subarch_map = {
- "cobalt" : arch_cobalt,
- "cobalt_n32" : arch_cobalt_n32,
- "mips" : arch_mips1,
- "mips1" : arch_mips1,
- "mips32" : arch_mips32,
+ "cobalt" : arch_cobalt,
+ "cobalt_n32" : arch_cobalt_n32,
+ "mips" : arch_mips1,
+ "mips1" : arch_mips1,
+ "mips32" : arch_mips32,
"mips32_softfloat" : arch_mips32_softfloat,
- "mips32r2" : arch_mips32r2,
+ "mips32r2" : arch_mips32r2,
"mips32r2_softfloat" : arch_mips32r2_softfloat,
- "mips3" : arch_mips3,
- "mips3_n32" : arch_mips3_n32,
- "mips3_n64" : arch_mips3_n64,
- "mips3_multilib": arch_mips3_multilib,
- "mips4" : arch_mips4,
- "mips4_n32" : arch_mips4_n32,
- "mips4_n64" : arch_mips4_n64,
- "mips4_multilib": arch_mips4_multilib,
- "mips4_r10k" : arch_mips4_r10k,
- "mips4_r10k_n32": arch_mips4_r10k_n32,
- "mips4_r10k_n64": arch_mips4_r10k_n64,
- "mips4_r10k_multilib": arch_mips4_r10k_multilib,
- "mips64" : arch_mips64,
- "mips64_n32" : arch_mips64_n32,
- "mips64_n64" : arch_mips64_n64,
- "mips64_multilib" : arch_mips64_multilib,
- "mips64r2" : arch_mips64r2,
- "mips64r2_n32" : arch_mips64r2_n32,
- "mips64r2_n64" : arch_mips64r2_n64,
- "mips64r2_multilib" : arch_mips64r2_multilib,
- "mipsel" : arch_mipsel1,
- "mipsel1" : arch_mipsel1,
- "mips32el" : arch_mips32el,
+ "mips3" : arch_mips3,
+ "mips3_n32" : arch_mips3_n32,
+ "mips3_n64" : arch_mips3_n64,
+ "mips3_multilib" : arch_mips3_multilib,
+ "mips4" : arch_mips4,
+ "mips4_n32" : arch_mips4_n32,
+ "mips4_n64" : arch_mips4_n64,
+ "mips4_multilib" : arch_mips4_multilib,
+ "mips4_r10k" : arch_mips4_r10k,
+ "mips4_r10k_n32" : arch_mips4_r10k_n32,
+ "mips4_r10k_n64" : arch_mips4_r10k_n64,
+ "mips4_r10k_multilib" : arch_mips4_r10k_multilib,
+ "mips64" : arch_mips64,
+ "mips64_n32" : arch_mips64_n32,
+ "mips64_n64" : arch_mips64_n64,
+ "mips64_multilib" : arch_mips64_multilib,
+ "mips64r2" : arch_mips64r2,
+ "mips64r2_n32" : arch_mips64r2_n32,
+ "mips64r2_n64" : arch_mips64r2_n64,
+ "mips64r2_multilib" : arch_mips64r2_multilib,
+ "mipsel" : arch_mipsel1,
+ "mipsel1" : arch_mipsel1,
+ "mips32el" : arch_mips32el,
"mips32el_softfloat" : arch_mips32el_softfloat,
- "mips32r2el" : arch_mips32r2el,
+ "mips32r2el" : arch_mips32r2el,
"mips32r2el_softfloat" : arch_mips32r2el_softfloat,
- "mipsel3" : arch_mipsel3,
- "mipsel3_n32" : arch_mipsel3_n32,
- "mipsel3_n64" : arch_mipsel3_n64,
- "mipsel3_multilib" : arch_mipsel3_multilib,
- "mipsel4" : arch_mipsel4,
- "mipsel4_n32" : arch_mipsel4_n32,
- "mipsel4_n64" : arch_mipsel4_n64,
- "mipsel4_multilib" : arch_mipsel4_multilib,
- "mips64el" : arch_mips64el,
- "mips64el_n32" : arch_mips64el_n32,
- "mips64el_n64" : arch_mips64el_n64,
- "mips64el_multilib" : arch_mips64el_multilib,
- "mips64r2el" : arch_mips64r2el,
- "mips64r2el_n32" : arch_mips64r2el_n32,
- "mips64r2el_n64" : arch_mips64r2el_n64,
+ "mipsel3" : arch_mipsel3,
+ "mipsel3_n32" : arch_mipsel3_n32,
+ "mipsel3_n64" : arch_mipsel3_n64,
+ "mipsel3_multilib" : arch_mipsel3_multilib,
+ "mipsel4" : arch_mipsel4,
+ "mipsel4_n32" : arch_mipsel4_n32,
+ "mipsel4_n64" : arch_mipsel4_n64,
+ "mipsel4_multilib" : arch_mipsel4_multilib,
+ "mips64el" : arch_mips64el,
+ "mips64el_n32" : arch_mips64el_n32,
+ "mips64el_n64" : arch_mips64el_n64,
+ "mips64el_multilib" : arch_mips64el_multilib,
+ "mips64r2el" : arch_mips64r2el,
+ "mips64r2el_n32" : arch_mips64r2el_n32,
+ "mips64r2el_n64" : arch_mips64r2el_n64,
"mips64r2el_multilib" : arch_mips64r2el_multilib,
- "loongson2e" : arch_loongson2e,
- "loongson2e_n32" : arch_loongson2e_n32,
- "loongson2f" : arch_loongson2f,
- "loongson2f_n32" : arch_loongson2f_n32,
+ "loongson2e" : arch_loongson2e,
+ "loongson2e_n32" : arch_loongson2e_n32,
+ "loongson2f" : arch_loongson2f,
+ "loongson2f_n32" : arch_loongson2f_n32,
}
_machine_map = ("mips","mips64")
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2012-01-27 16:02 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2012-01-27 16:02 UTC (permalink / raw
To: gentoo-commits
commit: a6abe13ef60da4f596965852ac57a2775e48c0ba
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Fri Jan 27 16:00:24 2012 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Fri Jan 27 16:00:24 2012 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=a6abe13e
amd64.py: define CHOST for nocona and core2
Fixes: https://bugs.gentoo.org/show_bug.cgi?id=400829
---
modules/catalyst/arch/amd64.py | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/modules/catalyst/arch/amd64.py b/modules/catalyst/arch/amd64.py
index bab57d3..b4ac70e 100644
--- a/modules/catalyst/arch/amd64.py
+++ b/modules/catalyst/arch/amd64.py
@@ -20,6 +20,7 @@ class arch_nocona(generic_amd64):
def __init__(self,myspec):
generic_amd64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=nocona -pipe"
+ self.settings["CHOST"]="x86_64-pc-linux-gnu"
self.settings["HOSTUSE"]=["mmx","sse","sse2"]
# Requires gcc 4.3 to use this class
@@ -28,6 +29,7 @@ class arch_core2(generic_amd64):
def __init__(self,myspec):
generic_amd64.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=core2 -pipe"
+ self.settings["CHOST"]="x86_64-pc-linux-gnu"
self.settings["HOSTUSE"]=["mmx","sse","sse2","ssse3"]
class arch_k8(generic_amd64):
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2012-03-17 18:36 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2012-03-17 18:36 UTC (permalink / raw
To: gentoo-commits
commit: e0489f16cd4179274c378b9574827ba1766cd18c
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Mar 17 18:33:48 2012 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Mar 17 18:33:48 2012 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=e0489f16
mips.py: change -O3 to -O2 in loongson2f classes
---
modules/catalyst/arch/mips.py | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index aee97bb..432d662 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -265,25 +265,25 @@ class arch_loongson2f(generic_mipsel):
"Builder class for Loongson 2F [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=loongson2f -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2f_n32(generic_mips64el):
"Builder class for Loongson 2F [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=loongson2f -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2f_n64(generic_mips64el):
"Builder class for Loongson 2F [Little-endian N64]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=loongson2f -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2f_multilib(generic_mips64el):
"Builder class for Loongson 2F [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O3 -march=loongson2f -mplt -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=loongson2f -mplt -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel4(generic_mipsel):
"Builder class for MIPS IV [Little-endian]"
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2012-03-17 18:36 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2012-03-17 18:36 UTC (permalink / raw
To: gentoo-commits
commit: 12951b6c4c20628378ea08a4d738c612cb91b16e
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Mar 17 18:27:50 2012 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Mar 17 18:27:50 2012 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=12951b6c
mips.py: add -mplt to non-n64 CFLAGS
---
modules/catalyst/arch/mips.py | 86 ++++++++++++++++++++--------------------
1 files changed, 43 insertions(+), 43 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 6565e76..cf51ea3 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -33,45 +33,45 @@ class arch_mips1(generic_mips):
"Builder class for MIPS I [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -mplt -pipe"
class arch_mips32(generic_mips):
"Builder class for MIPS 32 [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -mplt -pipe"
class arch_mips32_softfloat(generic_mips):
"Builder class for MIPS 32 [Big-endian softfloat]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -mplt -pipe"
self.settings["CHOST"]="mips-softfloat-linux-gnu"
class arch_mips32r2(generic_mips):
"Builder class for MIPS 32r2 [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -mplt -pipe"
class arch_mips32r2_softfloat(generic_mips):
"Builder class for MIPS 32r2 [Big-endian softfloat]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -mplt -pipe"
self.settings["CHOST"]="mips-softfloat-linux-gnu"
class arch_mips3(generic_mips):
"Builder class for MIPS III [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -mplt -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips3_n32(generic_mips64):
"Builder class for MIPS III [Big-endian N32]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -mplt -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips3_n64(generic_mips64):
"Builder class for MIPS III [Big-endian N64]"
@@ -83,19 +83,19 @@ class arch_mips3_multilib(generic_mips64):
"Builder class for MIPS III [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips3 -mfix-r4000 -mfix-r4400 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mplt -mfix-r4000 -mfix-r4400 -pipe"
class arch_mips4(generic_mips):
"Builder class for MIPS IV [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -mplt -pipe"
class arch_mips4_n32(generic_mips64):
"Builder class for MIPS IV [Big-endian N32]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -mplt -pipe"
class arch_mips4_n64(generic_mips64):
"Builder class for MIPS IV [Big-endian N64]"
@@ -107,19 +107,19 @@ class arch_mips4_multilib(generic_mips64):
"Builder class for MIPS IV [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips4 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mplt -pipe"
class arch_mips4_r10k(generic_mips):
"Builder class for MIPS IV R10k [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=r10k -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=r10k -mabi=32 -mplt -pipe"
class arch_mips4_r10k_n32(generic_mips64):
"Builder class for MIPS IV R10k [Big-endian N32]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=r10k -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=r10k -mabi=n32 -mplt -pipe"
class arch_mips4_r10k_n64(generic_mips64):
"Builder class for MIPS IV R10k [Big-endian N64]"
@@ -131,19 +131,19 @@ class arch_mips4_r10k_multilib(generic_mips64):
"Builder class for MIPS IV R10k [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=r10k -pipe"
+ self.settings["CFLAGS"]="-O2 -march=r10k -mplt -pipe"
class arch_mips64(generic_mips):
"Builder class for MIPS 64 [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -mplt -pipe"
class arch_mips64_n32(generic_mips64):
"Builder class for MIPS 64 [Big-endian N32]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -mplt -pipe"
class arch_mips64_n64(generic_mips64):
"Builder class for MIPS 64 [Big-endian N64]"
@@ -155,19 +155,19 @@ class arch_mips64_multilib(generic_mips64):
"Builder class for MIPS 64 [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mplt -pipe"
class arch_mips64r2(generic_mips):
"Builder class for MIPS 64r2 [Big-endian]"
def __init__(self,myspec):
generic_mips.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -mplt -pipe"
class arch_mips64r2_n32(generic_mips64):
"Builder class for MIPS 64r2 [Big-endian N32]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -mplt -pipe"
class arch_mips64r2_n64(generic_mips64):
"Builder class for MIPS 64r2 [Big-endian N64]"
@@ -179,51 +179,51 @@ class arch_mips64r2_multilib(generic_mips64):
"Builder class for MIPS 64r2 [Big-endian multilib]"
def __init__(self,myspec):
generic_mips64.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mplt -pipe"
class arch_mipsel1(generic_mipsel):
"Builder class for MIPS I [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips1 -mabi=32 -mplt -pipe"
class arch_mips32el(generic_mipsel):
"Builder class for MIPS 32 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -mplt -pipe"
class arch_mips32el_softfloat(generic_mipsel):
"Builder class for MIPS 32 [Little-endian softfloat]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32 -mabi=32 -mplt -pipe"
self.settings["CHOST"]="mipsel-softfloat-linux-gnu"
class arch_mips32r2el(generic_mipsel):
"Builder class for MIPS 32r2 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -mplt -pipe"
class arch_mips32r2el_softfloat(generic_mipsel):
"Builder class for MIPS 32r2 [Little-endian softfloat]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips32r2 -mabi=32 -mplt -pipe"
self.settings["CHOST"]="mipsel-softfloat-linux-gnu"
class arch_mipsel3(generic_mipsel):
"Builder class for MIPS III [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_n32(generic_mips64el):
"Builder class for MIPS III [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel3_n64(generic_mips64el):
"Builder class for MIPS III [Little-endian N64]"
@@ -235,43 +235,43 @@ class arch_mipsel3_multilib(generic_mips64el):
"Builder class for MIPS III [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips3 -Wa,-mfix-loongson2f-nop -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips3 -mplt -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2e(generic_mipsel):
"Builder class for Loongson 2E [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=32 -pipe -mplt"
+ self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=32 -mplt -pipe"
class arch_loongson2e_n32(generic_mips64el):
"Builder class for Loongson 2E [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -pipe -mplt"
+ self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -mplt -pipe"
class arch_loongson2f(generic_mipsel):
"Builder class for Loongson 2F [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
+ self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
class arch_loongson2f_n32(generic_mips64el):
"Builder class for Loongson 2F [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -pipe -mplt -Wa,-mfix-loongson2f-nop"
+ self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
class arch_mipsel4(generic_mipsel):
"Builder class for MIPS IV [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=32 -mplt -pipe"
class arch_mipsel4_n32(generic_mips64el):
"Builder class for MIPS IV [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mabi=n32 -mplt -pipe"
class arch_mipsel4_n64(generic_mips64el):
"Builder class for MIPS IV [Little-endian N64]"
@@ -283,19 +283,19 @@ class arch_mipsel4_multilib(generic_mips64el):
"Builder class for MIPS IV [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips4 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips4 -mplt -pipe"
class arch_mips64el(generic_mipsel):
"Builder class for MIPS 64 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=32 -mplt -pipe"
class arch_mips64el_n32(generic_mips64el):
"Builder class for MIPS 64 [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mabi=n32 -mplt -pipe"
class arch_mips64el_n64(generic_mips64el):
"Builder class for MIPS 64 [Little-endian N64]"
@@ -307,19 +307,19 @@ class arch_mips64el_multilib(generic_mips64el):
"Builder class for MIPS 64 [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64 -mplt -pipe"
class arch_mips64r2el(generic_mipsel):
"Builder class for MIPS 64r2 [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=32 -mplt -pipe"
class arch_mips64r2el_n32(generic_mips64el):
"Builder class for MIPS 64r2 [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mabi=n32 -mplt -pipe"
class arch_mips64r2el_n64(generic_mips64el):
"Builder class for MIPS 64r2 [Little-endian N64]"
@@ -331,20 +331,20 @@ class arch_mips64r2el_multilib(generic_mips64el):
"Builder class for MIPS 64r2 [Little-endian multilib]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=mips64r2 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=mips64r2 -mplt -pipe"
class arch_cobalt(generic_mipsel):
"Builder class for cobalt [Little-endian]"
def __init__(self,myspec):
generic_mipsel.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=32 -mplt -pipe"
self.settings["HOSTUSE"]=["cobalt"]
class arch_cobalt_n32(generic_mips64el):
"Builder class for cobalt [Little-endian N32]"
def __init__(self,myspec):
generic_mips64el.__init__(self,myspec)
- self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -pipe"
+ self.settings["CFLAGS"]="-O2 -march=r5000 -mabi=n32 -mplt -pipe"
self.settings["HOSTUSE"]=["cobalt"]
_subarch_map = {
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [gentoo-commits] proj/catalyst:master commit in: modules/catalyst/arch/
@ 2012-03-17 18:36 Matt Turner
0 siblings, 0 replies; 17+ messages in thread
From: Matt Turner @ 2012-03-17 18:36 UTC (permalink / raw
To: gentoo-commits
commit: 6c6e30515a0a595a50349ac418e88048db91f845
Author: Matt Turner <mattst88 <AT> gmail <DOT> com>
AuthorDate: Sat Mar 17 18:33:23 2012 +0000
Commit: Matt Turner <mattst88 <AT> gmail <DOT> com>
CommitDate: Sat Mar 17 18:33:23 2012 +0000
URL: http://git.overlays.gentoo.org/gitweb/?p=proj/catalyst.git;a=commit;h=6c6e3051
mips.py: add loongson2{e,f} n64 and multilib classes
---
modules/catalyst/arch/mips.py | 28 ++++++++++++++++++++++++++++
1 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index cf51ea3..aee97bb 100644
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -249,6 +249,18 @@ class arch_loongson2e_n32(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=n32 -mplt -pipe"
+class arch_loongson2e_n64(generic_mips64el):
+ "Builder class for Loongson 2E [Little-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=loongson2e -mabi=64 -pipe"
+
+class arch_loongson2e_multilib(generic_mips64el):
+ "Builder class for Loongson 2E [Little-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O2 -march=loongson2e -mplt -pipe"
+
class arch_loongson2f(generic_mipsel):
"Builder class for Loongson 2F [Little-endian]"
def __init__(self,myspec):
@@ -261,6 +273,18 @@ class arch_loongson2f_n32(generic_mips64el):
generic_mips64el.__init__(self,myspec)
self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=n32 -mplt -Wa,-mfix-loongson2f-nop -pipe"
+class arch_loongson2f_n64(generic_mips64el):
+ "Builder class for Loongson 2F [Little-endian N64]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O3 -march=loongson2f -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
+
+class arch_loongson2f_multilib(generic_mips64el):
+ "Builder class for Loongson 2F [Little-endian multilib]"
+ def __init__(self,myspec):
+ generic_mips64el.__init__(self,myspec)
+ self.settings["CFLAGS"]="-O3 -march=loongson2f -mplt -Wa,-mfix-loongson2f-nop -pipe"
+
class arch_mipsel4(generic_mipsel):
"Builder class for MIPS IV [Little-endian]"
def __init__(self,myspec):
@@ -400,8 +424,12 @@ _subarch_map = {
"mips64r2el_multilib" : arch_mips64r2el_multilib,
"loongson2e" : arch_loongson2e,
"loongson2e_n32" : arch_loongson2e_n32,
+ "loongson2e_n64" : arch_loongson2e_n64,
+ "loongson2e_multilib" : arch_loongson2e_multilib,
"loongson2f" : arch_loongson2f,
"loongson2f_n32" : arch_loongson2f_n32,
+ "loongson2f_n64" : arch_loongson2f_n64,
+ "loongson2f_multilib" : arch_loongson2f_multilib,
}
_machine_map = ("mips","mips64")
^ permalink raw reply related [flat|nested] 17+ messages in thread
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